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| <h1 id="release-notes-for-stm32f3xx-hal-drivers"><strong>Release Notes for STM32F3xx HAL Drivers</strong></h1> |
| <p>Copyright © 2016 STMicroelectronics<br /> |
| </p> |
| <a href="https://www.st.com" class="logo"><img src="../../_htmresc/st_logo.png" alt="ST logo" /></a> |
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| <h1 id="license"><strong>License</strong></h1> |
| This software component is licensed by ST under BSD 3-Clause license, the “License”; You may not use this component except in compliance with the License. You may obtain a copy of the License at: |
| <center> |
| <a href="https://opensource.org/licenses/BSD-3-Clause">https://opensource.org/licenses/BSD-3-Clause</a> |
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| </div> |
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| <h1 id="update-history"><strong>Update History</strong></h1> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section10_2" checked aria-hidden="true"> <label for="collapse-section10_2" aria-hidden="true"><strong>V1.5.5 / 10-November-2020</strong></label> |
| <div> |
| <h2 id="main-changes">Main Changes</h2> |
| <ul> |
| <li>General updates to fix known defects and enhancements implementation.</li> |
| </ul> |
| <h2 id="contents">Contents</h2> |
| <ul> |
| <li><strong>HAL</strong> driver update |
| <ul> |
| <li>Update hal_def.h to support new ARM compiler Keil V6.</li> |
| <li>Update HAL TimeBase TIM, RTC alarm and RTC WakeUp templates for more robustness |
| <ul> |
| <li>Update HAL_InitTick() API to properly store the priority when using the non-default time base.</li> |
| </ul></li> |
| <li>Add new defines for ARM compiler V6: |
| <ul> |
| <li>__weak</li> |
| <li>__packed</li> |
| <li>__NOINLINE</li> |
| </ul></li> |
| <li>Remove compile switch “USE_HAL_LEGACY” on #include “Legacy/stm32_hal_legacy.h”</li> |
| </ul></li> |
| <li><strong>HAL/LL ADC</strong> update |
| <ul> |
| <li>Update HAL_ADC_IRQHandler() API for case of injected conversion with software trigger and end of conversion or sequence triggered |
| <ul> |
| <li>disable interruption and update state machine.</li> |
| </ul></li> |
| <li>Update HAL_ADC_Stop_DMA() API to check if DMA state is Busy before calling HAL_DMA_Abort() API to avoid DMA internal error.</li> |
| <li>Update LL_ADC_REG_Init() API to avoid enabling continuous mode and discontinuous mode simultaneously.</li> |
| <li>Support missing trigger Timer 2 Capture Compare 2 of regular source for STM32F301, STM32F302 and STM32F318: |
| <ul> |
| <li>Add LL_ADC_REG_TRIG_EXT_TIM2_CH2 in LL driver and ADC_EXTERNALTRIGCONV_T2_CC2 in HAL driver</li> |
| </ul></li> |
| <li>fix codesonar warning: “Negative Shift Amount” |
| <ul> |
| <li>impacted API: |
| <ul> |
| <li>LL_ADC_REG_SetSequencerRanks</li> |
| <li>LL_ADC_REG_GetSequencerRanks</li> |
| <li>LL_ADC_INJ_SetSequencerRanks</li> |
| <li>LL_ADC_INJ_GetSequencerRanks</li> |
| </ul></li> |
| </ul></li> |
| <li>Update comment to clarify the “How to use low power mode”</li> |
| </ul></li> |
| <li><strong>LL COMP</strong> update |
| <ul> |
| <li>Fix wrong Value for: |
| <ul> |
| <li>LL_COMP_OUTPUT_TIM3_IC1_COMP2</li> |
| <li>LL_COMP_OUTPUT_TIM3_IC1_COMP1_2</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>LL OPAMP</strong> update |
| <ul> |
| <li>fix wrong description comments for: |
| <ul> |
| <li>LL_OPAMP_INPUT_NONINVERT_IO2</li> |
| <li>LL_OPAMP_INPUT_NONINVERT_IO3</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL RTC</strong> update |
| <ul> |
| <li>Daylight Saving Time (DST) feature to subtract or add one hour to the calendar can now be handled outside HAL_RTC_SetTime() thanks to new APIs: |
| <ul> |
| <li>HAL_RTC_DST_Add1Hour()</li> |
| <li>HAL_RTC_DST_Sub1Hour()</li> |
| <li>HAL_RTC_DST_SetStoreOperation()</li> |
| <li>HAL_RTC_DST_SetStoreOperation()</li> |
| <li>HAL_RTC_DST_ClearStoreOperation()</li> |
| <li>HAL_RTC_DST_ReadStoreOperation()</li> |
| </ul></li> |
| <li>DayLightSaving and StoreOperation interfaces from RTC_TimeTypeDef type are now deprecated.</li> |
| </ul></li> |
| <li><strong>HAL CEC</strong> update |
| <ul> |
| <li>Update HAL_CEC_IRQHandler() API to avoid appending an extra byte to the end of message.</li> |
| </ul></li> |
| <li><strong>HAL RTC</strong> update |
| <ul> |
| <li>Update to support Daylight Saving Time (DST) feature: |
| <ul> |
| <li>Subtract or add one hour to the calendar can now be handled outside HAL_RTC_SetTime() thanks to new APIs. |
| <ul> |
| <li>HAL_RTC_DST_Add1Hour() API to add one hour to the calendar</li> |
| <li>HAL_RTC_DST_Sub1Hour() API to subtract one hour from the calendar</li> |
| <li>HAL_RTC_DST_SetStoreOperation() API to set the store operation bit</li> |
| <li>HAL_RTC_DST_ClearStoreOperation() API to clear the store operation bit</li> |
| <li>HAL_RTC_DST_ReadStoreOperation() API to read the store operation bit</li> |
| </ul></li> |
| <li>DayLightSaving and StoreOperation interfaces from RTC_TimeTypeDef type are now deprecated.</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL/LL SPI</strong> update |
| <ul> |
| <li>Update Transmit/Receive processes in half-duplex mode</li> |
| <li>Disable the SPI instance before setting BDIOE bit</li> |
| <li>Disable TX DMA request only in bidirectional receive mode</li> |
| <li>Fix wrong timeout management |
| <ul> |
| <li>Calculate Timeout based on a software loop to avoid blocking issue if Systick is disabled</li> |
| </ul></li> |
| <li>Update HAL_SPI_Init() API |
| <ul> |
| <li>To avoid setting the BaudRatePrescaler in case of Slave Motorola Mode</li> |
| <li>Use the bit-mask for SPI configuration</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>LL I2S</strong> update |
| <ul> |
| <li>Update LL_I2S_Init() API to correctly calculate sourceclock which used for bitrate calculation.</li> |
| <li>Update HAL_I2S_DMAStop() API to be more safe |
| <ul> |
| <li>Add a check on BSY, TXE and RXNE flags before disabling the I2S</li> |
| </ul></li> |
| <li>Update HAL_I2S_DMAStop() API to fix multi-call transfer issue(to avoid re-initializing the I2S for the next transfer). |
| <ul> |
| <li>Add __HAL_I2SEXT_FLUSH_RX_DR() and __HAL_I2S_FLUSH_RX_DR() macros to flush the remaining data inside DR registers.</li> |
| <li>Add new ErrorCode define: HAL_I2S_ERROR_BUSY_LINE_RX</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL NOR</strong> update |
| <ul> |
| <li>Update address calculation in HAL_NOR_ProgramBuffer()</li> |
| <li>Apply adequate commands according to the command set field value |
| <ul> |
| <li>command set 1 for Micron JS28F512P33</li> |
| <li>command set 2 for Micron M29W128G and Cypress S29GL128P</li> |
| </ul></li> |
| <li>Add new commands operations: |
| <ul> |
| <li>NOR_CMD_READ_ARRAY</li> |
| <li>NOR_CMD_WORD_PROGRAM</li> |
| <li>NOR_CMD_BUFFERED_PROGRAM</li> |
| <li>NOR_CMD_CONFIRM</li> |
| <li>NOR_CMD_BLOCK_ERASE</li> |
| <li>NOR_CMD_BLOCK_UNLOCK</li> |
| <li>NOR_CMD_READ_STATUS_REG</li> |
| <li>NOR_CMD_CLEAR_STATUS_REG</li> |
| </ul></li> |
| <li>Update some APIs in order to be compliant for memories with another command set. |
| <ul> |
| <li>HAL_NOR_Init()</li> |
| <li>HAL_NOR_Read_ID()</li> |
| <li>HAL_NOR_ReturnToReadMode()</li> |
| <li>HAL_NOR_Read()</li> |
| <li>HAL_NOR_Program()</li> |
| <li>HAL_NOR_ReadBuffer()</li> |
| <li>HAL_NOR_ProgramBuffer()</li> |
| <li>HAL_NOR_Erase_Block()</li> |
| <li>HAL_NOR_Erase_Chip()</li> |
| <li>HAL_NOR_GetStatus()</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL HRTIM</strong> update |
| <ul> |
| <li>Update HAL_HRTIM_DLLCalibrationStart() and HAL_HRTIM_DLLCalibrationStart_IT() to set the handler state back to “READY” before exiting.</li> |
| </ul></li> |
| <li><strong>HAL TSC</strong> update |
| <ul> |
| <li>Update the HAL_TSC_Init() API to add new check condition on “PulseGeneratorPrescaler” Parameter.</li> |
| </ul></li> |
| <li><strong>HAL/LL TIM</strong> update |
| <ul> |
| <li>Update Encoder input interface to don’t allow both input polarity configuration |
| <ul> |
| <li>Replace IS_TIM_IC_POLARITY() macro by IS_TIM_ENCODERINPUT_POLARITY() macro.</li> |
| </ul></li> |
| <li>Update to allow multiple DMA request with different channels in parallel: |
| <ul> |
| <li>Implement DMA burst state management mechanism</li> |
| <li>Implement TIM channel state management mechanism</li> |
| </ul></li> |
| <li>Correct inverted values of LL_TIM_COUNTERMODE_CENTER_DOWN and LL_TIM_COUNTERMODE_CENTER_UP</li> |
| <li>Update LL_TIM_GetCounterMode() API to return right counter mode.</li> |
| <li>Add LL_TIM_IsActiveUIFCPY inline function to indicate whether update interrupt flag (UIF) copy is set or not.</li> |
| </ul></li> |
| <li><strong>HAL/LL SMARTCARD</strong> update |
| <ul> |
| <li>Update smartcard transmit processes to be able to handle data retransmission when NACK is received in smartcard T=0</li> |
| </ul></li> |
| <li><strong>HAL/LL IRDA</strong> update |
| <ul> |
| <li>Fix typos in IRDA State definition description</li> |
| </ul></li> |
| <li><strong>HAL/LL UART</strong> update |
| <ul> |
| <li>Update to enhance reception to idle services (ReceptionToIdle): |
| <ul> |
| <li>Add a new field HAL_UART_RxTypeTypeDef structure to the UART_HandleTypeDef structure to identify the type of ongoing Reception</li> |
| <li>Add UART Reception Event Callback registration features</li> |
| <li>Add a set of APIs specific to Reception to Idle transfer in different mode |
| <ul> |
| <li>Add HAL_UARTEx_ReceiveToIdle API to receive an amount of data in blocking mode till either the expected number of data is received or an IDLE event occurs.</li> |
| <li>Add HAL_UARTEx_ReceiveToIdle_IT() API to receive an amount of data in interrupt mode till either the expected number of data is received or an IDLE event occurs.</li> |
| <li>Add HAL_UARTEx_ReceiveToIdle_DMA() API to receive an amount of data in DMA mode till either the expected number of data is received or an IDLE event occurs.</li> |
| </ul></li> |
| <li>Update HAL_UART_Receive(), HAL_UART_Receive_IT() and HAL_UART_Receive_DMA() APIs to support the new enhancement of ReceptionToIdle</li> |
| </ul></li> |
| <li>Update HAL_UART_IRQHandler() to handle receiver timeout interruption</li> |
| <li>Update UART receive processes (IT & DMA) to handle the UART receive timeout interruption</li> |
| <li>Move the process unlock at the top of the HAL_UART_Receive() and HAL_UART_Transmit() API.</li> |
| <li>Fix typos in UART State definition description</li> |
| </ul></li> |
| <li><strong>HAL/LL USART</strong> update |
| <ul> |
| <li>Add RTO (Receiver Time Out) support to USART HAL flags and IT management |
| <ul> |
| <li>Add HAL_USART_ERROR_RTO define of Receiver Timeout error to the USART Error Definition section</li> |
| <li>Add USART_FLAG_RTOF define of Receiver Timeout flag to the USART Flags section</li> |
| <li>Add USART_CLEAR_RTOF define of Receiver Timeout clear flag to the USART Clear Flags section</li> |
| <li>Update HAL_USART_IRQHandler to add support to the Receiver Timeout Interruption</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL IWDG</strong> update |
| <ul> |
| <li>Update HAL_IWDG_DEFAULT_TIMEOUT define value to consider LSI value instead of hardcoded value.</li> |
| </ul></li> |
| <li><strong>LL UTILS</strong> update |
| <ul> |
| <li>UTILS_SetFlashLatency() API renamed to LL_SetFlashLatency() and set exportable.</li> |
| </ul></li> |
| </ul> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section10_1" aria-hidden="true"> <label for="collapse-section10_1" aria-hidden="true"><strong>V1.5.4 / 23-July-2020</strong></label> |
| <div> |
| <h2 id="main-changes-1">Main Changes</h2> |
| <ul> |
| <li>General updates to fix known defects and enhancements implementation</li> |
| </ul> |
| <h2 id="contents-1">Contents</h2> |
| <ul> |
| <li><strong>HAL/LL GPIO</strong> update |
| <ul> |
| <li>Update GPIO initialization sequence to avoid unwanted pulse on GPIO Pin’s.</li> |
| <li>Update HAL_GPIO_TogglePin() API to allow the toggling of many pins.</li> |
| <li>HAL_GPIO_TogglePin reentrancy robustness improvement by using BSRR register instead of ODR register.</li> |
| </ul></li> |
| <li><strong>HAL/LL I2C</strong> update |
| <ul> |
| <li>Update HAL_I2C_ER_IRQHandler() API to fix acknowledge failure issue with I2C memory IT processes |
| <ul> |
| <li>Add stop condition generation when NACK occurs.</li> |
| </ul></li> |
| <li>Update I2C_DMAXferCplt(), I2C_DMAError() and I2C_DMAAbort() APIs to fix hardfault issue when hdmatx and hdmarx parameters in i2c handle aren’t initialized (NULL pointer). |
| <ul> |
| <li>Add additional check on hi2c->hdmtx and hi2c->hdmarx before resetting DMA Tx/Rx complete callbacks</li> |
| </ul></li> |
| <li>Update Sequential transfer APIs to adjust xfermode condition. |
| <ul> |
| <li>Replace hi2c->XferCount < MAX_NBYTE_SIZE by hi2c->XferCount <= MAX_NBYTE_SIZE which corresponds to a case without reload</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL/LL USB</strong> driver |
| <ul> |
| <li>Bug fix: USB_ReadPMA() and USB_WritePMA() by ensuring 16-bits access to USB PMA memory</li> |
| <li>Bug fix: correct USB RX count calculation</li> |
| <li>Fix USB Bulk transfer double buffer mode</li> |
| <li>Remove register keyword from USB defined macros as no more supported by C++ compiler</li> |
| <li>Minor rework on USBD_Start() and USBD_Stop() APIs: stopping device will be handled by HAL_PCD_DeInit() API.</li> |
| <li>Remove non used API for USB device mode.</li> |
| </ul></li> |
| </ul> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section10" aria-hidden="true"> <label for="collapse-section10" aria-hidden="true"><strong>V1.5.3 / 12-September-2019</strong></label> |
| <div> |
| <h2 id="main-changes-2">Main Changes</h2> |
| <ul> |
| <li>General updates to fix known defects and enhancements implementation</li> |
| <li>Add support of HAL callback registration feature</li> |
| <li>Add new <strong>HAL EXTI</strong> driver</li> |
| <li><strong>The following changes done on the HAL drivers require an update on the application code based on older HAL versions</strong> |
| <ul> |
| <li><strong>HAL/LL Generic</strong> update |
| <ul> |
| <li>Add support of <strong>HAL callback registration</strong> feature |
| <ul> |
| <li>The feature disabled by default is available for the following HAL drivers: |
| <ul> |
| <li><strong>ADC, CAN, COMP, CEC, DAC, SMBUS, HRTIM, I2C, UART, USART, SRAM, NAND, NOR, PCCARD, WWDG, OPAMP, RTC, SDADC, SPI, I2S, TIM, TSC and PCD</strong></li> |
| </ul></li> |
| <li>The feature may be enabled individually per HAL PPP driver by setting the corresponding definition USE_HAL_PPP_REGISTER_CALLBACKS to 1U in stm32f3xx_hal_conf.h project configuration file (template file stm32f3xx_hal_conf_template.h available from Drivers/STM32F3xx_HAL_Driver/Inc)</li> |
| <li>Once enabled , the user application may resort to HAL_PPP_RegisterCallback() to register specific callback function(s) and unregister it(them) with HAL_PPP_UnRegisterCallback()</li> |
| </ul></li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL/LL Generic</strong> update |
| <ul> |
| <li>General updates to fix MISRA 2012 compilation errors |
| <ul> |
| <li>Update assert_failed() API prototype to use pointer on uint8_t instead of char</li> |
| </ul></li> |
| <li>Update HAL_SetTickFreq() HAL_SetTickFreq() to be able to restore previous tick frequency when HAL_SetTickFreq() failed.</li> |
| </ul></li> |
| <li><strong>HAL CRC</strong> update |
| <ul> |
| <li>Remove extra call to HAL_LOCK/HAL_UNLOCK from the followings API’s: |
| <ul> |
| <li>HAL_CRC_Accumulate()</li> |
| <li>HAL_CRC_Calculate()</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL DAC</strong> update |
| <ul> |
| <li>Update to check on DAC_CHANNEL2_SUPPORT instead of device part number</li> |
| </ul></li> |
| <li><strong>HAL DMA</strong> update |
| <ul> |
| <li>Update HAL_DMA_Abort() API to |
| <ul> |
| <li>Be able to return HAL_ERROR when DMA is already busy</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL/LL RTC</strong> update |
| <ul> |
| <li>HAL/LL drivers optimization |
| <ul> |
| <li>HAL driver: remove unused variables to fix CodeSonar warnings</li> |
| <li>LL driver: getter APIs optimization</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL FLASH</strong> update |
| <ul> |
| <li>Update the FLASH_OB_GetRDP() API to return the correct RDP level</li> |
| </ul></li> |
| <li><strong>HAL GPIO</strong> update |
| <ul> |
| <li>HAL_GPIO_TogglePin() API implementation update: to improve robustness</li> |
| <li>HAL_GPIO_DeInit() API update to ensure clear all GPIO EXTI pending interrupts.</li> |
| </ul></li> |
| <li><strong>HAL CEC</strong> update |
| <ul> |
| <li>update CEC states definition</li> |
| </ul></li> |
| <li><strong>HAL COMP</strong> update |
| <ul> |
| <li>Add HAL_COMP_GetError() API to return the COMP error code</li> |
| </ul></li> |
| <li><strong>HAL HRTIM</strong> update |
| <ul> |
| <li>HRTIM API changes for MISRA-C 2012 compliance: |
| <ul> |
| <li>Rename HAL_HRTIM_WaveformCounterStart() to HAL_HRTIM_WaveformCountStart()</li> |
| <li>Rename HAL_HRTIM_WaveformCounterStop() to HAL_HRTIM_WaveformCountStop()</li> |
| <li>Rename HAL_HRTIM_WaveformCounterStart_DMA() to HAL_HRTIM_WaveformCountStart_DMA()</li> |
| <li>Rename HAL_HRTIM_WaveformCounterStop_DMA() to HAL_HRTIM_WaveformCountStop_DMA()</li> |
| <li>Rename HAL_HRTIM_WaveformCounterStart_IT() to HAL_HRTIM_WaveformCountStart_IT()</li> |
| <li>Rename HAL_HRTIM_WaveformCounterStop_IT() to HAL_HRTIM_WaveformCountStop_IT()</li> |
| <li>Rename HAL_HRTIM_DLLCalbrationReadyCallback() to HAL_HRTIM_DLLCalibrationReadyCallback()</li> |
| <li><strong>Note</strong>: The stm32_hal_legacy.h file is also updated to avoid compatibility break versus the previous STM32F3 HAL version regarding the replaced defines</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL I2C</strong> update |
| <ul> |
| <li>I2C API changes for MISRA-C 2012 compliance: |
| <ul> |
| <li>Rename HAL_I2C_Master_Sequential_Transmit_IT() to HAL_I2C_Master_Seq_Transmit_IT()</li> |
| <li>Rename HAL_I2C_Master_Sequentiel_Receive_IT() to HAL_I2C_Master_Seq_Receive_IT()</li> |
| <li>Rename HAL_I2C_Slave_Sequentiel_Transmit_IT() to HAL_I2C_Slave_Seq_Transmit_IT()</li> |
| <li>Rename HAL_I2C_Slave_Sequentiel_Receive_DMA() to HAL_I2C_Slave_Seq_Receive_DMA()</li> |
| </ul></li> |
| <li>Add support of I2C repeated start feature in DMA Mode With the following new API’s |
| <ul> |
| <li>HAL_I2C_Master_Seq_Transmit_DMA()</li> |
| <li>HAL_I2C_Master_Seq_Receive_DMA()</li> |
| <li>HAL_I2C_Slave_Seq_Transmit_DMA()</li> |
| <li>HAL_I2C_Slave_Seq_Receive_DMA()</li> |
| </ul></li> |
| <li>Add new I2C transfer options to easy manage the sequential transfers |
| <ul> |
| <li>I2C_OTHER_FRAME</li> |
| <li>I2C_OTHER_AND_LAST_FRAME</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL SPI</strong> update |
| <ul> |
| <li>General update to enhance robustness for HAL SPI driver</li> |
| </ul></li> |
| <li><strong>HAL I2S</strong> update |
| <ul> |
| <li>General update to enhance robustness for HAL I2S driver</li> |
| </ul></li> |
| <li><strong>HAL SMBUS</strong> update |
| <ul> |
| <li>General update to enhance robustness for HAL SMBUS driver</li> |
| </ul></li> |
| <li><strong>HAL TIM</strong> update |
| <ul> |
| <li>Update HAL_TIMEx_RemapConfig() API prototype to use only one parameter for TIMx Remapping input capabilities |
| <ul> |
| <li>HAL_TIMEx_RemapConfig(TIM_HandleTypeDef <em>htim, uint32_t Remap) instead of HAL_TIMEx_RemapConfig(TIM_HandleTypeDef </em>htim, uint32_t Remap1, uint32_t Remap2)</li> |
| </ul></li> |
| <li>Move the following TIM structures from stm32f3xx_hal_tim_ex.h into stm32f3xx_hal_tim.h |
| <ul> |
| <li>TIM_MasterConfigTypeDef()</li> |
| <li>TIM_BreakDeadTimeConfigTypeDef()</li> |
| </ul></li> |
| <li>TIM API changes for MISRA-C 2012 compliance: |
| <ul> |
| <li>Rename HAL_TIM_SlaveConfigSynchronization to HAL_TIM_SlaveConfigSynchro</li> |
| <li>Rename HAL_TIM_SlaveConfigSynchronization_IT to HAL_TIM_SlaveConfigSynchro_IT</li> |
| <li>Rename HAL_TIMEx_ConfigCommutationEvent to HAL_TIMEx_ConfigCommutEvent</li> |
| <li>Rename HAL_TIMEx_ConfigCommutationEvent_IT to HAL_TIMEx_ConfigCommutEvent_IT</li> |
| <li>Rename HAL_TIMEx_ConfigCommutationEvent_DMA to HAL_TIMEx_ConfigCommutEvent_DMA</li> |
| <li>Rename HAL_TIMEx_CommutationCallback to HAL_TIMEx_CommutCallback</li> |
| </ul></li> |
| <li>Add a call to HAL_DMA_Abort_IT from HAL_TIM_XXX_Stop_DMA</li> |
| </ul></li> |
| <li><strong>HAL TSC</strong> update |
| <ul> |
| <li>HAL_TSC_IODischarge() API: update choice parameter to be on FunctionalState instead of uint32_t.</li> |
| <li>Add new field ErrorCode in TSC_HandleTypeDef structure</li> |
| <li>HAL_TSC_Init() API add new assert_param() on ChannelIOs, ShieldIOs and SamplingIOs fields.</li> |
| </ul></li> |
| <li><strong>HAL UART</strong> update |
| <ul> |
| <li>Update to manage UART LIN and UART wakeUp features in stm32f0xx_hal_uart.c/.h instead of stm32f0_hal_uart_ex.c/.h</li> |
| <li>General update to enhance robustness for HAL UART driver</li> |
| <li>Major Update to improve performance in polling/interrupt mode to reach max frequency: |
| <ul> |
| <li>Polling mode : |
| <ul> |
| <li>Use API data pointer instead of UART handle data pointer.</li> |
| </ul></li> |
| <li>Interrupt mode |
| <ul> |
| <li>Minimize access on UART registers.</li> |
| <li>Split the UART modes into dedicated static functions to minimize checking statements under HAL_IRQHandler(): |
| <ul> |
| <li>8 bit/ 16 bits data formats</li> |
| </ul></li> |
| </ul></li> |
| <li>All modes: |
| <ul> |
| <li>Update Timeout management to check on global process.</li> |
| <li>Update Error code management in all processes.</li> |
| </ul></li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL USART</strong> update |
| <ul> |
| <li>General update to enhance robustness for HAL USART driver</li> |
| <li>Major Update to improve performance in polling/interrupt mode to reach max frequency: |
| <ul> |
| <li>Polling mode : |
| <ul> |
| <li>Use API data pointer instead of USART handle data pointer.</li> |
| <li>Update HAL USART Transmit/Receive processes to support Word Length 9 Bits with/No parity transfer</li> |
| </ul></li> |
| <li>Interrupt mode |
| <ul> |
| <li>Minimize access on USART registers.</li> |
| <li>Split the USART modes into dedicated static functions to minimize checking statements under HAL_IRQHandler(): |
| <ul> |
| <li>8 bit/ 16 bits data formats</li> |
| </ul></li> |
| </ul></li> |
| <li>All modes: |
| <ul> |
| <li>Update Timeout management to check on global process.</li> |
| <li>Update Error code management in all processes.</li> |
| </ul></li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL SMARTCARD</strong> update |
| <ul> |
| <li>General update to enhance robustness for HAL SMARTCARD driver</li> |
| <li>Major Update to improve performance in polling/interrupt mode to reach max frequency: |
| <ul> |
| <li>Polling mode : |
| <ul> |
| <li>Use API data pointer instead of SMARTCARD handle data pointer.</li> |
| <li>Update HAL SMARTCARD Transmit/Receive processes to support Word Length 9 Bits with/No parity transfer</li> |
| </ul></li> |
| <li>Interrupt mode |
| <ul> |
| <li>Minimize access on SMARTCARD registers.</li> |
| <li>Split the SMARTCARD modes into dedicated static functions to minimize checking statements under HAL_IRQHandler(): |
| <ul> |
| <li>8 bit/ 16 bits data formats</li> |
| </ul></li> |
| </ul></li> |
| <li>All modes: |
| <ul> |
| <li>Update Timeout management to check on global process.</li> |
| <li>Update Error code management in all processes.</li> |
| </ul></li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL IrDA</strong> update |
| <ul> |
| <li>General update to enhance robustness for HAL IrDA driver</li> |
| <li>Update HAL IrDA Transmit/Receive processes to support Word Length 9 Bits with/No parity transfer</li> |
| <li>Remove unused IRDA_ControlTypeDef() enumeration</li> |
| </ul></li> |
| <li><strong>LL/HAL RCC</strong> update |
| <ul> |
| <li>Add new LL/HAL macros |
| <ul> |
| <li>LL_RCC_PLL_SetMainSource() allowing to configure PLL main clock source</li> |
| <li>__HAL_RCC_GET_RTC_SOURCE() allowing to get the RTC clock source</li> |
| </ul></li> |
| <li>Update HAL_RCC_ClockConfig() API to: |
| <ul> |
| <li>update to use __HAL_FLASH_GET_LATENCY() flash macro instead of using direct register access to LATENCY bits in FLASH ACR register.</li> |
| </ul></li> |
| <li>Update HAL_RCC_DeInit() and LL_RCC_DeInit() APIs to: |
| <ul> |
| <li>Add checks for HSI and PLL ready before modifying RCC CFGR registers</li> |
| <li>Clear all interrupt flags</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL/LL USB</strong> update |
| <ul> |
| <li>Add stm32f3xx_ll_usb.c/h driver</li> |
| <li>cleanup reference to low speed in device mode</li> |
| <li>Software Quality improvement with a fix of CodeSonar warning on PCD_Port_IRQHandler() interrupt handlers</li> |
| <li>Remove wrongly coded PCD_GET6_DB_DIR macro</li> |
| <li>Improve software quality to be MISRA-C 2012 and CodeSonar compliant</li> |
| <li>STM32F3 Fix USB Exti Wakeup signal by removing non used macro</li> |
| <li>Ensure 16bits access to USB PMA</li> |
| <li>Make sure to set correct count for receive fifo</li> |
| <li>Rework USB BCD driver and fix required timing to initiate primary and secondary detection</li> |
| <li>Prevent clearing CTR_RX and CTR_TX flags when setting the EP type</li> |
| <li>Add error check during USB init</li> |
| </ul></li> |
| </ul> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section1_5_2" aria-hidden="true"> <label for="collapse-section1_5_2" aria-hidden="true"><strong>V1.5.2 / 12-June-2018</strong></label> |
| <div> |
| <h2 id="main-changes-3">Main Changes</h2> |
| <ul> |
| <li><strong>Maintenance release to fix known defects and enhancements implementation</strong></li> |
| <li><strong>Generic drivers changes</strong></li> |
| <li>Some global variables on stm32xxx_hal.c updated to be declared as extern</li> |
| <li><strong>HAL drivers changes</strong></li> |
| <li><strong>The following changes done on the HAL drivers require an update on the application code based on older HAL versions</strong></li> |
| <li><strong>Rework of HAL CAN driver (compatibility break)</strong> |
| <ul> |
| <li>A new HAL CAN driver has been redesigned with new APIs, to bypass limitations on CAN Tx/Rx FIFO management present with previous HAL CAN driver version.</li> |
| <li>The new HAL CAN driver is the recommended version. It is located as usual in Drivers/STM32F3xx_HAL_Driver/Src and Drivers/STM32F3xx_HAL_Driver/Inc folders. It can be enabled through switch HAL_CAN_MODULE_ENABLED in stm32f3xx_hal_conf.h</li> |
| <li>The legacy HAL CAN driver is also present in the release in Drivers/STM32F3xx_HAL_Driver/Src/Legacy and Drivers/STM32F3xx_HAL_Driver/Inc/Legacy folders for software compatibility reasons. Its usage is not recommended as deprecated. It can however be enabled through switch HAL_CAN_LEGACY_MODULE_ENABLED in stm32f3xx_hal_conf.h</li> |
| </ul></li> |
| <li><strong>HAL</strong> update |
| <ul> |
| <li>Add definition of HAL_CAN_LEGACY_MODULE_ENABLED switch in stm32f3xx_hal_conf_template.h</li> |
| </ul></li> |
| <li><strong>HAL CAN</strong> update |
| <ul> |
| <li>Fields of CAN_InitTypeDef structure are reworked: |
| <ul> |
| <li>SJW to SyncJumpWidth, BS1 to TimeSeg1, BS2 to TimeSeg2, TTCM to TimeTriggeredMode, ABOM to AutoBusOff, AWUM to AutoWakeUp, NART to AutoRetransmission (inversed), RFLM to ReceiveFifoLocked and TXFP to TransmitFifoPriority</li> |
| </ul></li> |
| <li>HAL_CAN_Init() is split into both HAL_CAN_Init() and HAL_CAN_Start() API’s</li> |
| <li>HAL_CAN_Transmit() is replaced by HAL_CAN_AddTxMessage() to place Tx Request, then HAL_CAN_GetTxMailboxesFreeLevel() for polling until completion.</li> |
| <li>HAL_CAN_Transmit_IT() is replaced by HAL_CAN_ActivateNotification() to enable transmit IT, then HAL_CAN_AddTxMessage() for place Tx request.</li> |
| <li>HAL_CAN_Receive() is replaced by HAL_CAN_GetRxFifoFillLevel() for polling until reception, then HAL_CAN_GetRxMessage()</li> |
| <li>to get Rx message.</li> |
| <li>HAL_CAN_Receive_IT() is replaced by HAL_CAN_ActivateNotification() to enable receive IT, then HAL_CAN_GetRxMessage()</li> |
| <li>in the receivecallback to get Rx message</li> |
| <li>HAL_CAN_Slepp() is renamed as HAL_CAN_RequestSleep()</li> |
| <li>HAL_CAN_TxCpltCallback() is split into HAL_CAN_TxMailbox0CompleteCallback(), HAL_CAN_TxMailbox1CompleteCallback() and HAL_CAN_TxMailbox2CompleteCallback().</li> |
| <li>HAL_CAN_RxCpltCallback is split into HAL_CAN_RxFifo0MsgPendingCallback() and HAL_CAN_RxFifo1MsgPendingCallback().</li> |
| <li>More complete “How to use the new driver” is detailed in the driver header section itself.</li> |
| </ul></li> |
| <li><strong>HAL COMP</strong> update |
| <ul> |
| <li>Fix wrong configuration of Comparator 4 inverting input for stm32f301x8 device</li> |
| </ul></li> |
| <li><strong>HAL DMA</strong> update |
| <ul> |
| <li>Add clean of callbacks in HAL_DMA_DeInit() API</li> |
| </ul></li> |
| <li><strong>HAL HRTIM</strong> update |
| <ul> |
| <li>Add more flexibility on GetTimerIdxFromDMAHandle() static function</li> |
| </ul></li> |
| <li><strong>HAL RCC</strong> update |
| <ul> |
| <li>Update HAL_RCC_ClockConfig() API to: |
| <ul> |
| <li>check on null pointer</li> |
| <li>optimize code size by updating the handling method of the SWS bits</li> |
| <li>update to use __HAL_FLASH_GET_LATENCY() flash macro instead of using direct register access to LATENCY bits in FLASH ACR register.</li> |
| </ul></li> |
| <li>Update HAL_RCC_DeInit() API to |
| <ul> |
| <li>Be able to return HAL</li> |
| <li>Add checks for HSI and PLL ready before modifying RCC CFGR registers</li> |
| <li>Clear all interrupt flags</li> |
| <li>Initialize systick interrupt period</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL RTC</strong> update |
| <ul> |
| <li>Fix warning with static analysis: remove unused variables</li> |
| </ul></li> |
| <li><strong>HAL TIM</strong> update |
| <ul> |
| <li>Update HAL_TIMEx_OCN_xxxx() and HAL_TIMEx_PWMN_xxx() API description to remove support of TIM_CHANNEL_4</li> |
| <li>Add a note in functions header to perform timer reset when switching from Aligned counter mode to Edge counter mode (or reverse)</li> |
| </ul></li> |
| <li><strong>LL Drivers changes</strong></li> |
| <li><strong>LL TIM</strong> |
| <ul> |
| <li>Add a note in macros header to perform timer reset when switching from Aligned counter mode to Edge counter mode (or reverse)</li> |
| </ul></li> |
| <li><strong>LL UTILS</strong> |
| <ul> |
| <li>Remove the set of SysTick_CTRL_TICKINT bit in SysTick->CTRL from LL_InitTick()</li> |
| </ul></li> |
| <li><strong>LL RCC</strong> |
| <ul> |
| <li>Update LL_RCC_DeInit() API to |
| <ul> |
| <li>Be able to return LL status</li> |
| <li>Add checks for HSI and PLL ready before modifying RCC CFGR registers</li> |
| <li>Clear all interrupt flags</li> |
| </ul></li> |
| </ul></li> |
| </ul> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section1_5_1" aria-hidden="true"> <label for="collapse-section1_5_1" aria-hidden="true"><strong>V1.5.1 / 11-May-2018</strong></label> |
| <div> |
| <h2 id="main-changes-4">Main Changes</h2> |
| <ul> |
| <li>General updates to fix known defects and enhancements implementation</li> |
| <li><strong>HAL Drivers changes</strong></li> |
| <li><strong>HAL</strong> update |
| <ul> |
| <li>Update HAL driver to allow user to change systick period to 1ms, 10 ms or 100 ms : |
| <ul> |
| <li>Add the following API’s : |
| <ul> |
| <li>HAL_GetTickPrio(): Returns a tick priority.</li> |
| <li>HAL_SetTickFreq(): Sets new tick frequency.</li> |
| <li>HAL_GetTickFreq(): Returns tick frequency.</li> |
| </ul></li> |
| </ul></li> |
| <li>Add HAL_TickFreqTypeDef enumeration for the different Tick Frequencies: 10 Hz, 100 Hz and 1KHz (default).</li> |
| <li>Update UNUSED() macro implementation to avoid GCC warning |
| <ul> |
| <li>The warning is detected when the UNUSED() macro is called from C++ file</li> |
| </ul></li> |
| <li>Update __weak and __packed defined values for ARM compiler</li> |
| <li>Update __ALIGN_BEGIN and __ALIGN_END defined values for ARM compiler</li> |
| </ul></li> |
| <li><strong>HAL I2C</strong> update |
| <ul> |
| <li>Update Interface APIs headers to remove confusing message about device address</li> |
| <li>Update I2C_WaitOnRXNEFlagUntilTimeout() to resolve a race condition between STOPF and RXNE Flags</li> |
| <li>Update I2C_TransferConfig() to fix wrong bit management</li> |
| </ul></li> |
| <li><strong>HAL SMBUS</strong> update |
| <ul> |
| <li>Update conditions on HAL SMBUS slave transfer APIs to avoid block on read or write operations</li> |
| </ul></li> |
| <li><strong>HAL FLASH</strong> update |
| <ul> |
| <li>HAL_FLASH_Unlock() update to return state error when the FLASH is already unlocked</li> |
| </ul></li> |
| <li><strong>HAL PCD</strong> update |
| <ul> |
| <li>Update redefinition of registers with adjusted address by adding volatile keyword to avoid unexpected change of Memory-mapped peripheral registers</li> |
| </ul></li> |
| <li><strong>LL Drivers changes</strong></li> |
| <li><strong>LL ADC</strong> |
| <ul> |
| <li>Update redefinition of registers with adjusted address by adding volatile keyword to avoid unexpected change of Memory-mapped peripheral registers</li> |
| </ul></li> |
| <li><strong>LL DAC</strong> |
| <ul> |
| <li>Update redefinition of registers with adjusted address by adding volatile keyword to avoid unexpected change of Memory-mapped peripheral registers</li> |
| </ul></li> |
| <li><strong>LL HRTIM</strong> |
| <ul> |
| <li>Update redefinition of registers with adjusted address by adding volatile keyword to avoid unexpected change of Memory-mapped peripheral registers</li> |
| </ul></li> |
| <li><strong>LL I2C</strong> |
| <ul> |
| <li>Update LL_I2C_HandleTransfer() to fix wrong bit management</li> |
| </ul></li> |
| <li><strong>LL RCC</strong> |
| <ul> |
| <li>Fix wrong defined value of LSI</li> |
| </ul></li> |
| <li><strong>LL RTC</strong> |
| <ul> |
| <li>LL RTC macros optimization: |
| <ul> |
| <li>LL_RTC_TIME_GetHour()</li> |
| <li>LL_RTC_TIME_GetMinute()</li> |
| <li>LL_RTC_TIME_GetSecond()</li> |
| <li>LL_RTC_DATE_GetYear()</li> |
| <li>LL_RTC_DATE_GetMonth()</li> |
| <li>LL_RTC_DATE_GetDay()</li> |
| <li>LL_RTC_ALMA_GetDay()</li> |
| <li>LL_RTC_ALMA_GetHour()</li> |
| <li>LL_RTC_ALMA_GetMinute()</li> |
| <li>LL_RTC_ALMA_GetSecond()</li> |
| <li>LL_RTC_ALMB_GetDay()</li> |
| <li>LL_RTC_ALMB_GetHour()</li> |
| <li>LL_RTC_ALMB_GetMinute()</li> |
| <li>LL_RTC_ALMB_GetSecond()</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>LL SPI</strong> |
| <ul> |
| <li>Update LL_SPI_TransmitData8() and LL_SPI_TransmitData16() to fix compilation issues with GCC</li> |
| </ul></li> |
| <li><strong>LL TIM</strong> |
| <ul> |
| <li>Update redefinition of registers with adjusted address by adding volatile keyword to avoid unexpected change of Memory-mapped peripheral registers</li> |
| <li>Fix behavior of LL_TIM_IsEnabledUpdateEvent()</li> |
| </ul></li> |
| <li><strong>LL UTILS</strong> |
| <ul> |
| <li>Update LL_InitTick() to set SysTick_CTRL_TICKINT bit in SysTick->CTRL</li> |
| </ul></li> |
| </ul> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section1_5_0" aria-hidden="true"> <label for="collapse-section1_5_0" aria-hidden="true"><strong>V1.5.0 / 23-June-2017</strong></label> |
| <div> |
| <h2 id="main-changes-5">Main Changes</h2> |
| <ul> |
| <li><strong>Maintenance release to fix known defects and enhancements implementation</strong></li> |
| <li><strong>Generic drivers changes</strong></li> |
| <li>MISRA C 2004 rule 11.4 (A cast should not be performed between a pointer to object type and a different pointer to object type).</li> |
| <li>MISRA C 2004 rule 12.4 (The right-hand operand of a logical or I I operator shall not</li> |
| <li>contain side effects).</li> |
| <li>MISRA C 2004 rule 17.4 (Array indexing shall be the only allowed form of pointer arithmetic).</li> |
| <li>Remove uselesss cast (uint32_t ) cast in case of ‘U’ suffix.</li> |
| <li>Fix Code Sonar warnings (useless assignment, cast alters value, empty while statement …).</li> |
| <li>Minor improvement of Doxygen Tags for CHM UM generation.</li> |
| <li>Replace POSITION_VAL(xxx) macro by corresponding CMSIS_Pos definitions.</li> |
| <li><strong>HAL Drivers changes</strong></li> |
| <li><strong>The following changes done on the HAL drivers require an update on the application code based on HAL V1.4.0</strong> |
| <ul> |
| <li>HAL NAND driver: Overall driver rework with compatibility break versus previous HAL version (see below).</li> |
| </ul></li> |
| <li><strong>HAL</strong> |
| <ul> |
| <li>Correct RTC_PREDIV values (for LSI clock) in hal_timebase_rtc_alam_template.c and hal_timebase_rtc_wakeup_template.c</li> |
| <li>Add definition of USE_SPI_CRC in hal_conf_template.h</li> |
| <li>Modify HAL_Delay() function to guarantee minimum delay.</li> |
| <li>New API : HAL_GetUIDwx() read the unique device identifier word x.</li> |
| </ul></li> |
| <li><strong>HAL ADC</strong> |
| <ul> |
| <li>Remove unused literal ADC_EOC_SINGLE_SEQ_CONV.</li> |
| <li>Correct name of one ADC external trigger of regular group : ADC_EXTERNALTRIGCONV_T4_CC4.</li> |
| </ul></li> |
| <li><strong>HAL CAN</strong> |
| <ul> |
| <li>Add transmission abort when timeout is reached in HAL_CAN_Transmit().</li> |
| <li>Add management of overrun error.</li> |
| <li>Store missing FIFO number in received message.</li> |
| <li>Extend SET_BIT, CLEAR_BIT macro usage.</li> |
| <li>Allow possibility to receive messages from the 2 RX FIFOs in parallel via interrupt.</li> |
| <li>Fix message lost issue with specific sequence of transmit requests.</li> |
| </ul></li> |
| <li><strong>HAL COMP</strong> |
| <ul> |
| <li>COMP_WINDOWMODE literals clean-up according to family diversity.</li> |
| </ul></li> |
| <li><strong>HAL NAND</strong> |
| <ul> |
| <li>Overall driver rework in order to support NAND flash memories with higher capacities.</li> |
| <li>Add support of 16 bits addressing mode</li> |
| <li>API changes : |
| <ul> |
| <li>Add HAL_NAND_ConfigDevice() function</li> |
| <li>Split HAL_NAND_Read_Page(), HAL_NAND_Write_Page(), HAL_NAND_Read_SpareArea(), HAL_NAND_Write_SpareArea() in <em>8b and </em> 16b functions to select the proper addressing mode.</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL HRTIM</strong> |
| <ul> |
| <li>Modify __HAL_HRTIM_SETCLOCKPRESCALER macro to clear CKPSC and CKPSCx bits before setting new prescaler value.</li> |
| <li>Correct HRTIM_EVENTFASTMODE_DISABLE and HRTIM_EVENTFASTMODE_ENABLE defines.</li> |
| </ul></li> |
| <li><strong>HAL I2C</strong> |
| <ul> |
| <li>Editorial modification : astyle clean-up</li> |
| </ul></li> |
| <li><strong>HAL SMBUS</strong> |
| <ul> |
| <li>New API : Digital/Analog filter configuration with HAL_SMBUS_ConfigAnalogFilter() and HAL_SMBUS_ConfigDigitalFilter().</li> |
| </ul></li> |
| <li><strong>HAL PCD</strong> |
| <ul> |
| <li>Fix and Improve PCD_ReadPMA() API to prevent corrupting user buffer.</li> |
| <li>Minor changes in HAL_PCD_CLEAR_FLAG, PCD_CLEAR_TX/RX_EP_CTR macros.</li> |
| <li>Fix USB device remote wakeup issue.</li> |
| <li>USB PCD interrupt handler: remove useless usb device interrupts enable, already set during the pcd init.</li> |
| <li>Remove lock/unlock from USB receive and transmit endpoints.</li> |
| </ul></li> |
| <li><strong>HAL RTC</strong> |
| <ul> |
| <li>Correct RTC Time register initialization.</li> |
| </ul></li> |
| <li><strong>HAL SPI</strong> |
| <ul> |
| <li>Empty RXFIFO in case of end of MASTER transmission 2 lines.</li> |
| </ul></li> |
| <li><strong>HAL I2S</strong> |
| <ul> |
| <li>Fix full duplex I2S with circular DMA issues : |
| <ul> |
| <li>Don’t stop DMA at end of transfer</li> |
| <li>Solve synchroniszation issues between RX and TX.</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL TIM</strong> |
| <ul> |
| <li>Fix typo in __HAL_TIM_SET_PRESCALER macro.</li> |
| <li>Improvement of TIM DMA burst mode. Add 2 new API : |
| <ul> |
| <li>HAL_TIM_DMABurst_MultiWriteStart()</li> |
| <li>HAL_TIM_DMABurst_MultiReadStart()</li> |
| </ul></li> |
| <li>Add BRK2 (Break input 2 event) interrupt handler.</li> |
| <li>Update IRQ handler to use correct defines (TIM_FLAG_xxxx instead of TIM_IT_xxxx) to clear flag.</li> |
| </ul></li> |
| <li><strong>LL Drivers changes</strong></li> |
| <li><strong>LL ADC</strong> |
| <ul> |
| <li>Set TEMPSENSOR_CAL1_TEMP value to 30°C as specified in datasheet.</li> |
| </ul></li> |
| <li><strong>LL DMA</strong> |
| <ul> |
| <li>Replace SET_BIT macro by WRITE_REG in LL_DMA_ClearFlag_xxx() as DMA IFCR register is read only.</li> |
| <li>For better performances, CPAR and CMAR registers are updated by WRITE_REG macro instead of MODIFY_REG.</li> |
| </ul></li> |
| <li><strong>LL I2C</strong> |
| <ul> |
| <li>OA1EN bit of OAR1 register should be set only when own address different from 0 (0 reserved for General Call address).</li> |
| </ul></li> |
| <li><strong>LL RTC</strong> |
| <ul> |
| <li>Update LL_RTC_DATE_Get() function for better performances.</li> |
| </ul></li> |
| <li><strong>LL SPI</strong> |
| <ul> |
| <li>Remove LL_SPI_SR_UDR (available only for I2S feature).</li> |
| </ul></li> |
| <li><strong>LL_TIM</strong> |
| <ul> |
| <li>Add AutomaticOutput field initialization in LL_TIM_BDTR_StructInit().</li> |
| <li>Fix typo in __HAL_TIM_SET_PRESCALER macro.</li> |
| <li>Ensure write operation of BKE and BKP bits is effective by adding fake read operation to guarantee 1 APB clock cycle before function exit.</li> |
| <li>Exchange behavior between LL_TIM_EnableUpdateEvent() and LL_TIM_DisableUpdateEvent().</li> |
| </ul></li> |
| <li><strong>LL UTILS</strong> |
| <ul> |
| <li>Update function UTILS_EnablePLLAndSwitchSystem() to use current AHB prescaler for sysclk frequency calculation.</li> |
| </ul></li> |
| </ul> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section1_4_0" aria-hidden="true"> <label for="collapse-section1_4_0" aria-hidden="true"><strong>V1.4.0 / 16-December-2016</strong></label> |
| <div> |
| <h2 id="main-changes-6">Main Changes</h2> |
| <ul> |
| <li><strong>Maintenance release to fix known defects and enhancements implementation</strong></li> |
| <li><strong>HAL Drivers changes</strong></li> |
| <li>Enhance HAL delay and time base implementation: |
| <ul> |
| <li>Add new templates stm32f0xx_hal_timebase_rtc_alarm_template.c, stm32f0xx_hal_timebase_rtc_wakeup_template.c and stm32f0xx_hal_timebase_tim_template.c which can be used to override the native HAL time base functions (defined as weak) to use either RTC or Timer as time base tick source. For more details about the usage of these drivers, please refer to HAL_TimeBase examples and FreeRTOS-based applications</li> |
| </ul></li> |
| <li><strong>The following changes done on the HAL drivers require an update on the application code based on HAL V1.3.0</strong></li> |
| <li><em>HAL CEC</em> driver: Overall driver rework with compatibility break versus previous HAL version |
| <ul> |
| <li>Remove HAL CEC polling Process functions: HAL_CEC_Transmit() and HAL_CEC_Receive()</li> |
| <li>Remove HAL CEC receive interrupt process function HAL_CEC_Receive_IT() and enable the “receive” mode during the Init phase</li> |
| <li>Rename HAL_CEC_GetReceivedFrameSize() API to HAL_CEC_GetLastReceivedFrameSize()</li> |
| <li>Add new HAL APIs: HAL_CEC_SetDeviceAddress() and HAL_CEC_ChangeRxBuffer()</li> |
| <li>Remove the ‘InitiatorAddress’ field from the CEC_InitTypeDef structure and manage it as a parameter in the HAL_CEC_Transmit_IT() function</li> |
| <li>Add new parameter ‘RxFrameSize’ in HAL_CEC_RxCpltCallback() function</li> |
| <li>Move CEC Rx buffer pointer from CEC_HandleTypeDef structure to CEC_InitTypeDef structure</li> |
| </ul></li> |
| <li><em>HAL TIM</em> driver : add one field (AutoReloadPreload) in TIM_Base_InitTypeDef structure</li> |
| <li><strong>HAL Generic</strong> |
| <ul> |
| <li>Update HAL Driver compliance with: |
| <ul> |
| <li>MISRA C 2004 rule 10.6 (‘U’ suffix applied to all constants of ‘unsigned’ type)</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL CEC</strong> |
| <ul> |
| <li>Overall driver rework with break of compatibility with HAL V1.3.0 |
| <ul> |
| <li>Remove the HAL CEC polling Process: HAL_CEC_Transmit() and HAL_CEC_Receive()</li> |
| <li>Remove the HAL CEC receive interrupt process (HAL_CEC_Receive_IT()) and manage the “Receive” mode enable within the Init phase</li> |
| <li>Rename HAL_CEC_GetReceivedFrameSize() function to HAL_CEC_GetLastReceivedFrameSize() function</li> |
| <li>Add new HAL APIs: HAL_CEC_SetDeviceAddress() and HAL_CEC_ChangeRxBuffer()</li> |
| <li>Remove the ‘InitiatorAddress’ field from the CEC_InitTypeDef structure and manage it as a parameter in the HAL_CEC_Transmit_IT() function</li> |
| <li>Add new parameter ‘RxFrameSize’ in HAL_CEC_RxCpltCallback() function</li> |
| <li>Move CEC Rx buffer pointer from CEC_HandleTypeDef structure to CEC_InitTypeDef structure</li> |
| </ul></li> |
| <li>Update driver to implement the new CEC state machine: |
| <ul> |
| <li>Add new “rxState” field in CEC_HandleTypeDef structure to provide the CEC state information related to Rx Operations</li> |
| <li>Rename “state” field in CEC_HandleTypeDef structure to “gstate”: CEC state information related to global Handle management and Tx Operations</li> |
| <li>Update CEC process to manage the new CEC states.</li> |
| <li>Update __HAL_CEC_RESET_HANDLE_STATE() macro to handle the new CEC state parameters (gState, rxState)</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL UART/USART/IRDA/SMARTCARD</strong> |
| <ul> |
| <li>IRQ Handler global optimization</li> |
| <li>New abort API: HAL_PPP_Abort(), HAL_PPP_Abort_IT()</li> |
| <li>Add error management in case of DMA transfer through HAL_DMA_Abort_IT() and DMA XferAbortCallback()</li> |
| <li>Polling management update: |
| <ul> |
| <li>The user Timeout value must be estimated for the overall process duration</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL SPI</strong> |
| <ul> |
| <li>Overall driver optimization to improve performance in polling/interrupt mode to reach maximum peripheral frequency |
| <ul> |
| <li>Polling mode: |
| <ul> |
| <li>Replace the use of SPI_WaitOnFlagUnitTimeout() function by “if” statement to check on RXNE/TXE flags while transferring data</li> |
| </ul></li> |
| <li>Interrupt mode:</li> |
| <li>Minimize access on SPI registers</li> |
| <li>All modes: |
| <ul> |
| <li>Add the USE_SPI_CRC switch to minimize the number of statements when CRC calculation is disabled</li> |
| <li>Update timeout management to check on global processes</li> |
| <li>Update error code management in all processes</li> |
| </ul></li> |
| <li>Fix regression in polling mode: |
| <ul> |
| <li>Add preparing data to transmit in case of slave mode in HAL_SPI_TransmitReceive() and HAL_SPI_Transmit()</li> |
| </ul></li> |
| <li>Fix regression in interrupt mode: |
| <ul> |
| <li>Add a wait on TXE flag in SPI_CloseTx_ISR() and in SPI_CloseTxRx_ISR()</li> |
| <li>Add to manage properly the overrun flag in SPI_CloseRxTx_ISR() and SPI_CloseRx_ISR()</li> |
| </ul></li> |
| <li>Prevent data packing mode in reception for STM32F302xC, STM32F303xC, STM32F373xC, STM32F358xx, STM32F378xx</li> |
| <li>Add check of DMA handle definition before calling HAL_SPI_Receive_DMA, HAL_SPI_Transmit_DMA, HAL_SPI_TransmitReceive_DMA</li> |
| <li>Updated HAL Driver compliance with MISRA C 2004 rules: |
| <ul> |
| <li>MISRA C 2004 rule 14.3 (a null statement shall only occur on a line by itself).</li> |
| <li>MISRA C 2004 rule 14.8 (statement forming the body of a switch, while, do … while or for statement shall be a compound statement).</li> |
| </ul></li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL DMA</strong> |
| <ul> |
| <li>Global driver code optimization to reduce memory footprint</li> |
| <li>Add new APIs HAL_DMA_RegisterCallback() and HAL_DMA_UnRegisterCallback to register/unregister the different callbacks identified by the enum typedef HAL_DMA_CallbackIDTypeDef</li> |
| <li>Add new Error Code HAL_DMA_ERROR_NOT_SUPPORTED</li> |
| <li>Remove DMA HAL_DMA_STATE_READY_HALF & HAL_DMA_STATE_ERROR states in HAL_DMA_StateTypeDef</li> |
| </ul></li> |
| <li><strong>HAL I2C</strong> |
| <ul> |
| <li>Disable I2C_OARx_EN bit before any configuration in OAR1 or 2 in HAL_I2C_Init()</li> |
| <li>Move I2C_NO_OPTION_FRAME in private section</li> |
| <li>Update IS_I2C_FASTMODEPLUS macro. Add I2C_FMP_NOT_SUPPORTED definition</li> |
| <li>Update HAL_I2C_Master_Sequential_Transmit_IT() function (wrong state check)</li> |
| <li>Add I2C_FIRST_AND_NEXT_FRAME option for I2C Sequential Transfer</li> |
| <li>On slave, reset LISTEN_TX state in case of direction change</li> |
| <li>Remove GCC warnings</li> |
| </ul></li> |
| <li><strong>HAL TIM</strong> |
| <ul> |
| <li>API update : add one field (AutoReloadPreload) in TIM_Base_InitTypeDef structure in order to set ARPE bit from TIMx_CR1 register</li> |
| <li>New API : add 2 macros (__HAL_TIM_ENABLE_OCxPRELOAD() and __HAL_TIM_DISABLE_OCxPRELOAD()) in order to set OCxPE bit from TIMx_CCMR1, TIMx_CCMR2 and TIMx_CCMR3 registers</li> |
| <li>Use MODIFY_REG macro to avoid wrong initialisation in ConfigBreakDeadTime()</li> |
| <li>Add TIM1 ETR remap enums for STM32F334xx devices</li> |
| <li>HAL_TIMEx_RemapConfig() prototype changed for STM32F334x8 device</li> |
| <li>Remove TIM_CR2_OIS2N, TIM_CR2_OIS3, TIM_CR2_OIS3N, TIM_CR2_OIS4 management for STM32F373xC and STM32F378xx devices</li> |
| <li>API update : Add __HAL_TIM_MOE_DISABLE_UNCONDITIONALLY() function to disable MOE bit without condition</li> |
| </ul></li> |
| <li><strong>HAL SMBUS</strong> |
| <ul> |
| <li>Remove useless XferSize field initialisation in HAL_SMBUS_Slave_Transmit_IT()</li> |
| <li>Add support of Zone read/write feature thanks to new XferOptions parameter values SMBUS_OTHER_FRAME_NO_PEC, SMBUS_OTHER_FRAME_WITH_PEC, SMBUS_OTHER_AND_LAST_FRAME_NO_PEC and SMBUS_OTHER_AND_LAST_FRAME_WITH_PEC</li> |
| </ul></li> |
| <li><strong>HAL PCD</strong> |
| <ul> |
| <li>Updated HAL Driver compliance with MISRA C 2004 rules : (10.3, 105) |
| <ul> |
| <li>MISRA C 2004 rule 10.3 (illegal explicit conversion from underlying MISRA type “unsigned int” to "uint32_t *").</li> |
| <li>MISRA C 2004 rule 10.5 (bitwise operators ~ and <<).</li> |
| <li>MISRA C 2004 rule 12.7 (bitwise operations not performed on signed integer types).</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL PWR</strong> |
| <ul> |
| <li>Rename PWR_CR register defines to be aligned with STM32F3xx Reference Manual : SDADCxEN ==> ENSDx</li> |
| </ul></li> |
| <li><strong>HAL RCC</strong> |
| <ul> |
| <li>Rename RCC_CFGR register defines to be aligned with STM32F3xx Reference Manual : SDADCPRE ==> SDPRE</li> |
| </ul></li> |
| <li><strong>HAL CORTEX</strong> |
| <ul> |
| <li>Update HAL_MPU_Disable() to clear the whole control register. Also remove STATIC INLINE and move function to c file</li> |
| </ul></li> |
| <li><strong>HAL CAN</strong> |
| <ul> |
| <li>Add __HAL_UNLOCK() call when all mailboxes are busy</li> |
| <li>Add __HAL_CAN_CANCEL_TRANSMIT() call to abort transmission when timeout is reached</li> |
| </ul></li> |
| <li><strong>HAL ADC</strong> |
| <ul> |
| <li>Add ADC_EXTERNALTRIGINJECCONV_T2_CC1 and ADC_EXTERNALTRIGINJECCONV_T2_TRGO definitions</li> |
| </ul></li> |
| <li><strong>LL Drivers changes</strong></li> |
| <li><strong>LL COMP</strong> |
| <ul> |
| <li>Creation of generic defines for defines specific to COMP instances</li> |
| <li>Modify definition of LL_COMP_OUTPUT_TIM4_IC2_COMP4, LL_COMP_OUTPUT_TIM4_IC3_COMP5 and LL_COMP_OUTPUT_TIM4_IC4_COMP6 literals</li> |
| <li>Rename LL_COMP_OUTPUT_TIM1_IC4_COMP2 and LL_COMP_OUTPUT_TIM1_IC4_COMP1_2 in LL_COMP_OUTPUT_TIM2_IC4_COMP2 and LL_COMP_OUTPUT_TIM2_IC4_COMP1_2</li> |
| <li>Correct COMP inputs definition</li> |
| </ul></li> |
| <li><strong>LL EXTI</strong> |
| <ul> |
| <li>Move LL_EXTI_LINE_18, LL_EXTI_LINE_33, LL_EXTI_LINE_34, LL_EXTI_LINE_35, LL_EXTI_LINE_36, LL_EXTI_LINE_37, LL_EXTI_LINE_38 and LL_EXTI_LINE_39 defines under compilation switch (availability depends on devices)</li> |
| </ul></li> |
| <li><strong>LL PWR</strong> |
| <ul> |
| <li>Rename PWR_CR register defines to be aligned with STM32F3xx Reference Manual : SDADCxEN ==> ENSDx</li> |
| </ul></li> |
| <li><strong>LL RCC</strong> |
| <ul> |
| <li>Rename RCC_CFGR register defines to be aligned with STM32F3xx Reference Manual : SDADCPRE ==> SDPRE</li> |
| </ul></li> |
| <li><strong>LL SYSTEM</strong> |
| <ul> |
| <li>Add LL_SYSCFG_EnableIT_FPU_xxx functions</li> |
| <li>Replace LL_SYSCFG_TIM18_RMP_DMA2_CH4 and LL_SYSCFG_TIM18_RMP_DMA1_CH4 by LL_SYSCFG_TIM18_RMP_DMA2_CH5 and LL_SYSCFG_TIM18_RMP_DMA1_CH5</li> |
| </ul></li> |
| <li><strong>LL GPIO</strong> |
| <ul> |
| <li>Remove LL_GPIO_SPEED_FREQ_VERY_HIGH (GPIO_SPEED_FREQ_VERY_HIGH does not exist for STM32F3xx series)</li> |
| </ul></li> |
| <li><strong>LL_TIM</strong> |
| <ul> |
| <li>Rename LL_TIM_TIM16_TI1_RMP defines : LL_TIM_TIM16_TI1_RMP_GPIO, LL_TIM_TIM16_TI1_RMP_RTC, LL_TIM_TIM16_TI1_RMP_HSE_32, LL_TIM_TIM16_TI1_RMP_MCO</li> |
| <li>Remove TIM_CR2_OIS2N, TIM_CR2_OIS3, TIM_CR2_OIS3N, TIM_CR2_OIS4 management for STM32F373xC and STM32F378xx devices</li> |
| <li>Move LL_TIM_OCREF_CLR_INT_OCREF_CLR and LL_TIM_OCREF_CLR_INT_ETR defines under compilation switch (availability depends on devices)</li> |
| <li>New APIs to insure BDTR register initialization in a single write operation |
| <ul> |
| <li>LL_TIM_BDTR_StructInit()</li> |
| <li>LL_TIM_BDTR_Init()</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>LL USART</strong> |
| <ul> |
| <li>Replace POSITION_VAL(xxx) macro by corresponding CMSIS_Pos definitions</li> |
| </ul></li> |
| <li><strong>LL HRTIM</strong> |
| <ul> |
| <li>Replace POSITION_VAL(xxx) macro by corresponding CMSIS_Pos definitions</li> |
| <li>Add shift operation in HRTIM_TIM_SetCompareMode()</li> |
| </ul></li> |
| <li><strong>LL_I2C</strong> |
| <ul> |
| <li>Replace POSITION_VAL(xxx) macro by corresponding CMSIS_Pos definitions</li> |
| </ul></li> |
| </ul> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section1_3_0" aria-hidden="true"> <label for="collapse-section1_3_0" aria-hidden="true"><strong>V1.3.0 / 01-July-2016</strong></label> |
| <div> |
| <h2 id="main-changes-7">Main Changes</h2> |
| <ul> |
| <li><strong>First official release supporting the Low Level drivers for the STM32F3xx series:</strong> |
| <ul> |
| <li>Low Layer drivers APIs provide register level programming:</li> |
| <li>they require deep knowledge of peripherals described in STM32F3xx Reference Manual.</li> |
| <li>Low Layer drivers are available for ADC, COMP, Cortex, CRC, DAC, DMA, EXTI, GPIO, HRTIM, I2C, IWDG, OPAMP, PWR,</li> |
| <li>RCC, RTC, SPI, TIM, USART and WWDG peripherals and additional Low Level Bus, System and Utilities APIs.</li> |
| <li>Low Layer drivers APIs are implemented as static inline function in new Inc/stm32f3xx_ll_ppp.h files for PPP peripherals, there is no configuration file and each stm32f3xx_ll_ppp.h file must be included in user code.</li> |
| </ul></li> |
| <li><strong>Maintenance release to fix known defects and enhancements implementation.</strong></li> |
| <li><strong>HAL generic</strong> |
| <ul> |
| <li>Updated.</li> |
| </ul></li> |
| <li><strong>HAL ADC</strong> |
| <ul> |
| <li>Updated assert_param within HAL_ADCEx_MultiModeConfigChannel() function to avoid issue during ADC configuration change from multimode to independent mode.</li> |
| </ul></li> |
| <li><strong>HAL CRC</strong> |
| <ul> |
| <li>Updated HAL_CRC_DeInit() function (restored IDR Register to Reset value).</li> |
| </ul></li> |
| <li><strong>HAL GPIO</strong> |
| <ul> |
| <li>Updated definition of IS_GPIO_PIN private macro to cover full u32 bits.</li> |
| </ul></li> |
| <li><strong>HAL HRTIM</strong> |
| <ul> |
| <li>Updated HAL HRTIM Driver compliance with MISRA C 2004 rules: |
| <ul> |
| <li>MISRA C 2004 rule 12.5 (operands of a logical && or || shall be primary-expressions).</li> |
| <li>MISRA C 2004 rule 15.3 (final clause of a switch statement shall be the default clause).</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL I2C</strong> |
| <ul> |
| <li>Updated I2C driver documentation concerning I2C address management.</li> |
| </ul></li> |
| <li><strong>HAL IWDG</strong> |
| <ul> |
| <li>New simplified HAL IWDG driver: removed HAL_IWDG_Start(), HAL_IWDG_MspInit() and HAL_IWDG_GetState() APIs.</li> |
| <li>The API functions are: |
| <ul> |
| <li>HAL_IWDG_Init(): this function insures the configuration and the start of the IWDG counter.</li> |
| <li>HAL_IWDG_Refresh(): this function insures the reload of the IWDG counter.</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL PWR</strong> |
| <ul> |
| <li>Aligned Power Wake-Up pins EWUPx definitions on CMSIS definitions.</li> |
| </ul></li> |
| <li><strong>HAL RTC</strong> |
| <ul> |
| <li>Updated HAL_RTCEx_SetWakeUpTimer_IT() function by adding clear of Wake-Up flag before enabling the interrupt.</li> |
| </ul></li> |
| <li><strong>HAL SMBUS</strong> |
| <ul> |
| <li>Updated SMBUS driver documentation concerning SMBUS address management.</li> |
| </ul></li> |
| <li><strong>HAL SDADC</strong> |
| <ul> |
| <li>Updated HAL SDADC Driver compliance with MISRA C 2004 rules: |
| <ul> |
| <li>MISRA C 2004 rule 10.3 (illegal explicit conversion from type “unsigned int” to "uint16_t *).</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL SPI</strong> |
| <ul> |
| <li>Updated __SPI_HandleTypeDef definition by using __IO uint16_t type for TxXferCount and RxXferCount.</li> |
| <li>Updated SPI_2linesTxISR_8BIT() and SPI_2linesTxISR_16BIT() functions: added return so that SPI_2linesTxISR_8BITCRC() or SPI_2linesTxISR_16BITCRC() function is called from HAL_SPI_TransmitReceive_IT() when CRC is activated.</li> |
| <li>Updated SPI Driver compliance with MISRA C 2004 rule 5.2 (identifiers in an inner scope shall not use the same name as an identifier in an outer scope).</li> |
| </ul></li> |
| <li><strong>HAL WWDG</strong> |
| <ul> |
| <li>New simplified HAL WWDG driver: removed HAL_WWDG_Start(), HAL_WWDG_Start_IT(), HAL_WWDG_MspDeInit() and HAL_WWDG_GetState() APIs.</li> |
| <li>Updated HAL_WWDG_Refresh() API to remove counter parameter.</li> |
| <li>New field EWIMode in WWDG_InitTypeDef to specify need for Early Wakeup Interrupt.</li> |
| <li>The API functions are: HAL_WWDG_Init(), HAL_WWDG_MspInit(), HAL_WWDG_Refresh(), HAL_WWDG_IRQHandler() and HAL_WWDG_EarlyWakeupCallback().</li> |
| </ul></li> |
| </ul> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section1_2_1" aria-hidden="true"> <label for="collapse-section1_2_1" aria-hidden="true"><strong>V1.2.1 / 29-April-2016</strong></label> |
| <div> |
| <h2 id="main-changes-8">Main Changes</h2> |
| <ul> |
| <li><strong>Maintenance release to fix known defects and enhancements implementation.</strong></li> |
| <li><strong>HAL generic</strong> |
| <ul> |
| <li>Updated HAL Driver compliance with MISRA C 2004 rules: |
| <ul> |
| <li>MISRA C 2004 rule 10.6 (‘U’ suffix applied to all constants of ‘unsigned’ type).</li> |
| <li>MISRA C 2004 rule 10.5 (bitwise operators ~ and <<).</li> |
| <li>MISRA C 2004 rule 12.6 (operands of logical operators (&&, || and !) should be effectively Boolean).</li> |
| <li>MISRA C 2004 rule 12.7 (bitwise operations not performed on signed integer types).</li> |
| <li>MISRA C 2004 rule 14.3 (a null statement shall only occur on a line by itself).</li> |
| <li>MISRA C 2004 rule 14.8 (statement forming the body of a switch, while, do … while or for statement shall be a compound statement).</li> |
| <li>MISRA C 2004 rule 15.3 (final clause of a switch statement shall be the default clause).</li> |
| <li>MISRA C 2004 rule 16.4 (identifiers used in the declaration and definition of a function shall be identical).</li> |
| </ul></li> |
| <li>Updated HAL weak empty callbacks to prevent unused argument compilation warnings.</li> |
| <li>Updated stm32f3xx_hal_conf.h files:</li> |
| <li>Set HSE_STARTUP_TIMEOUT value to 100ms instead of 5000ms.</li> |
| </ul></li> |
| <li><strong>HAL</strong> |
| <ul> |
| <li>Changed uwTick to global to allow overwrite of HAL_IncTick().</li> |
| </ul></li> |
| <li><strong>HAL COMP</strong> |
| <ul> |
| <li>Added delay in COMP startup time required to reach propagation delay specification.</li> |
| <li>Added missing __HAL_UNLOCK, __HAL_LOCK in HAL_COMP_Start().</li> |
| <li>Modified COMP_INVERTINGINPUT_SELECTION() macro as COMP inverting inputs selection, depends on COMPx instance.</li> |
| </ul></li> |
| <li><strong>HAL DAC</strong> |
| <ul> |
| <li>Updated DAC functions after DAC_CR_BOFFx/DAC_CR_OUTENx bit definition updates.</li> |
| </ul></li> |
| <li><strong>HAL DMA</strong> |
| <ul> |
| <li>Added __HAL_DMA_GET_COUNTER() macro returning the number of remaining data units in the current DMA Channel transfer.</li> |
| <li>Provided new function HAL_DMA_Abort_IT() to abort current DMA transfer under interrupt mode without polling for DMA enable bit.</li> |
| </ul></li> |
| <li><strong>HAL GPIO</strong> |
| <ul> |
| <li>Added macros to manage Fast Mode Plus on GPIOs.</li> |
| </ul></li> |
| <li><strong>HAL FMC</strong> |
| <ul> |
| <li>Removed private macro IS_FMC_PAGESIZE not supported by STM32F3xx series.</li> |
| </ul></li> |
| <li><strong>HAL I2C</strong> |
| <ul> |
| <li>Aligned I2C driver with new state machine definition.</li> |
| <li>Updated __HAL_I2C_DISABLE_IT macro.</li> |
| <li>Used macro definition for I2C instances supporting Wakeup from Stop mode.</li> |
| <li>Added support of repeated start feature in case of multimaster mode (allow master to keep I2C communication with slave).</li> |
| <li>Updated WaitOnFlag management (timeout measurement should be always cumulative).</li> |
| <li>Optimized HAL_I2C_XX_IRQHandler() functions (read status registers only once).</li> |
| <li>Reworked DMA end process and I2C error management during DMA transfer.</li> |
| <li>Modified HAL_I2C_Master_Transmit to handle sending data of size 0.</li> |
| <li>Updated DMA Abort management: used new HAL_DMA_Abort() function and called HAL_I2C_ErrorCallback() when errors occur during DMA transfer.</li> |
| </ul></li> |
| <li><strong>HAL I2S</strong> |
| <ul> |
| <li>Removed support of I2S full-duplex feature on STM32F301x8 device.</li> |
| </ul></li> |
| <li><strong>HAL IRDA</strong> |
| <ul> |
| <li>Reviewed IRDA state machine to avoid cases where IRDA state is overwritten by IRDA IRQ.</li> |
| <li>Modified EIE bit setting in Tx and Rx transfers (Interrupt mode).</li> |
| <li>Modified IRDA_Receive_IT() to execute the RX flush request only in case no data is read from RDR.</li> |
| <li>Updated IRDA_SetConfig() function following UART Baudrate calculation update.</li> |
| </ul></li> |
| <li><strong>HAL FMC</strong> |
| <ul> |
| <li>Updated FMC_NORSRAM_Init() function (BurstAccessMode field configuration).</li> |
| <li>Added FMC_BCR1_CCLKEN in the BCR register clear mask used for FMC_NORSRAM_Init().</li> |
| </ul></li> |
| <li><strong>HAL OPAMP</strong> |
| <ul> |
| <li>Updated definitions of OPAMP Non Inverting Input constants.</li> |
| </ul></li> |
| <li><strong>HAL RCC</strong> |
| <ul> |
| <li>Performed optimizations for internal oscillators and PLL startup time.</li> |
| <li>Performed optimizations for HAL_RCC_ClockConfig(), HAL_RCCEx_PeriphCLKConfig functions.</li> |
| <li>Modified reset of Backup domain only if the RTC Clock source selection is modified from reset value.</li> |
| <li>Updated HAL_RCC_OscConfig() function (Reset HSEON/LSEON and HSEBYP/LSEBYP bits before configuring the HSE/LSE).</li> |
| <li>Corrected updates of SystemCoreClock variable within the HAL drivers.</li> |
| <li>Corrected invertion in LSE drive capability Bit definition.</li> |
| <li>Modified AHBPrescTable and APBPrescTable in HAL.</li> |
| <li>Removed RCC_CFGR_PLLNODIV bit definition from STM32F358xx, STM32F303xC and STM32F302xC devices.</li> |
| <li>Removed RCC_CSR_VREGRSTF bit definition in RCC_CSR register for STM32F303xC and STM32F303xE devices.</li> |
| <li>Removed USART2 and USART3 clock switch in RCC_CFGR3 register not supported by STM32F303x8, STM32F334x8</li> |
| <li>and STM32F328xx devices and for STM32F301x8, STM32F302x8 and STM32F318xx devices.</li> |
| <li>Removed RCC_CSR_V18PWRRSTF bit definition in RCC_CSR register not supported by STM32F318xx, STM32F328xx, STM32F358xx, STM32F378xx and STM32F398xx devices.</li> |
| <li>Removed flag RCC_FLAG_RMV which is write only.</li> |
| <li>Added RCC_CFGR_xxxx_BITNUMBER definitions for portability between STM32 series.</li> |
| <li>Updated HAL_RCC_OscConfig() function to enable PWR only if necessary for LSE configuration.</li> |
| </ul></li> |
| <li><strong>HAL RTC</strong> |
| <ul> |
| <li>Added missing Tamper definitions (RTC_TAFCR register).</li> |
| </ul></li> |
| <li><strong>HAL SMARTCARD</strong> |
| <ul> |
| <li>Reviewed SMARTCARD state machine to avoid cases where SMARTCARD state is overwritten by SMARTCARD IRQ.</li> |
| <li>Modified SMARTCARD_Receive_IT() to execute the RX flush request only in case no data is read from RDR.</li> |
| <li>Added SMARTCARD_STOPBITS_0_5 definition used for smartcard mode.</li> |
| <li>Updated SMARTCARD_SetConfig() function following UART Baudrate calculation update.</li> |
| </ul></li> |
| <li><strong>HAL SPI</strong> |
| <ul> |
| <li>Updated HAL_SPI_TransmitReceive() function in slave mode to receive correctly the CRC when NSS pulse activated.</li> |
| <li>Added missing __IO in SPI_HandleTypeDef definition.</li> |
| <li>Updated IS_SPI_CRC_POLYNOMIAL macro definition as polynomial value should be odd only.</li> |
| </ul></li> |
| <li><strong>HAL TIM</strong> |
| <ul> |
| <li>Updated HAL_TIM_ConfigOCrefClear() function to manage correctly TIM state (BUSY, READY).</li> |
| <li>Used IS_TIM_HALL_INTERFACE_INSTANCE macro instead of IS_TIM_XOR_INSTANCE macro in</li> |
| <li>HAL_TIMEx_HallSensor_xxx() functions.</li> |
| <li>Updated TIM_SLAVEMODE constants definitions using CMSIS bit definitions.</li> |
| </ul></li> |
| <li><strong>HAL TSC</strong></li> |
| <li>Updated IO default state management.</li> |
| <li><strong>HAL UART-USART</strong> |
| <ul> |
| <li>Updated UART Baudrate calculation (UART_DIV_SAMPLING8() and UART_DIV_SAMPLING16() macros).</li> |
| <li>Updated USART_SetConfig() function following UART Baudrate calculation update.</li> |
| <li>Reviewed UART state machine to avoid cases where UART state is overwritten by UART IRQ.</li> |
| <li>Removed USART2 and USART3 clock switch, not supported by STM32F303x8, STM32F334x8 and STM32F328xx devices and for STM32F301x8, STM32F302x8 and STM32F318xx devices.</li> |
| <li>Modified UART_Receive_IT() to execute the RX flush request only in case no data is read from RDR.</li> |
| <li>Corrected macro used in assert_param of HAL_LIN_SendBreak() function.</li> |
| <li>Added UART_STOPBITS_0_5/USART_STOPBITS_0_5 definitions used for synchronous mode.</li> |
| </ul></li> |
| <li><strong>HAL USB</strong> |
| <ul> |
| <li>Corrected double buffer implementation in PCD_SET_EP_DBUF1_CNT() macro.</li> |
| </ul></li> |
| <li><strong>HAL WWDG</strong> |
| <ul> |
| <li>Aligned WWDG registers bits naming between all STM32 series.</li> |
| </ul></li> |
| </ul> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section1_2_0" aria-hidden="true"> <label for="collapse-section1_2_0" aria-hidden="true"><strong>V1.2.0 / 13-November-2015</strong></label> |
| <div> |
| <h2 id="main-changes-9">Main Changes</h2> |
| <ul> |
| <li><strong>Performed HAL API alignment (macros/functions/constants renaming).</strong></li> |
| <li><strong>HAL generic</strong> |
| <ul> |
| <li>Provided/updated User Manual CHM files for STM32F334x8, STM32F373xC, STM32F303xC devices.</li> |
| <li>Updated HAL drivers to ensure compliance w/ C++.</li> |
| <li>Made corrections for MISRA rule: bitwise operators ~ and << (MISRA C 2004 rule 10.5).</li> |
| <li>Used CMSIS mask definitions instead of hardcoded values.</li> |
| <li>Removed all the unused FLAG and IT assert macros.</li> |
| <li>Initialized Handle lock to HAL_UNLOCKED in HAL_PPP_Init() when state == HAL_PPP_STATE_RESET.</li> |
| <li>Updated stm32f3xx_hal_msp.c files: |
| <ul> |
| <li>Removed reference to MicroXplorer.</li> |
| </ul></li> |
| <li>Updated stm32f3xx_hal_conf.h files: |
| <ul> |
| <li>Added LSE_STARTUP_TIMEOUT definition.</li> |
| </ul></li> |
| <li>Updated stm32f3xx_hal_def.h file: |
| <ul> |
| <li>Added some generic defines (__NOINLINE).</li> |
| <li>Removed NULL redefinition.</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL ADC</strong> |
| <ul> |
| <li>Updated HAL ADC state machine updated. States changed from fixed literals to bitfields.</li> |
| <li>Added 3 new HAL ADC functions: HAL_ADCEx_RegularStop(), HAL_ADCEx_RegularStop_IT(), HAL_ADCEx_RegularStop_DMA(), to perform a ADC group regular conversion stop</li> |
| <li>while ADC group injected can remain with conversion on going.</li> |
| <li>Added 2 new HAL ADC functions: HAL_ADCEx_LevelOutOfWindow2Callback(), HAL_ADCEx_LevelOutOfWindow3Callback().</li> |
| <li>The 3 analog watchdog has its own callback function (AWD1 callback function is unchanged with HAL_ADC_LevelOutOfWindowCallback()).</li> |
| <li>Updated ADC multimode (for devices with several ADC instances).</li> |
| <li>Now takes into account mixed configuration: ADC group regular in multimode, ADC group injected in independent mode (and the opposite).</li> |
| <li>Updated ADC group injected use case when used with feature low power “auto-wait”:</li> |
| <li>updated function HAL_ADCEx_InjectedGetValue() which don’t clear anymore ADC flag EOS, and could cause some issues when using ADC group injected with high sampling rate.</li> |
| </ul></li> |
| <li><strong>HAL CAN</strong> |
| <ul> |
| <li>Added __HAL_UNLOCK(hcan) macro.</li> |
| <li>Modified CanTxMsgTypeDef/CanRxMsgTypeDef structures Data field.</li> |
| <li>Removed assert_param(IS_CAN_BANKNUMBER(sFilterConfig->BankNumber)) from HAL_CAN_ConfigFilter().</li> |
| </ul></li> |
| <li><strong>HAL CEC</strong> |
| <ul> |
| <li>Changed the HAL_CEC_ErrorTypeDef structure by separate defines.</li> |
| <li>Added CEC Flags Definitions(CEC_FLAG_TXACKE,…).</li> |
| <li>Add CEC Interrupts Definitions(CEC_IT_TXACKE,…).</li> |
| <li>Renamed CEC_ISR_XXX to CEC_FLAG_XXX.</li> |
| <li>Renamed CEC_IER_XXX to CEC_IT_XXX.</li> |
| <li>Added missing assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance)); in In HAL_CEC_Init().</li> |
| <li>Added devices that supports CEC in device.h files.</li> |
| <li>Updated CEC Ready To Receive State in CEC_Transmit_IT().</li> |
| <li>Added new API HAL_CEC_GetReceivedFrameSize to get size of the received frame.</li> |
| </ul></li> |
| <li><strong>HAL COMP</strong> |
| <ul> |
| <li>Updated COMPEx_Output comment description and added test on instances.</li> |
| <li>Updated HAL_COMP_DeInit() to handle LOCKED state.</li> |
| <li>Added missing defines for COMP window mode (Sunfish).</li> |
| </ul></li> |
| <li><strong>HAL CORTEX</strong> |
| <ul> |
| <li>Removed __HAL_CORTEX_SYSTICKCLK_CONFIG macro, replaced by HAL_SYSTICK_CLKSourceConfig() function.</li> |
| <li>Added new CORTEX MPU APIs: HAL_MPU_ConfigRegion(), HAL_MPU_Disable(),HAL_MPU_Enable().</li> |
| <li>Added APIs to manage set/reset of SLEEPONEXIT and SEVONPEND bits in SCR register.</li> |
| <li>Added a check on negative parameter values for HAL_NVIC_DisableIRQ()/HAL_NVIC_EnableIRQ() functions.</li> |
| </ul></li> |
| <li><strong>HAL CRC</strong> |
| <ul> |
| <li>Updated CRC APIs comments.</li> |
| <li>Fixed MISRA C 2004 warnings (except 114, 12.4 and 14.7).</li> |
| <li>Updated __HAL_CRC_SET_IDR macro.</li> |
| </ul></li> |
| <li><strong>HAL DAC</strong> |
| <ul> |
| <li>Update HAL_DACEx_NoiseWaveGenerate() and HAL_DACEx_TriangleWaveGenerate() to reset DAC CR register before setting the new DAC config.</li> |
| <li>Added DAC_OUTPUTSWITCH_ENABLE constant.</li> |
| </ul></li> |
| <li><strong>HAL DMA</strong> |
| <ul> |
| <li>Reviewed HAL_DMA_PollForTransfer(). Added error code.</li> |
| </ul></li> |
| <li><strong>HAL FLASH/FMC</strong> |
| <ul> |
| <li>Added FLASH API HAL_FLASHEx_OBGetUserData() to get the value saved in User data option byte.</li> |
| <li>Aligned Return value of HAL_FLASH_EndOfOperationCallback function (0xFFFFFFF) when process is finished.</li> |
| <li>Updated function FLASH_OB_GetRDP() return value (FlagStatus (RESET,SET)).</li> |
| <li>Corrected way to set Flash read protection by performing an automatic option byte erase in FLASH_OB_RDP_LevelConfig function.</li> |
| <li>Updated Disable WRP to be compliant with other families.</li> |
| <li>Removed double definition of IS_OB_SDACD_VDD_MONITOR.</li> |
| <li>Added missing macro __HAL_FLASH_GET_LATENCY.</li> |
| <li>Corrected IS_OPTIONBYTE() macro in the case all option_OB are selected.</li> |
| <li>Updated HAL_NOR_GetStatus() (missing exit from waiting loop when timeout occurred).</li> |
| <li>Reviewed __ARRAY_ADDRESS macro and adapted tests to detect bad blocks.</li> |
| <li>Updated FMC_NORSRAM_Init()/FSMC_NORSRAM_Init() in order to not modify the default values for the reserved bits in the BTCR register.</li> |
| </ul></li> |
| <li><strong>HAL GPIO</strong> |
| <ul> |
| <li>Updated GPIO Output Speed literals naming to ensure HAL full compatibility.</li> |
| <li>Added only one define BSRR for BSRRH/BSRRL register.</li> |
| <li>Fixed issue to ensure interrupt mode is reset.</li> |
| <li>Reworked GPIO_GET_SOURCE() in order to check only existing GPIO bank.</li> |
| <li>Add new macro IS_GPIO_AF_INSTANCE to protect GPIO banks without alternate function register from being initialized as AF.</li> |
| </ul></li> |
| <li><strong>HAL HRTIM</strong> |
| <ul> |
| <li>Corrected bit definition for HRTIM_MCMPxR registers.</li> |
| <li>Corrected naming for delayed protection related constants.</li> |
| <li>Added missing assert in HAL_HRTIM_BurstModeConfig().</li> |
| <li>Added missing macros __HAL_FREEZE_ HRTIM1_DBGMCU(), __HAL_UNFREEZE_ HRTIM1_DBGMCU () to stop the HRTIM when the core is halted (to control the DBGMCU_APB2_FZ.DBG_HRTIM1_STOP bitfield).</li> |
| </ul></li> |
| <li><strong>HAL I2C</strong> |
| <ul> |
| <li>Corrected wrong management of AF after NACK.</li> |
| <li>Renamed I2C_CR1_DFN to I2C_CR1_DNF.</li> |
| <li>Corrected management of I2C state in the function I2C_MasterTransmit_ISR().</li> |
| <li>Re-introduced the MACROs to manage the FM+ capapbility on some GPIOs.</li> |
| </ul></li> |
| <li><strong>HAL I2S</strong> |
| <ul> |
| <li>Added DMA circular mode support for the communication peripherals.</li> |
| <li>Updated I2S HAL_I2S_Transmit() API on busy flag.</li> |
| </ul></li> |
| <li><strong>HAL IRDA</strong> |
| <ul> |
| <li>Added DMA circular mode support for the communication peripherals.</li> |
| <li>Implemented __HAL_UART_FLUSH_DRREGISTER macro, required by the In-Application Programming (IAP)</li> |
| <li>using the USART application.</li> |
| <li>Used new macro IS_UART_DMA_INSTANCE in assert_param() calls for IRDA DMA related primitives.</li> |
| <li>Changed UART TX-IT implementation to remove WaitOnFlag in ISR.</li> |
| <li>Fixed issue in IRDA DMA implementation: missed clear of the TC bit in the SR register.</li> |
| <li>Corrected definition of IS_IRDA_REQUEST_PARAMETER macro.</li> |
| <li>Modified Time Out management: report state READY instead of TIMEOUT.</li> |
| <li>Time-out information is reported by function output parameter.</li> |
| <li>Corrected PCLK source for USART1.</li> |
| </ul></li> |
| <li><strong>HAL OPAMP</strong> |
| <ul> |
| <li>Updated HAL_OPAMP_DeInit() to handle LOCKED state.</li> |
| <li>Added __HAL_UNLOCK in HAL_OPAMP_DeInit.</li> |
| <li>Removed InvertingInput ASSERT in HAL_OPAMP_Init() as it is not needed in PGA mode.</li> |
| <li>Updated definition of OPAMP_CSR_UPDATE_PARAMETERS_INIT_MASK in OPAMP Init.</li> |
| </ul></li> |
| <li><strong>HAL PWR</strong> |
| <ul> |
| <li>Fixed MISRA C 2004 warnings, resort to reference SET_BIT, CLEAR_BIT macros.</li> |
| <li>Updated Device information when missing, systematically added USE_FULL_ASSERT compilation switch.</li> |
| <li>Added local variables addition to suppress warnings.</li> |
| <li>Removed useless regulator parameter setting in HAL_PWR_EnterSLEEPMode().</li> |
| </ul></li> |
| <li><strong>HAL RCC</strong> |
| <ul> |
| <li>Renamed RCC_CFGR3_USART1SW_PCLK to RCC_CFGR3_USART1SW_PCLKx according to devices.</li> |
| <li>Added missing flag for RCC_CSR_VREGRSTF bit.</li> |
| <li>Added missing flag for RCC_CFGR_MCOF feature.</li> |
| <li>Added missing macro __HAL_RCC_LSEDRIVE_CONFIG.</li> |
| <li>Renamed IS_RCC_PERIPHCLK to IS_RCC_PERIPHCLOCK.</li> |
| <li>Renamed __HAL_RCC_MCO_CONFIG to __HAL_RCC_MCO1_CONFIG.</li> |
| <li>Updated RCC APIs to add interface HAL_RCCEx_GetPeriphCLKFreq.</li> |
| <li>Implemented workaround to cover RCC limitation regarding Peripheral enable delay.</li> |
| <li>Modified HAL_RCCEx_PeriphCLKConfig to reset backup domain only if RTC clock source has been changed.</li> |
| <li>Reworked __HAL_RCC_LSE_CONFIG macro to manage correctly LSE_Bypass.</li> |
| <li>Followed specific procedure to enable HSE.</li> |
| <li>Updated HAL_RCC_OscConfig() to modify check on LSEState.</li> |
| <li>Added PLL_DIV1 define missing from the RCC_MCO_Clock_Source defgroup.</li> |
| <li>Added new macro __HAL_RCC_IS_PWR_CLOCK_ENABLED() to replace condition on Peripheral Clock enable status.</li> |
| <li>Added new macro __HAL_RCC_SYSCLK_CONFIG() to configure the SYSCLK clock source.</li> |
| <li>Fixed issue in HAL_RCC_OscConfig when RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS.</li> |
| </ul></li> |
| <li><strong>HAL RTC(BKP)</strong> |
| <ul> |
| <li>Updated list of backup registers definition.</li> |
| <li>Updated Bits mask literals used in macros definition.</li> |
| <li>Renamed RTC_OUTPUT_REMAP_XX and RTC_TIMESTAMPPIN_XX macros.</li> |
| <li>Updated definition of __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GET_FLAG.</li> |
| <li>Aligned different implementations of HAL_RTC_XXIRQHandler().</li> |
| <li>Check the behavior of flag WUTWF and corrected update of wakeup counter registers.</li> |
| <li>Added subsecond fration formula in HAL_RTC_GetTime() function.</li> |
| </ul></li> |
| <li><strong>HAL SDADC</strong> |
| <ul> |
| <li>Applied ReferenceVoltage parameter in HAL_SDADC_Init() wathever instance.</li> |
| <li>Added new macros __HAL_SDADC_ENABLE_IT(), __HAL_SDADC_GET_IT_SOURCE(), __HAL_SDADC_GET_FLAG().</li> |
| </ul></li> |
| <li><strong>HAL SMARTCARD</strong> |
| <ul> |
| <li>Implemented __HAL_UART_FLUSH_DRREGISTER macro, required by the In-Application Programming (IAP)</li> |
| <li>using the USART application.</li> |
| <li>Changed UART TX-IT implementation to remove WaitOnFlag in ISR.</li> |
| <li>Added missing IDLE flag management.</li> |
| <li>Modified Time Out management: report state READY instead of TIMEOUT.</li> |
| <li>Time-out information is reported by function output parameter.</li> |
| <li>Corrected PCLK source for USART1.</li> |
| </ul></li> |
| <li><strong>HAL SPI</strong> |
| <ul> |
| <li>Improved SPI performances.</li> |
| <li>Added Fit Bit feedback (with BSY flag check) for all the process.</li> |
| <li>Updated function descriptions.</li> |
| <li>Fixed issue on Rx 2line with DataSize8bit, even buffer size and CRC 8bit.</li> |
| <li>Added DMA circular mode support for the communication peripherals.</li> |
| <li>Removed DMA Tx Callback in case of RxOnly mode from HAL_SPI_TransmitReceive_DMA().</li> |
| <li>Added HAL_SPI_GetError().</li> |
| </ul></li> |
| <li><strong>HAL TIM</strong> |
| <ul> |
| <li>Corrected assert checks in HAL_TIM_ConfigClockSource() when setting internal clock source.</li> |
| <li>Removed useless assert() in TIM functions.</li> |
| <li>Updated implementation of __HAL_TIM_SET_COMPARE macro.</li> |
| <li>Updated Repetition counter bits definition.</li> |
| <li>Modified HAL_TIM_ConfigOCrefClear() to avoid possible overwrite of SMCR register.</li> |
| <li>Removed assert on trigger polarity in the case TIM_TS_TI1F_ED.</li> |
| <li>Removed HAL_TIM_SlaveConfigSynchronization_DMA() from HAL_TIM APIs.</li> |
| <li>Added TIM edge modification macros: TIM_SET_CAPTUREPOLARITY(), TIM_RESET_CAPTUREPOLARITY(), __HAL_TIM_SET_CAPTUREPOLARITY.</li> |
| <li>Added URS_ENABLE, URS_DISABLE macros.</li> |
| <li>Changed Time Out management: report state READY instead of TIMEOUT.</li> |
| <li>Time-out information is reported by function output parameter.</li> |
| <li>Added new function HAL_TIM_SlaveConfigSynchronization_IT() to handle the trigger interrupt activation.</li> |
| </ul></li> |
| <li><strong>HAL TSC</strong> |
| <ul> |
| <li>Recovered IS_TSC_SS and IS_TSC_SSD macro definitions.</li> |
| </ul></li> |
| <li><strong>HAL UART-USART</strong> |
| <ul> |
| <li>Added DMA circular mode support for the communication peripherals.</li> |
| <li>Modified Time Out management: report state READY instead of TIMEOUT.</li> |
| <li>Time-out information is reported by function output parameter.</li> |
| <li>Changed UART_DMATransmitCplt() implementation to remove WaitOnFlag in ISR.</li> |
| <li>Implemented __HAL_UART_FLUSH_DRREGISTER macro, required by the In-Application Programming (IAP)</li> |
| <li>using the USART application.</li> |
| <li>Corrected behavior of HAL_UART_IRQ_Handler() (removed enabling/disabling of ERR IT source).</li> |
| <li>Added IS_UART_DMA_INSTANCE macro to sort UART instances supporting DMA communication.</li> |
| <li>Used new macro IS_UART_DMA_INSTANCE in assert_param() calls for UART DMA related primitives.</li> |
| <li>Changed UART TX-IT implementation to remove WaitOnFlag in ISR.</li> |
| <li>Added MACRO to UART HAL to control CTS and RTS from the customer application.</li> |
| <li>Renamed HAL_UART_WakeupCallback() in HAL_UARTEx_WakeupCallback().</li> |
| <li>Corrected setting of BRR register bit[3:0] when OVER8 sampling mode is used.</li> |
| <li>Corrected values used as parameter of __HAL_USART_CLEAR_IT() in HAL_USART_IRQHandler().</li> |
| <li>Updated HAL_USART_Init() to reach max frequencies (enable oversampling by 8).</li> |
| <li>Fixed issue in UART DMA implementation: missed clear of the TC bit in the SR register.</li> |
| <li>Added test in HAL_LIN_Init() as only 8-bit data length is available with USART Lin mode Data length.</li> |
| <li>Updated USART_IT_CM defined value.</li> |
| <li>Corrected PCLK source for USART1.</li> |
| </ul></li> |
| <li><strong>HAL USB/PCD</strong> |
| <ul> |
| <li>Corrected products define supporting USB feature.</li> |
| <li>Updated call to Double Buffering Counter Function.</li> |
| <li>Updated HAL PCD clear flag macros configuration.</li> |
| <li>Corrected issue in HAL_PCD_EP_Transmit() function, regarding the double-buffering mode for IN endpoints.</li> |
| </ul></li> |
| <li><strong>HAL WWDG</strong> |
| <ul> |
| <li>Updated IT macro management.</li> |
| </ul></li> |
| </ul> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section1_1_1" aria-hidden="true"> <label for="collapse-section1_1_1" aria-hidden="true"><strong>V1.1.1 / 19-June-2015</strong></label> |
| <div> |
| <h2 id="main-changes-10">Main Changes</h2> |
| <ul> |
| <li>Fixed compilation warnings reported by TrueSTUDIO and SW4STM32 toolchains.</li> |
| </ul> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section1_1_0" aria-hidden="true"> <label for="collapse-section1_1_0" aria-hidden="true"><strong>V1.1.0 / 12-September-2014</strong></label> |
| <div> |
| <h2 id="main-changes-11">Main Changes</h2> |
| <ul> |
| <li><strong>First official release of STM32F3xx HAL drivers for STM32F303xE, STM32F302xE and STM32F398xx devices.</strong></li> |
| <li><strong>HAL generic</strong> update |
| <ul> |
| <li>Add support of new devices STM32F302xE and STM32F398xx in STM32F3xx HAL drivers</li> |
| </ul></li> |
| <li><strong>HAL ADC</strong> |
| <ul> |
| <li>Empty weak function return HAL_ERROR</li> |
| <li>Misra error corrections</li> |
| </ul></li> |
| <li><strong>HAL CORTEX</strong> |
| <ul> |
| <li>Macro IS_SYSTICK_CLKSOURCE renamed IS_SYSTICK_CLK_SOURCE</li> |
| </ul></li> |
| <li><strong>HAL DAC</strong> |
| <ul> |
| <li>Empty weak function return HAL_ERROR</li> |
| </ul></li> |
| <li><strong>HAL IWDG</strong> |
| <ul> |
| <li>Minor updates (HAL coding rules)</li> |
| </ul></li> |
| <li><strong>HAL PCD</strong> |
| <ul> |
| <li>Changed IN/OUT EndPoint parameter array size (PCD Handle Structure)</li> |
| </ul></li> |
| <li><strong>HAL RCC</strong> |
| <ul> |
| <li>RCC_MCOSOURCE_PLLCLK_DIV1 define added to RCC_MCO_Clock_Source defgroup for the following devices: STM32F302xE, STM32F303xE, STM32F398xx, STM32F303x8, STM32F328xx, STM32F301x8, STM32F302x8 and STM32F318xx</li> |
| </ul></li> |
| <li><strong>HAL SPI</strong> |
| <ul> |
| <li>Removed HAL_ prefix from static function names</li> |
| </ul></li> |
| <li><strong>HAL TIM</strong> |
| <ul> |
| <li>Checked DeadTime value in debug mode</li> |
| <li>Add new macros __HAL_TIM_URS_ENABLE() and __HAL_TIM_URS_DISABLE()</li> |
| </ul></li> |
| <li><strong>HAL WWDG</strong> |
| <ul> |
| <li>Minor updates (HAL coding rules)</li> |
| <li>Added macro __HAL_WWDG_CLEAR_IT()</li> |
| <li>Use MODIFY_REG() macro to set Prescaler, Window and Counter registers within HAL_WWDG_Init()</li> |
| </ul></li> |
| </ul> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section1_1_0_rc2" aria-hidden="true"> <label for="collapse-section1_1_0_rc2" aria-hidden="true"><strong>V1.5.2RC2 / 25-August-2014</strong></label> |
| <div> |
| <h2 id="main-changes-12">Main Changes</h2> |
| <ul> |
| <li><strong>HAL generic</strong> update |
| <ul> |
| <li>General improvement of Doxygen Tags for CHM UM generation</li> |
| <li>Add support of new devices <strong>STM32F303xE</strong> in STM32F3xx HAL driver</li> |
| </ul></li> |
| <li><strong>HAL</strong> update (for <strong>STM32F303xE</strong>) |
| <ul> |
| <li>Add new defines for ADC trigger remapping (HAL_REMAPADCTRIGGER_x)</li> |
| <li>Add new defines for CCM RAM page write protection (up to 16 pages can be write protected)</li> |
| <li>Add new macro IS_HAL_REMAPADCTRIGGER()</li> |
| <li>Updated macro IS_HAL_SYSCFG_WP_PAGE ()</li> |
| <li>Add new macros to freeze/unfreeze TIM20 in debug mode: __HAL_FREEZE_TIM20_DBGMCU() and __HAL_UNFREEZE_TIM20_DBGMCU()</li> |
| <li>Add new macro to remap the FMC banks 1 and 2 at 0x00000000 : __HAL_FMC_BANK()</li> |
| <li>Add new macros to enable/disable ADC trigger remapping: __HAL_REMAPADCTRIGGER_ENABLE() and __HAL_REMAPADCTRIGGER_DISABLE()</li> |
| </ul></li> |
| <li><strong>HAL ADC</strong> update (for <strong>STM32F303xE</strong>) |
| <ul> |
| <li>Add new defines for TIM20 related ADC external triggers for regular groups (ADC_EXTERNALTRIGCONV_T20_x)</li> |
| <li>Add new defines for TIM20 related ADC external triggers for injected groups (ADC_EXTERNALTRIGINJECCONV_T20_x)</li> |
| <li>Updated macro __HAL_ADC_CFGR_EXTSEL() to take into account TIM20 related ADC triggers for regular channels</li> |
| <li>Updated macro __HAL_ADC_JSQR_JEXTSEL() to take into account TIM20 related ADC triggers for injected channels</li> |
| </ul></li> |
| <li><strong>HAL COMP</strong> update |
| <ul> |
| <li>Defect correction: |
| <ul> |
| <li>Missing assert param IS_COMP_TRIGGERMODE</li> |
| </ul></li> |
| <li>STM32F303xE: |
| <ul> |
| <li>Add new defines for comparator output redirection: COMP_OUTPUT_TIM20BKIN, COMP_OUTPUT_TIM20BKIN2, COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2_TIM20BKIN2 and COMP_OUTPUT_TIM20OCREFCLR</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL FLASH</strong> update (for <strong>STM32F303xE</strong>) |
| <ul> |
| <li>Add new defines for write protection of pages 32 to 61 and 62-263 (OB_WRP_PAGESxxTOyy)</li> |
| </ul></li> |
| <li><strong>HAL GPIO</strong> update (for <strong>STM32F303xE</strong>) |
| <ul> |
| <li>Add new defines for TIM20 and FMC related AF: GPIO_AF2_TIM20, GPIO_AF3_TIM20, GPIO_AF6_TIM20 and GPIO_AF12_FMC</li> |
| </ul></li> |
| <li><strong>HAL IRDA</strong> update |
| <ul> |
| <li>TC enabled and TXE disabled at the end of TX in IT mode</li> |
| </ul></li> |
| <li><strong>HAL NAND (STM32F303xE specific)</strong> |
| <ul> |
| <li>FMC: generic firmware to drive NAND memories mounted as external device</li> |
| </ul></li> |
| <li><strong>HAL NOR (STM32F303xE specific)</strong> |
| <ul> |
| <li>FMC: generic firmware to drive NOR memories mounted as external device</li> |
| </ul></li> |
| <li><strong>HAL PCCARD (STM32F303xE specific)</strong> |
| <ul> |
| <li>FMC: generic firmware to drive PCCARD memories mounted as external device</li> |
| </ul></li> |
| <li><strong>HAL PCD</strong> update |
| <ul> |
| <li>Add new macros __HAL_USB_EXTI_GET_FLAG() , __HAL_USB_EXTI_CLEAR_FLAG(), __HAL_USB_EXTI_SET_RISING_EDGE_TRIGGER(), __HAL_USB_EXTI_SET_FALLING_EDGE_TRIGGER() and _HAL_USB_EXTI_SET_FALLINGRISING_TRIGGER()</li> |
| </ul></li> |
| <li><strong>HAL PWR</strong> update |
| <ul> |
| <li>PVD feature need falling/rising Event modes</li> |
| <li>Rename defines: |
| <ul> |
| <li>PWR_MODE_EVT to PWR_PVD_MODE_NORMAL</li> |
| <li>PWR_MODE_IT_RISING to PWR_PVD_MODE_IT_RISING</li> |
| <li>PWR_MODE_IT_FALLING to PWR_PVD_MODE_IT_FALLING</li> |
| <li>PWR_MODE_IT_RISING_FALLING to PWR_PVD_MODE_IT_RISING_FALLING</li> |
| <li>PWR_MODE_IT_RISING to PWR_PVD_MODE_IT_RISING</li> |
| </ul></li> |
| <li>Add new defines: PWR_PVD_MODE_EVENT_RISING, PWR_PVD_MODE_EVENT_FALLING and PWR_PVD_MODE_EVENT_RISING_FALLING</li> |
| <li>Changed __HAL_PVD_EXTI_ENABLE_IT() macro definition: EXTILINE argument no longer needed (PWR_EXTI_LINE_PVD is used implicitly)</li> |
| <li>Changed __HAL_PVD_EXTI_DISABLE_IT() macro definition: EXTILINE argument no longer needed (PWR_EXTI_LINE_PVD is used implicitly)</li> |
| <li>Changed __HAL_PVD_EXTI_GET_FLAG () macro definition: EXTILINE argument no longer needed (PWR_EXTI_LINE_PVD is used implicitly)</li> |
| <li>Changed _HAL_PVD_EXTI_CLEAR_FLAG () macro definition: <strong>EXTILINE</strong> argument no longer needed (PWR_EXTI_LINE_PVD is used implicitly)</li> |
| <li>Add new macros __HAL_PWR_PVD_EXTI_ENABLE_EVENT(), __HAL_PWR_PVD_EXTI_DISABLE_EVENT(), __HAL_PWR_PVD_EXTI_CLEAR_EGDE_TRIGGER(), __HAL_PWR_PVD_EXTI_SET_FALLING_EGDE_TRIGGER() and __HAL_PWR_PVD_EXTI_SET_RISING_EDGE_TRIGGER()</li> |
| </ul></li> |
| <li><strong>HAL RCC</strong> update (for <strong>STM32F303xE)</strong> |
| <ul> |
| <li>RCC_OcsInitTypeDef and RCC_PLLInitTypeDef definitions are now product dependent: |
| <ul> |
| <li>STM32F303xE: |
| <ul> |
| <li>Added PREDIV field to RCC_PLLInitTypeDef: used to set the desired pre-division factor whatever the PLL clock source is (HSI or HSE).</li> |
| <li>Removed field HSEPredivValue from RCC_OscInitTypeDef (replaced by PREDIV field in RCC_PLLInitTypeDef)</li> |
| </ul></li> |
| </ul></li> |
| <li>Other F3 products: no change in RCC_OcsInitTypeDef and RCC_PLLInitTypeDef definitions</li> |
| <li>Add new definition of RCC_PeriphCLKInitTypeDef to fit STM32F303xE clock selection capabilities (e.g select TIM20 clock source)</li> |
| <li>Add new defines to select the pre-division factor (RCC_PREDIV_DIVx)</li> |
| <li>Add new defines to set TIM20 clock source (RCC_PERIPHCLK_TIM20, RCC_TIM20CLK_HCLK and RCC_TIM20CLK_PLLCLK)</li> |
| <li>Add new defnes to set TIM3 & TIM4 clock source (RCC_PERIPHCLK_TIM34, RCC_TIM34CLK_HCLK, RCC_TIM34CLK_PCLK)</li> |
| <li>Add FMC related macros: __FMC_CLK_ENABLE(), __FMC_CLK_DISABLE(), __FMC_FORCE_RESET() and __FMC_RELEASE_RESET()</li> |
| <li>Add GPIO port G related macros: __GPIOG_CLK_ENABLE(), <strong>GPIOG_CLK_DISABLE(), </strong> GPIOG _FORCE_RESET() and __GPIOG _RELEASE_RESET()</li> |
| <li>Add GPIO port H related macros:_ __GPIOH_CLK_ENABLE(), __GPIOH_CLK_DISABLE(), __FMC_ GPIOH _RESET() and __GPIOH _RELEASE_RESET()</li> |
| <li>Add SPI4 related macros: __SPI4_CLK_ENABLE(), <strong>SPI4_CLK_DISABLE(), </strong> SPI4_FORCE_RESET() and __SPI4_RELEASE_RESET()</li> |
| <li>Add TIM20 related macros: __TIM20_CLK_ENABLE(), <strong>TIM20_CLK_DISABLE(), </strong> TIM20_FORCE_RESET() and __TIM20_RELEASE_RESET(), __HAL_RCC_TIM20_CONFIG() , __HAL_RCC_GET_TIM20_SOURCE()</li> |
| <li>Add new macro to set/get the clock source of TIM3 & TIM4: __HAL_RCC_TIM34_CONFIG() and __HAL_RCC_GET_TIM34_SOURCE()</li> |
| </ul></li> |
| <li><strong>HAL SMARTCARD</strong> update |
| <ul> |
| <li>Change SMARTCARD_AdvFeatureConfig() from exported to static private function</li> |
| <li>TC enabled and TXE disabled at the end of TX in IT mode</li> |
| </ul></li> |
| <li><strong>HAL SMBUS</strong> update |
| <ul> |
| <li>Fix wrong State after a PEC failed</li> |
| <li>Fix slave acknowledge issue</li> |
| </ul></li> |
| <li><strong>HAL SPI</strong> update |
| <ul> |
| <li>Fix CodeSonar warning: unreachable Call in SPI_CloseRxTx_ISR()</li> |
| </ul></li> |
| <li><strong>HAL SRAM (STM32F303xE specific)</strong> |
| <ul> |
| <li>FMC: generic firmware to drive SRAM memories mounted as external device</li> |
| </ul></li> |
| <li><strong>HAL TIM</strong> update (for <strong>STM32F303xE</strong>) |
| <ul> |
| <li>Add defines to set TIM20 option register (link from analog watchdog and TIM20 ETR)</li> |
| </ul></li> |
| <li><strong>HAL UART</strong> update |
| <ul> |
| <li>TC enabled and TXE disabled at the end of TX in IT mode</li> |
| </ul></li> |
| <li><strong>HAL USART</strong> update |
| <ul> |
| <li>TC enabled and TXE disabled at the end of TX in IT mode</li> |
| </ul></li> |
| </ul> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section1_0_1" aria-hidden="true"> <label for="collapse-section1_0_1" aria-hidden="true"><strong>V1.0.1 / 18-June-2014</strong></label> |
| <div> |
| <h2 id="main-changes-13">Main Changes</h2> |
| <ul> |
| <li><strong>HAL generic</strong> update |
| <ul> |
| <li>Fix flag clear procedure: use atomic write operation “=” instead of ready-modify-write operation “|=” or “&=”</li> |
| <li>Fix on Timeout management, Timeout value set to 0 passed to API automatically exits the function after checking the flag without any wait.</li> |
| <li>Add new macro __HAL_RESET_HANDLE_STATE to reset a given handle state.</li> |
| </ul></li> |
| <li><strong>HAL ADC</strong> update |
| <ul> |
| <li>Rename defines: |
| <ul> |
| <li>ADC_EXTERNALTRIGCONV_Ext_IT11 to ADC_EXTERNALTRIGCONV_EXT_IT11</li> |
| <li>ADC_EXTERNALTRIGCONV_Ext_IT12 to ADC_EXTERNALTRIGCONV_EXT_IT12</li> |
| </ul></li> |
| <li>Fix define ADC_SOFTWARE_START</li> |
| <li>Update external trigger defines to remove HRTIM triggers for STM32F328xx and TIM8 triggers for STM32F302xC</li> |
| <li>Add ADC1_2_EXTERNALTRIG_T4_CC4 for STM32F303x8 and STM32F328xx</li> |
| </ul></li> |
| <li><strong>HAL CEC</strong> update |
| <ul> |
| <li>Process no more locked during the transmission in interrupt mode.</li> |
| </ul></li> |
| <li><strong>HAL COMP</strong> update |
| <ul> |
| <li>Fix on 32-bit register COMP CSR accesses for STM32F373xC and STM32F378xx devices.</li> |
| <li>Add new defines for STM32F373xC and STM32F378xx comparators: |
| <ul> |
| <li>COMP_OUTPUT_TIM3IC1, COMP_OUTPUT_TIM3OCREFCLR, COMP_OUTPUT_TIM2IC4 and COMP_OUTPUT_TIM2OCREFCLR instead of previous defines COMP_OUTPUT_COMP1_TIM3IC1, COMP_OUTPUT_COMP1_TIM3OCREFCLR, COMP_OUTPUT_COMP1_TIM2IC4, COMP_OUTPUT_COMP1_TIM2OCREFCLR, COMP_OUTPUT_COMP2_TIM3IC1, COMP_OUTPUT_COMP2_TIM3OCREFCLR, COMP_OUTPUT_COMP2_TIM2IC4, COMP_OUTPUT_COMP2_TIM2OCREFCLR.</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL DMA</strong> update |
| <ul> |
| <li>Fix in HAL_DMA_PollForTransfer() to set error code HAL_DMA_ERROR_TE in case of HAL_ERROR status</li> |
| </ul></li> |
| <li><strong>HAL GPIO</strong> update |
| <ul> |
| <li>Fix GPIO_AF5_SPI1 define instead of GPIO_AF5_SPI1 for STM32F303x8 device.</li> |
| </ul></li> |
| <li><strong>HAL HRTIM</strong> update |
| <ul> |
| <li>HRTIM peripheral not available for STM32F328xx device.</li> |
| <li>Fix macros __HAL_HRTIM_CLEAR_FLAG, __HAL_HRTIM_MASTER_CLEAR_FLAG and __HAL_HRTIM_TIMER_CLEAR_FLAG</li> |
| </ul></li> |
| <li><strong>HAL I2C</strong> update |
| <ul> |
| <li>Add management of NACK event in Master transmitter mode and Slave transmitter/receiver modes (only in polling mode), in that case the current transfer is stopped.</li> |
| </ul></li> |
| <li><strong>HAL IRDA</strong> update |
| <ul> |
| <li>Add new enum typedef IRDA_ClockSourceTypeDef</li> |
| <li>Add new macro __HAL_IRDA_GETCLOCKSOURCE</li> |
| <li>Change in HAL_IRDA_Transmit_IT() to enable IRDA_IT_TXE instead of IRDA_IT_TC.</li> |
| <li>Process no more locked during the transmission in interrupt mode.</li> |
| </ul></li> |
| <li><strong>HAL OPAMP</strong> update |
| <ul> |
| <li>__SYSCFG_CLK_ENABLE() is now handled internally in HAL_OPAMP_Init() and no more in user HAL_OPAMP_MspInit().</li> |
| </ul></li> |
| <li><strong>HAL PCD</strong> update |
| <ul> |
| <li>Add new macro __HAL_USB_EXTI_GENERATE_SWIT</li> |
| </ul></li> |
| <li>HAL PWR update |
| <ul> |
| <li>Fix in HAL_PWR_EnterSTANDBYMode() to not clear Wakeup flag (WUF), which need to be cleared at application level before to call this function</li> |
| </ul></li> |
| <li><strong>HAL RCC</strong> update |
| <ul> |
| <li>Change for STM32F303x8, STM32F334x8 and STM32F328xx devices: |
| <ul> |
| <li>Add missing macro __DAC2_FORCE_RESET</li> |
| <li>Rename RCC_USART1CLKSOURCE_PCLK2 into RCC_USART1CLKSOURCE_PCLK1</li> |
| </ul></li> |
| <li>Remove HRTIM1 peripheral and clocking macros for STM32F328xx device.</li> |
| <li>Fix HSI Calibration issue when selected as SYSCLK</li> |
| </ul></li> |
| <li><strong>HAL SMARTCARD</strong> update |
| <ul> |
| <li>Change in HAL_SMARTCARD_Transmit_IT() to enable SMARTCARD_IT_TXE instead of SMARTCARD_IT_TC.</li> |
| <li>Process no more locked during the transmission in interrupt mode.</li> |
| </ul></li> |
| <li><strong>HAL SMBUS</strong> update |
| <ul> |
| <li>Fix Slave acknowledge issue: Slave should ack each bit and so stretch the line till the bit is not ack</li> |
| </ul></li> |
| <li><strong>HAL TIM</strong> update |
| <ul> |
| <li>Fix macro __HAL_TIM_PRESCALER</li> |
| </ul></li> |
| <li><strong>HAL TSC</strong> update |
| <ul> |
| <li>Fix define TSC_ACQ_MODE_SYNCHRO</li> |
| </ul></li> |
| <li><strong>HAL UART</strong> update |
| <ul> |
| <li>Change in HAL_LIN_Init() parameter BreakDetectLength to uint32_t</li> |
| <li>Change in HAL_UART_Transmit_IT() to enable UART_IT_TXE instead of UART_IT_TC.</li> |
| <li>Process no more locked during the transmission in interrupt mode.</li> |
| </ul></li> |
| <li><strong>HAL USART</strong> update |
| <ul> |
| <li>Change USART_InitTypeDef fields to uint32_t type</li> |
| <li>Rename __USART_ENABLE and __USART_DISABLE macros to respectively __HAL_USART_ENABLE and __HAL_USART_DISABLE</li> |
| <li>Change in HAL_USART_Transmit_IT() to enable USART_IT_TXE instead of USART_IT_TC.</li> |
| <li>Process no more locked during the transmission in interrupt mode.</li> |
| <li>Change in HAL_USART_TransmitReceive_DMA() to manage DMA half transfer mode</li> |
| </ul></li> |
| </ul> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section1_0_0" aria-hidden="true"> <label for="collapse-section1_0_0" aria-hidden="true"><strong>V1.0.0 / 06-May-2014</strong></label> |
| <div> |
| <h2 id="main-changes-14">Main Changes</h2> |
| <ul> |
| <li>First official release of STM32F3xx HAL drivers for <strong>STM32F301x6/x8, STM32F302x6/x8, STM32F302xB/xC, STM32F303x6/x8, STM32F373xB/xC, STM32F334x4/x6/x8, STM32F318xx, STM32F328xx, STM32F358xx and STM32F378xx devices.</strong></li> |
| </ul> |
| </div> |
| </div> |
| </div> |
| </div> |
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