commit 2770385dd04c97d49cf285e9a5c9d1a52edbdf25
author Rania JMAI <rania.jmai@st.com> Fri Feb 16 16:09:28 2024 +0100
committer Rania JMAI <rania.jmai@st.com> Fri Feb 16 16:11:26 2024 +0100
tree 36000c9998b08811b5de651dc8c64452653e9a22
parent 867c190df1a9a61c8d66e1fcda33dd8cfaa854b7

[HAL][ETH] Replace ETH_RX_BUF_SIZE define in ETH_UpdateDescriptor() and ETH_DMARxDescListInit() by Init.RxBuffLen

Src/stm32f7xx_hal_eth.c

diff --git a/Src/stm32f7xx_hal_eth.c b/Src/stm32f7xx_hal_eth.c
index 0965726..a65d7bc 100644
--- a/Src/stm32f7xx_hal_eth.c
+++ b/Src/stm32f7xx_hal_eth.c
@@ -1231,11 +1231,11 @@
     {
       if (heth->RxDescList.ItMode == 0U)
       {
-        WRITE_REG(dmarxdesc->DESC1, ETH_DMARXDESC_DIC | ETH_RX_BUF_SIZE | ETH_DMARXDESC_RCH);
+        WRITE_REG(dmarxdesc->DESC1, heth->Init.RxBuffLen | ETH_DMARXDESC_DIC | ETH_DMARXDESC_RCH);
       }
       else
       {
-        WRITE_REG(dmarxdesc->DESC1, ETH_RX_BUF_SIZE | ETH_DMARXDESC_RCH);
+        WRITE_REG(dmarxdesc->DESC1, heth->Init.RxBuffLen | ETH_DMARXDESC_RCH);
       }
 
       SET_BIT(dmarxdesc->DESC0, ETH_DMARXDESC_OWN);
@@ -2999,7 +2999,7 @@
     dmarxdesc->DESC0 = ETH_DMARXDESC_OWN;
 
     /* Set Buffer1 size and Second Address Chained bit */
-    dmarxdesc->DESC1 = ETH_DMARXDESC_RCH | ETH_RX_BUF_SIZE;
+    dmarxdesc->DESC1 = heth->Init.RxBuffLen | ETH_DMARXDESC_RCH;
 
     /* Enable Ethernet DMA Rx Descriptor interrupt */
     dmarxdesc->DESC1 &= ~ETH_DMARXDESC_DIC;