commit 87047e59aa3883da281a7de519723545e6be4513
author Tasnim <tasnim.ouni@st.com> Fri Nov 10 12:03:33 2023 +0100
committer Tasnim <tasnim.ouni@st.com> Fri Nov 10 14:29:00 2023 +0100
tree 47e4c6271ccce8f94c8e65b600ab37a2ad3ddf5d
parent 343e421f8ac1018481aef751e4de913f1080d5b0

[HAL][ETH] Update on Rx descriptor Tail pointer management to avoid race condition

Src/stm32f7xx_hal_eth.c

diff --git a/Src/stm32f7xx_hal_eth.c b/Src/stm32f7xx_hal_eth.c
index 0c7697a..8e844d2 100644
--- a/Src/stm32f7xx_hal_eth.c
+++ b/Src/stm32f7xx_hal_eth.c
@@ -1193,6 +1193,7 @@
   */
 static void ETH_UpdateDescriptor(ETH_HandleTypeDef *heth)
 {
+  uint32_t tailidx;
   uint32_t descidx;
   uint32_t desccount;
   ETH_DMADescTypeDef *dmarxdesc;
@@ -1238,12 +1239,6 @@
         WRITE_REG(dmarxdesc->DESC1, ETH_RX_BUF_SIZE | ETH_DMARXDESC_RCH);
       }
 
-      /* Before transferring the ownership to DMA, make sure that the RX descriptors bits writing
-         is fully performed.
-         The __DMB() instruction is added to avoid any potential compiler optimization that
-         may lead to abnormal behavior. */
-      __DMB();
-
       SET_BIT(dmarxdesc->DESC0, ETH_DMARXDESC_OWN);
 
       /* Increment current rx descriptor index */
@@ -1256,8 +1251,14 @@
 
   if (heth->RxDescList.RxBuildDescCnt != desccount)
   {
+    /* Set the tail pointer index */
+    tailidx = (descidx + 1U) % ETH_RX_DESC_CNT;
+
+    /* DMB instruction to avoid race condition */
+    __DMB();
+
     /* Set the Tail pointer address */
-    WRITE_REG(heth->Instance->DMARPDR, 0);
+    WRITE_REG(heth->Instance->DMARPDR, ((uint32_t)(heth->Init.RxDesc + (tailidx))));
 
     heth->RxDescList.RxBuildDescIdx = descidx;
     heth->RxDescList.RxBuildDescCnt = desccount;