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| <h1 id="release-notes-forstm32g0xx-hal-drivers"><small>Release Notes for</small><mark>STM32G0xx HAL Drivers</mark></h1> |
| <p>Copyright © 2018 STMicroelectronics</p> |
| <a href="https://www.st.com" class="logo"><img src="_htmresc/st_logo_2020.png" alt="ST logo" /></a> |
| </center> |
| <h1 id="purpose">Purpose</h1> |
| <p>The STM32Cube HAL and LL, an STM32 abstraction layer embedded software, ensure maximized portability across STM32 portfolio.</p> |
| <p>The Portable APIs layer provides a generic, multi instanced and simple set of APIs to interact with the upper layer (application, libraries and stacks). It is composed of native and extended APIs set. It is directly built around a generic architecture and allows the build-upon layers, like the middleware layer, to implement its functions without knowing in-depth the used STM32 device. This improves the library code re-usability and guarantees an easy portability on other devices and STM32 families.</p> |
| <p>The Low Layer (LL) drivers are part of the STM32Cube firmware HAL that provide basic set of optimized and one shot services. The Low layer drivers, contrary to the HAL ones are not Fully Portable across the STM32 families; the availability of some functions depend on the physical availability of the relative features on the product. The Low Layer (LL) drivers are designed to offer the following features:</p> |
| <ul> |
| <li>New set of inline function for direct and atomic register access</li> |
| <li>One-shot operations that can be used by the HAL drivers or from application level.</li> |
| <li>Fully Independent from HAL and can be used in standalone usage (without HAL drivers)</li> |
| <li>Full features coverage of the all the supported peripherals.</li> |
| </ul> |
| </div> |
| <div class="col-sm-12 col-lg-8"> |
| <h1 id="update-history">Update History</h1> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section9" checked aria-hidden="true"> <label for="collapse-section9" aria-hidden="true">V1.4.6 / 15-December-2023</label> |
| <div> |
| <h2 id="main-changes">Main Changes</h2> |
| <h3 id="maintenance-release">Maintenance release</h3> |
| <ul> |
| <li>HAL code quality enhancement for MISRA-C Rule-8.13 by adding const qualifiers.</li> |
| <li><strong>HAL/LL GENERIC</strong> update |
| <ul> |
| <li>Fix the COMP EXTI line in the comments.</li> |
| <li>Allow redefinition of macro UNUSED(x).</li> |
| <li>Update of HAL_GetTickFreq() brief.</li> |
| </ul></li> |
| <li><strong>HAL EXTI</strong> update |
| <ul> |
| <li>Fix computation of pExtiConfig->GPIOSel in HAL_EXTI_GetConfigLine().</li> |
| <li>Fix the wrong references in the “How to use this driver” section.</li> |
| </ul></li> |
| <li><strong>HAL CRC</strong> update |
| <ul> |
| <li>Add filter in HAL_CRCEx_Polynomial_Set() to exclude even polynomials.</li> |
| </ul></li> |
| <li><strong>HAL CRYP</strong> update |
| <ul> |
| <li>Update Crypt/Decrypt IT processes to avoid Computation Completed IRQ fires before the DINR pointer increment.</li> |
| <li>Update AES GCM in interrupt mode to avoid Computation Completed IRQ fires before the DINR pointer increment.</li> |
| </ul></li> |
| <li><strong>LL ADC</strong> update |
| <ul> |
| <li>Remove useless action of conversion trigger change in function LL_ADC_DeInit(). Moreover, this action was not compliant with ADC enable state (cf reference manual).</li> |
| </ul></li> |
| <li><strong>HAL DAC</strong> update |
| <ul> |
| <li>Fix incorrect word ‘surcharged’ in functions headers.</li> |
| <li>Fix HAL_GetTick() timeout vulnerability.</li> |
| <li>Updated DAC buffer calibration according to RM.</li> |
| </ul></li> |
| <li><strong>HAL/LL RTC</strong> update |
| <ul> |
| <li>Optimize the way RSF flag is cleared in HAL_RTC_WaitForSynchro().</li> |
| <li>Correct misleading note about shadow registers.</li> |
| <li>Update HAL_RTC_XXX_GET_IT(), HAL_RTC_XXX_GET_FLAG(), and HAL_RTC_XXX_CLEAR_FLAG() macros with correct registers and bitmasks.</li> |
| </ul></li> |
| <li><strong>HAL RCC</strong> update |
| <ul> |
| <li>Rework HAL_RCC_MCOConfig() API to support all RCC_MCOx parameter values (GPIO pins) from Datasheet.</li> |
| <li>Enclose in parentheses parameters of a group of macros to avoid Misra-C 2012 Rule-20.7 warnings.</li> |
| <li>Add else statement in the end of HAL_RCC_MCOConfig API to avoid Misra-C 2012 Rule-15.7 warnings.</li> |
| <li>Add defined(RCC_CCIPR_USART2SEL) for selecting the USART2 clock source in stm32g0xx_ll_rcc.h file.</li> |
| </ul></li> |
| <li><strong>HAL PWR</strong> update |
| <ul> |
| <li>Update to support USB supply enable feature for STM32G0B0 devices.</li> |
| </ul></li> |
| <li><strong>HAL CORTEX</strong> update |
| <ul> |
| <li>Update HAL_MPU_ConfigRegion() to allow the configuration of the MPU registers independently of the value of Enable/Disable field.</li> |
| <li>Add new APIs HAL_MPU_EnableRegion() / HAL_MPU_DisableRegion().</li> |
| </ul></li> |
| <li><strong>HAL/LL TIM</strong> update |
| <ul> |
| <li>Remove useless check on IS_TIM_ADVANCED_INSTANCE() within LL_TIM_BDTR_Init() to fix Break Filter configuration problem with specific TIM instances.</li> |
| <li>Remove lock management from callback management functions.</li> |
| <li>Remove multiple volatile reads or writes in interrupt handler for better performance.</li> |
| <li>Improve HAL TIM driver’s operational behavior.</li> |
| <li>Assert check for the right channels.</li> |
| <li>Improve period configuration parameter check.</li> |
| <li>Remove unnecessary change of MOE bitfield in LL_TIM_BDTR_Init().</li> |
| </ul></li> |
| <li><strong>HAL/LL LPTIM</strong> update |
| <ul> |
| <li>Apply the same naming rule to clear FLAG related functions.</li> |
| <li>Remove Lock management from callback management functions.</li> |
| <li>Remove redundant IS_LPTIM_AUTORELOAD macro.</li> |
| </ul></li> |
| <li><strong>HAL FDCAN</strong> update |
| <ul> |
| <li>Fix GetIndex issue in HAL_FDCAN_GetRxMessage.</li> |
| <li>Remove shift from ‘FDCAN_DLC_BYTES_X’ definitions so that values taken by ‘DataLength’ structure member comply to the definition of a DLC.</li> |
| </ul></li> |
| <li><strong>HAL FLASH</strong> update |
| <ul> |
| <li>Remove the plural form in the description of the __HAL_FLASH_CLEAR_FLAG macro.</li> |
| <li>Fix __HAL_FLASH_CLEAR_FLAG macro.</li> |
| <li>Fix timeout check in FLASH_WaitForLastOperation().</li> |
| <li>Update HAL_FLASH_Unlock/HAL_FLASH_Lock and HAL_FLASH_OB_Unlock/HAL_FLASH_OB_Lock functions to check BSY1, BSY2 and CFGBSY bits before performing Unlock/Lock sequence.</li> |
| <li>Fix Misra-C:2012 Rule-17.7 warnings: The return value of `FLASH_WaitForLastOperation()’ call is discarded.</li> |
| </ul></li> |
| <li><strong>HAL UART</strong> update |
| <ul> |
| <li>Disable the Receiver Timeout Interrupt when data reception is completed.</li> |
| <li>Remove lock management from callback management functions.</li> |
| <li>Rework of UART_WaitOnFlagUntilTimeout() API to avoid being stuck forever when UART overrun error occurs and to enhance behavior.</li> |
| <li>Remove __HAL_LOCK() from HAL_xxx_RegisterCallback()/HAL_xxx_UnRegisterCallback().</li> |
| <li>Update initialisation sequence for TXINV, RXINV and TXRXSWAP settings.</li> |
| <li>Fix incorrect gState check in HAL_UART_RegisterRxEventCallback/HAL_UART_UnRegisterRxEventCallback to allow user Rx Event Callback registration when a transmit is ongoing.</li> |
| <li>Avoid RTOF flag to be cleared by a transmit process in polling mode.</li> |
| </ul></li> |
| <li><strong>HAL USART</strong> update |
| <ul> |
| <li>Remove __HAL_LOCK() from HAL_xxx_RegisterCallback()/HAL_xxx_UnRegisterCallback().</li> |
| </ul></li> |
| <li><strong>HAL IRDA</strong> update |
| <ul> |
| <li>Remove __HAL_LOCK() from HAL_xxx_RegisterCallback()/HAL_xxx_UnRegisterCallback().</li> |
| </ul></li> |
| <li><strong>HAL SMARTCARD</strong> update |
| <ul> |
| <li>Correct USART3 clock source computation for smartcard initialisation.</li> |
| <li>Remove __HAL_LOCK() from HAL_xxx_RegisterCallback()/HAL_xxx_UnRegisterCallback().</li> |
| </ul></li> |
| <li><strong>HAL/LL I2C</strong> update |
| <ul> |
| <li>Duplicate the test condition after timeout detection to avoid false timeout detection.</li> |
| <li>Update HAL_I2C_IsDeviceReady API to support 10_bit addressing mode: Update done on the macro I2C_GENERATE_START.</li> |
| <li>Update HAL I2C driver to prefetch data before starting the transmission: implementation of errata sheet workaround I2C2-190208 : Transmission stalled after first byte.</li> |
| <li>Update HAL I2C driver to disable all interrupts after end of transaction.</li> |
| <li>Update HAL_I2C_Init API to clear ADD10 bit in 7 bit addressing mode.</li> |
| <li>Update I2C_Slave_ISR_IT, I2C_Slave_ISR_DMA and I2C_ITSlaveCplt to prevent the call of HAL_I2C_ListenCpltCallback twice.</li> |
| <li>Solve Slave No stretch not functional by using HAL Slave interface.</li> |
| <li>Update HAL_I2C_Mem_Write_IT API to initialize XferSize at 0.</li> |
| <li>Update I2C_WaitOnRXNEFlagUntilTimeout to check I2C_FLAG_AF independently from I2C_FLAG_RXNE.</li> |
| <li>Remove the unusable code in function HAL_I2C_IsDeviceReady.</li> |
| <li>Update I2C_WaitOnFlagUntilTimeout to handle error case.</li> |
| <li>Update HAL_I2C_Slave_Transmit to check if the received NACK is the good one.</li> |
| <li>Update LL_I2C_HandleTranfer function to prevent undefined behavior of volatile usage before updating the CR2 register.</li> |
| </ul></li> |
| <li><strong>HAL SMBUS</strong> update |
| <ul> |
| <li>Update HAL SMBUS driver to prefetch data before starting the transmission: implementation of errata sheet workaround I2C2-190208 : Transmission stalled after first byte</li> |
| <li>Update SMBUS_ITErrorHandler to flash TXDR just in case of error.</li> |
| </ul></li> |
| <li><strong>HAL/LL SPI</strong> update |
| <ul> |
| <li>Fix driver to don’t update state in case of error (HAL_SPI_STATE_READY will be set only in case of HAL_TIMEOUT).</li> |
| <li>Update HAL_SPI_TransmitReceive API to set the bit CRCNEXT in case of one byte transaction.</li> |
| <li>Update IT API to enable interrupts after process unlock.</li> |
| </ul></li> |
| <li><strong>HAL/LL USB</strong> update |
| <ul> |
| <li>hal_hcd.c/ll_usb.c: fix double buffer mode configuration in host mode for isochronous and bulk transfers.</li> |
| <li>ll_usb.h: use correct macro to clear RXBD register block numbers.</li> |
| <li>hcd.h: update delay before reading RXBD register.</li> |
| <li>hcd.c: prevent channel auto start of periodic interrupt transfer during NAK.</li> |
| <li>ll_usb.c: increase timeout value to allow core reset to complete.</li> |
| </ul></li> |
| <li><strong>LL UTILS</strong> update |
| <ul> |
| <li>Fix a note about Ticks parameter.</li> |
| </ul></li> |
| </ul> |
| <h2 id="known-limitations">Known limitations</h2> |
| <ul> |
| <li>USB HAL limitation: Double buffer mode is not functional with isochronous data transfers in host mode.</li> |
| </ul> |
| <h2 id="development-toolchains-and-compilers">Development Toolchains and Compilers</h2> |
| <ul> |
| <li>IAR Embedded Workbench for ARM (EWARM) toolchain <strong>V8.50.9</strong></li> |
| <li>RealView Microcontroller Development Kit (MDK-ARM) toolchain <strong>V5.38</strong></li> |
| <li>STM32CubeIDE toolchain <strong>V1.14.0</strong></li> |
| </ul> |
| <h2 id="supported-devices-and-boards">Supported Devices and boards</h2> |
| <p>Supported Devices:</p> |
| <ul> |
| <li>STM32G0C1xx, STM32G0B1xx, STM32G0B0xx</li> |
| <li>STM32G061xx, STM32G051xx, STM32G050xx</li> |
| <li>STM32G081xx, STM32G071xx, STM32G070xx</li> |
| <li>STM32G041xx, STM32G031xx, STM32G030xx</li> |
| </ul> |
| <h2 id="backward-compatibility">Backward Compatibility</h2> |
| <p>This release is compatible with the previous versions.</p> |
| <h2 id="dependencies">Dependencies</h2> |
| <p><br /> |
| </p> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section8" aria-hidden="true"> <label for="collapse-section8" aria-hidden="true">V1.4.5 / 10-June-2022</label> |
| <div> |
| <h2 id="main-changes-1">Main Changes</h2> |
| <h3 id="maintenance-release-1">Maintenance release</h3> |
| <ul> |
| <li>General updates to fix known defects and enhancements implementation.</li> |
| <li>HAL code quality enhancement for MISRA-C Rule-8.13 by adding const qualifiers</li> |
| </ul> |
| <h2 id="known-limitations-1">Known limitations</h2> |
| <ul> |
| <li>USB HAL limitation: Double buffer mode is not functional with isochronous data transfers in host mode.</li> |
| </ul> |
| <h2 id="development-toolchains-and-compilers-1">Development Toolchains and Compilers</h2> |
| <ul> |
| <li>IAR Embedded Workbench for ARM (EWARM) toolchain V8.50.9</li> |
| <li>RealView Microcontroller Development Kit (MDK-ARM) toolchain V5.31</li> |
| <li>STM32CubeIDE toolchain (gcc9_2020_q2_update) v1.7.0</li> |
| </ul> |
| <h2 id="supported-devices-and-boards-1">Supported Devices and boards</h2> |
| <p>Supported Devices:</p> |
| <ul> |
| <li>STM32G0C1xx, STM32G0B1xx, STM32G0B0xx</li> |
| <li>STM32G061xx, STM32G051xx, STM32G050xx</li> |
| <li>STM32G081xx, STM32G071xx, STM32G070xx</li> |
| <li>STM32G041xx, STM32G031xx, STM32G030xx</li> |
| </ul> |
| <h2 id="backward-compatibility-1">Backward Compatibility</h2> |
| <p>This release is compatible with the previous versions.</p> |
| <h2 id="dependencies-1">Dependencies</h2> |
| <p><br /> |
| </p> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section7" aria-hidden="true"> <label for="collapse-section7" aria-hidden="true">V1.4.4 / 01-April-2022</label> |
| <div> |
| <h2 id="main-changes-2">Main Changes</h2> |
| <h3 id="maintenance-release-2">Maintenance release</h3> |
| <ul> |
| <li><p>General updates to fix known defects and enhancements implementation.</p></li> |
| <li><strong>HAL/LL Drivers</strong> updates |
| <ul> |
| <li><strong>HAL ADC</strong> updates |
| <ul> |
| <li>Update LL_ADC driver to prevent unused argument compilation warning.</li> |
| <li>Update to manage constraint: ADC must be disable to modify bitfields of register ADC_CFGR1 and ADC_CFGR2</li> |
| <li>In LL and HAL drivers, references to 3 ADC registers renamed to align on CMSIS and reference manual: {TR1, TR2, TR3} renamed {AWD1TR, AWD2TR, AWD3TR}.</li> |
| </ul></li> |
| <li><strong>HAL DAC</strong> updates |
| <ul> |
| <li>Add new HAL DAC APIs to start/stop conversion on both channels |
| <ul> |
| <li>HAL_DACEx_DualStart()</li> |
| <li>HAL_DACEx_DualStop()</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL FLASH</strong> updates |
| <ul> |
| <li>Fix Wrong definition of FLASH operation error |
| <ul> |
| <li>HAL_FLASH_ERROR_OP value updated to FLASH_SR_OPERR instead of FLASH_SR_EOP</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL/LL RCC</strong> updates |
| <ul> |
| <li>Enhance the PLL configuration in HAL_RCC_ClockConfig() API.</li> |
| <li>Add the following new APIs to check if PLL output mapped on different domain clock is enabled: |
| <ul> |
| <li>LL_RCC_PLL_IsEnabledDomain_ADC()</li> |
| <li>LL_RCC_PLL_IsEnabledDomain_I2S1()</li> |
| <li>LL_RCC_PLL_IsEnabledDomain_I2S2()</li> |
| <li>LL_RCC_PLL_IsEnabledDomain_RNG()</li> |
| <li>LL_RCC_PLL_IsEnabledDomain_FDCAN()</li> |
| <li>LL_RCC_PLL_IsEnabledDomain_USB()</li> |
| <li>LL_RCC_PLL_IsEnabledDomain_TIM1()</li> |
| <li>LL_RCC_PLL_IsEnabledDomain_TIM15()</li> |
| <li>LL_RCC_PLL_IsEnabledDomain_SYS()</li> |
| </ul></li> |
| <li>Enhance the following APIs implementation to check the PLL output enable bit status: |
| <ul> |
| <li>LL_RCC_GetI2SClockFreq()</li> |
| <li>LL_RCC_GetTIMClockFreq()</li> |
| <li>LL_RCC_GetRNGClockFreq()</li> |
| <li>LL_RCC_GetADCClockFreq()</li> |
| <li>LL_RCC_GetUSBClockFreq()</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL CEC</strong> updates |
| <ul> |
| <li>HAL code quality enhancement for MISRA-C Rule-8.13 by adding const qualifiers</li> |
| </ul></li> |
| <li><strong>HAL/LL TIM</strong> updates |
| <ul> |
| <li>Manage configuration of the Capture/compare DMA request source</li> |
| <li>Add related new exported constants (TIM_CCDMAREQUEST_CC, TIM_CCDMAREQUEST_UPDATE).</li> |
| <li>Create a new macro __HAL_TIM_SELECT_CCDMAREQUEST() allowing to program the TIMx_CR2.CCDS bitfield.</li> |
| <li>HAL code quality enhancement for MISRA-C Rule-8.13 by adding const qualifiers</li> |
| <li>__LL_TIM_CALC_PSC() macro update to round up the evaluate value when the fractional part of the division is greater than 0.5.</li> |
| </ul></li> |
| <li><strong>HAL LPTIM</strong> updates |
| <ul> |
| <li>Add check on PRIMASK register to prevent from enabling unwanted global interrupts within LPTIM_Disable() and LL_LPTIM_Disable()</li> |
| <li>HAL code quality enhancement for MISRA-C Rule-8.13 by adding const qualifiers</li> |
| </ul></li> |
| <li><strong>HAL UART</strong> updates |
| <ul> |
| <li>Add a check on the UART parity before enabling the parity error interruption.</li> |
| <li>Improve header description of UART_WaitOnFlagUntilTimeout() function</li> |
| <li>Add const qualifier for read only pointers.</li> |
| <li>Fix wrong cast when computing the USARTDIV value in UART_SetConfig().</li> |
| <li>HAL code quality enhancement for MISRA-C Rule-8.13 by adding const qualifiers</li> |
| </ul></li> |
| <li><strong>LL LPUART</strong> updates |
| <ul> |
| <li>TXFECF reference removed from LL LPUART driver.</li> |
| </ul></li> |
| <li><strong>HAL/LL USART</strong> updates |
| <ul> |
| <li>Add a check on the USART parity before enabling the parity error interrupt.</li> |
| <li>Improve header description of USART_WaitOnFlagUntilTimeout() function</li> |
| <li>Add const qualifier for read only pointers.</li> |
| <li>Fix compilation warnings generated with ARMV6 compiler</li> |
| </ul></li> |
| <li><strong>HAL IRDAL</strong> updates |
| <ul> |
| <li>Add a check on the IRDA parity before enabling the parity error interrupt.</li> |
| <li>Improve header description of IRDA_WaitOnFlagUntilTimeout() function</li> |
| <li>Add const qualifier for read only pointers.</li> |
| <li>Fix wrong cast when computing the USARTDIV value in IRDA_SetConfig().</li> |
| </ul></li> |
| <li><strong>HAL SMARTCARD</strong> updates |
| <ul> |
| <li>Improve header description of SMARTCARD_WaitOnFlagUntilTimeout() function</li> |
| <li>Add const qualifier for read only pointers.</li> |
| <li>Fix wrong cast when computing the USARTDIV value in SMARTCARD_SetConfig().</li> |
| </ul></li> |
| <li><strong>HAL I2C</strong> updates |
| <ul> |
| <li>Update to handle errors in polling mode. |
| <ul> |
| <li>Rename I2C_IsAcknowledgeFailed() to I2C_IsErrorOccurred() and correctly manage when error occurs.</li> |
| </ul></li> |
| <li>Update to fix issue detected due to low system frequency execution (HSI).</li> |
| <li>Declare an internal macro link to DMA macro to check remaining data: I2C_GET_DMA_REMAIN_DATA</li> |
| <li>Timeout issue using HAL MEM interface through FreeRTOS</li> |
| </ul></li> |
| <li><strong>HAL SMBUS</strong> updates |
| <ul> |
| <li>Add the support of wake up capability.</li> |
| <li>Update to fix issue of mismatched data received by master in case of data size to be transmitted by the slave is greater than the data size to be received by the master. |
| <ul> |
| <li>Add flush on TX register.</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL USB</strong> updates |
| <ul> |
| <li>HAL USB: fix Isochronous double buffer mode IN transfer issue</li> |
| <li>PCD: add supporting multi packets transfer on Interrupt endpoint</li> |
| <li>HAL: PCD: Set DCD timeout to minimum of 300ms before starting BCD primary detection process</li> |
| <li>HAL: PCD: software correction added to avoid unexpected STALL condition during EP0 multi packet OUT transfer.</li> |
| </ul></li> |
| <li><strong>LL UCPD</strong> updates |
| <ul> |
| <li>Correction of register accessed by LL_UCPD_ReadRxPaySize macro.</li> |
| </ul></li> |
| <li><strong>Documentation</strong> |
| <ul> |
| <li>"<span class="citation" data-cites="ref">@ref</span>" Doxygen tags removed from PDF User Manual</li> |
| </ul></li> |
| </ul></li> |
| </ul> |
| <h2 id="known-limitations-2">Known limitations</h2> |
| <ul> |
| <li>USB HAL limitation: Double buffer mode is not functional with isochronous data transfers in host mode.</li> |
| </ul> |
| <h2 id="development-toolchains-and-compilers-2">Development Toolchains and Compilers</h2> |
| <ul> |
| <li>IAR Embedded Workbench for ARM (EWARM) toolchain V8.50.9</li> |
| <li>RealView Microcontroller Development Kit (MDK-ARM) toolchain V5.31</li> |
| <li>STM32CubeIDE toolchain (gcc9_2020_q2_update) v1.7.0</li> |
| </ul> |
| <h2 id="supported-devices-and-boards-2">Supported Devices and boards</h2> |
| <p>Supported Devices:</p> |
| <ul> |
| <li>STM32G0C1xx, STM32G0B1xx, STM32G0B0xx</li> |
| <li>STM32G061xx, STM32G051xx, STM32G050xx</li> |
| <li>STM32G081xx, STM32G071xx, STM32G070xx</li> |
| <li>STM32G041xx, STM32G031xx, STM32G030xx</li> |
| </ul> |
| <h2 id="backward-compatibility-2">Backward Compatibility</h2> |
| <p>This release is compatible with the previous versions.</p> |
| <h2 id="dependencies-2">Dependencies</h2> |
| <p><br /> |
| </p> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section6" aria-hidden="true"> <label for="collapse-section6" aria-hidden="true">V1.4.3 / 15-December-2021</label> |
| <div> |
| <h2 id="main-changes-3">Main Changes</h2> |
| <h3 id="maintenance-release-3">Maintenance release</h3> |
| <ul> |
| <li><strong>HAL/LL Drivers</strong> updates |
| <ul> |
| <li><strong>HAL USB</strong> update |
| <ul> |
| <li>Footprint optimization in case USB double buffer mode not used, code protected with new define USE_USB_DOUBLE_BUFFER</li> |
| <li>Update to avoid multiple reads of USB ISR register</li> |
| <li>Add new API HAL_PCD_EP_Abort() to abort current USB endpoint transfer.</li> |
| <li>Adding support of Azure USBx middleware stack</li> |
| </ul></li> |
| </ul></li> |
| </ul> |
| <h2 id="known-limitations-3">Known limitations</h2> |
| <ul> |
| <li>USB HAL limitation: Double buffer mode is not functional with isochronous data transfers in host mode.</li> |
| </ul> |
| <h2 id="development-toolchains-and-compilers-3">Development Toolchains and Compilers</h2> |
| <ul> |
| <li>IAR Embedded Workbench for ARM (EWARM) toolchain V8.50.9</li> |
| <li>RealView Microcontroller Development Kit (MDK-ARM) toolchain V5.31</li> |
| <li>STM32CubeIDE toolchain v1.7.0</li> |
| </ul> |
| <h2 id="supported-devices-and-boards-3">Supported Devices and boards</h2> |
| <p>Supported Devices:</p> |
| <ul> |
| <li>STM32G0C1xx, STM32G0B1xx, STM32G0B0xx</li> |
| <li>STM32G061xx, STM32G051xx, STM32G050xx</li> |
| <li>STM32G081xx, STM32G071xx, STM32G070xx</li> |
| <li>STM32G041xx, STM32G031xx, STM32G030xx ## Backward Compatibility</li> |
| </ul> |
| <p>This release is compatible with the previous versions.</p> |
| <h2 id="dependencies-3">Dependencies</h2> |
| <p><br /> |
| </p> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section5" aria-hidden="true"> <label for="collapse-section5" aria-hidden="true">V1.4.2 / 17-Juin-2021</label> |
| <div> |
| <h2 id="main-changes-4">Main Changes</h2> |
| <h3 id="maintenance-release-4">Maintenance release</h3> |
| <ul> |
| <li><p>General updates to fix known defects and enhancements implementation.</p></li> |
| <li><p><strong>HAL/LL Drivers</strong> updates</p></li> |
| <li><strong>HAL CEC</strong> update |
| <ul> |
| <li>Update HAL_CEC_IRQHandler() API to avoid appending an extra byte to the end of a message.</li> |
| </ul></li> |
| <li><strong>HAL/LL SPI</strong> update |
| <ul> |
| <li>Fix MISRA-C 2012 Rule-13.2 error.</li> |
| <li>Update to set the FRXTH bit for 8bit data in LL_SPI_Init() API.</li> |
| <li>Update LL_SPI_TransmitData8() API to avoid casting the result to 8 bits.</li> |
| </ul></li> |
| <li><strong>HAL RCC</strong> update |
| <ul> |
| <li>Update to fix HSI48 flag definition. Add missing STM32G0C1 specific MCO prescaler values to docstring. Update GetOscConfig() API to correct wrong HSIDiv value.</li> |
| <li>Add new API HAL_RCC_GetResetSource() to get all reset sources and clear flags for next reset.</li> |
| </ul></li> |
| <li><strong>HAL DMA</strong> update |
| <ul> |
| <li>Update HAL_DMA_IRQHandler() API to set the DMA state before unlocking access to the DMA handle.</li> |
| </ul></li> |
| <li><strong>HAL FLASH</strong> update |
| <ul> |
| <li>Clarification comment of the program type added to the HAL_FLASH_Program() and HAL_FLASH_Program_IT() APIs.</li> |
| </ul></li> |
| <li><strong>HAL EXTI</strong> update |
| <ul> |
| <li>Update HAL_EXTI_GetConfigLine() API to set default configuration value of Trigger and GPIOSel before checking each corresponding registers.</li> |
| </ul></li> |
| <li><strong>HAL/LL RTC</strong> update |
| <ul> |
| <li>Fix an error in IS_LL_RTC_MONTH leading to assert failure.</li> |
| <li>New APIs to subtract or add one hour to the calendar in one single operation without going through the initialization procedure (Daylight Saving): |
| <ul> |
| <li>HAL_RTC_DST_Add1Hour()</li> |
| <li>HAL_RTC_DST_Sub1Hour()</li> |
| <li>HAL_RTC_DST_SetStoreOperation()</li> |
| <li>HAL_RTC_DST_ClearStoreOperation()</li> |
| <li>HAL_RTC_DST_ReadStoreOperation()</li> |
| </ul></li> |
| <li>DayLightSaving and StoreOperation interfaces from RTC_TimeTypeDef type and __HAL_RTC_DAYLIGHT_SAVING_TIME_ADD1H() and __HAL_RTC_DAYLIGHT_SAVING_TIME_SUB1H() macros are now deprecated.</li> |
| </ul></li> |
| <li><strong>HAL CRYP</strong> update |
| <ul> |
| <li>Update HAL_CRYP_SetConfig() and HAL_CRYP_GetConfig() APIs to set/get the continent of KeyIVConfigSkip correctly. Resolve interrupt mode related GCM decryption issue causing wrong computation of decryption size. Update HAL_CRYP_InCpltCallback() API to fix an incorrect condition call at resumption time.</li> |
| <li>Update CRYP_AESCCM_Process_IT() API to manage header lengths in bytes or words when header length is less than 16 bytes.</li> |
| </ul></li> |
| <li><strong>HAL COMP</strong> update |
| <ul> |
| <li>Update wait_loop_index computation so delay in us is always multiplicated by at least value “1”.</li> |
| </ul></li> |
| <li><strong>HAL IWDG</strong> update |
| <ul> |
| <li>Update HAL_IWDG_Init() API in order to fix HAL_GetTick() timeout vulnerability issue.</li> |
| </ul></li> |
| <li><strong>HAL/LL RCC</strong> update |
| <ul> |
| <li>Private functions made static.</li> |
| <li>Add missing STM32G0C1 specific MCO prescaler values to docstring.</li> |
| <li>Update to fix HSI48 flag definition.</li> |
| <li>Update GetOscConfig() API to correct wrong HSIDiv value.</li> |
| <li>Add LSI startup time in default IWDG timeout calculation (HAL_IWDG_DEFAULT_TIMEOUT).</li> |
| <li>Add new API HAL_RCC_GetResetSource() to get all reset sources and clear flags for next reset.</li> |
| </ul></li> |
| <li><strong>HAL GPIO</strong> update |
| <ul> |
| <li>Update HAL_GPIO_Init() API to avoid the configuration of PUPDR register when Analog mode is selected.</li> |
| </ul></li> |
| <li><strong>HAL I2C</strong> update |
| <ul> |
| <li>Update I2C_IsAcknowledgeFailed() API to avoid I2C in busy state if NACK received after transmitting register address.</li> |
| </ul></li> |
| <li><strong>HAL SMBUS</strong> update |
| <ul> |
| <li>Add support for Fast Mode Plus to be SMBUS Rev3 compliant. |
| <ul> |
| <li>Add HAL_SMBUSEx_EnableFastModePlus() and HAL_SMBUSEx_DisableFastModePlus() APIs to manage Fm+.</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL RNG</strong> update |
| <ul> |
| <li>Update timeout mechanism to avoid false timeout detection in case of preemption.</li> |
| </ul></li> |
| <li><strong>HAL UART</strong> update |
| <ul> |
| <li>Update HAL_UART_IRQHandler() API to handle receiver timeout interrupt.</li> |
| <li>Update UART receive processes (IT and DMA) to handle the UART receive’s timeout interrupt.</li> |
| <li>Fix erroneous UART’s handle state in case of error returned after DMA reception start within UART_Start_Receive_DMA().</li> |
| <li>Correction on UART ReceptionType management in case of ReceptionToIdle API are called from RxEvent callback.</li> |
| <li>Handling of UART concurrent register access in case of race condition between Tx and Rx transfers (HAL UART and LL LPUART).</li> |
| <li>Remove an invalid FIFO mode configuration from UART_SetConfig() as it is not is not member of UART_InitTypeDef Structure.</li> |
| </ul></li> |
| <li><strong>HAL/LL USART</strong> update |
| <ul> |
| <li>Remove useless check on maximum BRR value by removing IS_LL_USART_BRR_MAX() macro.</li> |
| <li>LL_USART_ClockInit now supports clock phase and clock polarity configuration for SPI_Slave mode.</li> |
| <li>Handling of USART concurrent register access in case of race condition between Tx and Rx transfers.</li> |
| <li>Optimize stack usage for multiple APIs.</li> |
| </ul></li> |
| <li><strong>HAL/LL TIM</strong> update |
| <ul> |
| <li>Update LL_TIM_GetCounterMode() API to return the correct counter mode.</li> |
| <li>Correct reversed description of TIM_LL_EC_ONEPULSEMODE One Pulse Mode.</li> |
| <li>Update HAL_TIMEx_OnePulseN_Start() and HAL_TIMEx_OnePulseN_Stop() APIs (polling and IT mode) to take into consideration all OutputChannel parameters.</li> |
| <li>Update timeout mechanism to avoid false timeout detection in case of preemption.</li> |
| <li>Update input capture measurement in DMA mode to avoid zero return values at high frequencies.</li> |
| </ul></li> |
| <li><strong>HAL LPTIM</strong> update |
| <ul> |
| <li>Update HAL_LPTIM_Init() API implementation to configure digital filter for external clock when LPTIM is clocked by an internal clock source.</li> |
| </ul></li> |
| <li><strong>HAL IWDG</strong> update |
| <ul> |
| <li>Update HAL_IWDG_Init() API in order to fix HAL_GetTick() timeout vulnerability issue.</li> |
| <li>Add LSI startup time in default IWDG timeout calculation (HAL_IWDG_DEFAULT_TIMEOUT).</li> |
| </ul></li> |
| <li><strong>HAL/LL ADC</strong> update |
| <ul> |
| <li>Update wait_loop_index computation so delay in us is always multiplicated by at least value “1”.</li> |
| <li>Fix wrong internal regulator stabilization time to be aligned with the datasheet: 20us instead of 10us.</li> |
| </ul></li> |
| <li><strong>HAL USB</strong> update |
| <ul> |
| <li>Add fix transfer complete for IN Interrupt transaction in single buffer mode.</li> |
| <li>stm32g0xx_hal_hcd.h/c updated to add #if #endif pre-processor directives for devices that do not support USB DRD feature.</li> |
| <li>Add fix transfer complete for IN Interrupt transaction in single buffer mode.</li> |
| </ul></li> |
| </ul> |
| <h2 id="known-limitations-4">Known limitations</h2> |
| <ul> |
| <li>USB HAL limitation: Double buffer mode is not functional with isochronous data transfers in host mode.</li> |
| </ul> |
| <h2 id="development-toolchains-and-compilers-4">Development Toolchains and Compilers</h2> |
| <ul> |
| <li>IAR Embedded Workbench for ARM (EWARM) toolchain V8.50.9</li> |
| <li>RealView Microcontroller Development Kit (MDK-ARM) toolchain V5.31</li> |
| <li>STM32CubeIDE toolchain v1.7.0</li> |
| </ul> |
| <h2 id="supported-devices-and-boards-4">Supported Devices and boards</h2> |
| <p>Supported Devices:</p> |
| <ul> |
| <li>STM32G0C1xx, STM32G0B1xx, STM32G0B0xx</li> |
| <li>STM32G061xx, STM32G051xx, STM32G050xx</li> |
| <li>STM32G081xx, STM32G071xx, STM32G070xx</li> |
| <li>STM32G041xx, STM32G031xx, STM32G030xx ## Backward Compatibility</li> |
| </ul> |
| <p>This release is compatible with the previous versions.</p> |
| <h2 id="dependencies-4">Dependencies</h2> |
| <p><br /> |
| </p> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section6" aria-hidden="true"> <label for="collapse-section6" aria-hidden="true">V1.4.1 / 25-February-2021</label> |
| <div> |
| <h2 id="main-changes-5">Main Changes</h2> |
| <h3 id="patch-release">Patch release</h3> |
| <p>Patch release of <strong>HAL and Low Layer</strong> drivers</p> |
| <p><strong>Additional features</strong></p> |
| <table> |
| <thead> |
| <tr class="header"> |
| <th style="text-align: left;">Headline</th> |
| </tr> |
| </thead> |
| <tbody> |
| <tr class="odd"> |
| <td style="text-align: left;"><strong>HAL FLASH</strong> driver update to support all STM32G0C1xx devices (with 128K dual bank and mono bank)</td> |
| </tr> |
| </tbody> |
| </table> |
| <h2 id="known-limitations-5">Known limitations</h2> |
| <ul> |
| <li>USB HAL limitation: Double buffer mode is not functional with isochronous data transfers in host mode.</li> |
| </ul> |
| <h2 id="development-toolchains-and-compilers-5">Development Toolchains and Compilers</h2> |
| <ul> |
| <li>IAR Embedded Workbench for ARM (EWARM) toolchain V8.30.1</li> |
| <li>RealView Microcontroller Development Kit (MDK-ARM) toolchain V5.29</li> |
| <li>STM32CubeIDE toolchain v1.5.0</li> |
| </ul> |
| <h2 id="supported-devices-and-boards-5">Supported Devices and boards</h2> |
| <p>Supported Devices:</p> |
| <ul> |
| <li>STM32G0C1xx, STM32G0B1xx, STM32G0B0xx</li> |
| <li>STM32G061xx, STM32G051xx, STM32G050xx</li> |
| <li>STM32G081xx, STM32G071xx, STM32G070xx</li> |
| <li>STM32G041xx, STM32G031xx, STM32G030xx</li> |
| </ul> |
| <h2 id="backward-compatibility-3">Backward Compatibility</h2> |
| <p>This release is compatible with the previous versions.</p> |
| <h2 id="dependencies-5">Dependencies</h2> |
| <p><br /> |
| </p> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section5" aria-hidden="true"> <label for="collapse-section5" aria-hidden="true">V1.4.0 / 29-October-2020</label> |
| <div> |
| <h2 id="main-changes-6">Main Changes</h2> |
| <h3 id="maintenance-release-and-product-update">Maintenance release and Product Update</h3> |
| <p><strong>Official release</strong> of HAL and Low layers drivers introducing <strong>STM32G0C1xx/STM32G0B1xx/STM32G0B0xx</strong> devices and <strong>STM32G061xx/STM32G051xx/STM32G050xx</strong> devices.</p> |
| <p>Maintenance release of HAL and Low layers drivers supporting STM32G041xx/STM32G031xx/STM32G030xx and STM32G081xx/STM32G071xx/STM32G070xx devices.</p> |
| <table> |
| <thead> |
| <tr class="header"> |
| <th style="text-align: left;">New supported IP on STM32G0C1xx/B1xx/B0xx devices</th> |
| </tr> |
| </thead> |
| <tbody> |
| <tr class="odd"> |
| <td style="text-align: left;">CRS</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">DMA2</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">FDCAN</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">FLASH DUAL BANK</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">USB</td> |
| </tr> |
| </tbody> |
| </table> |
| <table> |
| <thead> |
| <tr class="header"> |
| <th>New instances/features on STM32G0C1xx/B1xx/B0xx devices (not exhaustive)</th> |
| </tr> |
| </thead> |
| <tbody> |
| <tr class="odd"> |
| <td>I2C3, SPI3, LPUART2, USART5, USART6, COMP3, TIM4, TAMPER3, WAKEUP_PIN5, MCO2, PVM/VDDIO2, HSI48</td> |
| </tr> |
| </tbody> |
| </table> |
| <table> |
| <thead> |
| <tr class="header"> |
| <th style="text-align: left;">New supported IP on STM32G061xx/G051xx/50xx devices</th> |
| </tr> |
| </thead> |
| <tbody> |
| <tr class="odd"> |
| <td style="text-align: left;">COMP1, COMP2</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">DAC</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">TIM6, TIM7, TIM15</td> |
| </tr> |
| </tbody> |
| </table> |
| <p><strong>Fixed bug list</strong></p> |
| <table> |
| <thead> |
| <tr class="header"> |
| <th style="text-align: left;">Headline</th> |
| </tr> |
| </thead> |
| <tbody> |
| <tr class="odd"> |
| <td style="text-align: left;">[Codespell] Correct misspelled words in HAL/LL drivers</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[ADC] Typo correction in comments</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[ADC] HAL ADC value from channel TempSensor wrong at 1st read</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[ADC] LL [GithHub][HAL_LL] Issue with ‘register’ storage class specifier, should be removed</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[ADC] ADC must manage CCRDY flag during configuration</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[ADC] Robustness improvement - Parameter SequencerLength can be discarded depending on sequencer config</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[ADC] Create two functions to ease configuration of internal channels</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[ADC] ADC AUTDLY and DMA</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[COMP] LL [GithHub][HAL_LL] Issue with ‘register’ storage class specifier, should be removed</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[COMP] Improve PDF document generation</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[COMP] HAL wrong PINS described in comment for COMPx_INM</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[COMP] Fix MISRA C 2012 issues : MISRAC2012-Rule-10.4</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[CRYP] Correction for Official NIST CCM test pattern enciphering failing when header length is null</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[CRYP] GCM/GMAC/CCM data header feed in DMA mode</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[CRYP] Fix CRYP HAL driver to manage GCM header lengths not multiple of 4 bytes in 8-bit, 16-bit and 32-bit data types.</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[CRYP] GCM: handling of AUD with size not multiple of 4 bytes not properly handle in CRYP_AESGCM_Process_IT</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[CRYP] Misleading API comments related to data length</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[CRYP] Restriction regarding size field on HAL_CRYP_Encrypt_DMA, HAL_CRYP_Decrypt_DMA API</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[CRYP][Doc] Move ASCII table outside the files header</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[CRYP] Code Sonar issue detected in HAL_CRYP_Resume</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[CRYP] Resumption issue when an authentication algorithm suspends another authentication algorithm</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[CRYP] Payloads sum not saved in case of suspend / resume of GCM ciphering - <strong>API update</strong></td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[CRYP] AES GCM: Need to support data encrypt/decrypt with length not multiple of 16 bytes - <strong>API update</strong></td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[CRYP] AES GCM: handling of ADD with size not multiple of 4 bytes - <strong>API update</strong></td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[CRYP][MISRA C:2012] Fix warnings affecting rules 2.2_c, 10.1_R6, 10.3, 10.4_a, 10.6, 12.1, 13.5 15.7 - <strong>API update</strong></td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[CRS] Wrong value for CRS_HSI48CALIBRATION_DEFAULT</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[DMA] LOCK UNLOCK process to modify, as LOCK is done at Start and UNLOCK is done at Completion processus</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[DMA] Exti interrupt doesn’t need to be enabled when it used as the DMAMUX synchronization</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[DMAMUX] correct warning during chm generation</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[DMA] LL_DMA_ClearFlag_GIx : add text informing user not to clear GIx when channel on</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[DMA] two requests are missing for TIM16 and TIM17 (i.e. renaming according to RM)</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[EXTI] Use of <strong>LINE</strong> as a macro parameter conflicts with standard C usage</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[FLASH] Correction in macro __HAL_FLASH_GET_FLAG</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[FLASH] Use CMSIS feature switches instead of devices switches to define OPTIONBYTE_ALL & OB_USER_ALL</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[FLASH] Wrong ECC management in HAL FLASH driver</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[FLASH] Move FLASH_SIZE define from hal flash.h to cmsis device file</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[G0 512K][FLASH] Remove <strong>FLASH_FLAG_ALL_ERRORS</strong></td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[G0 512K][FLASH] <strong>Add new API for dual bank, new option bytes</strong></td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[G0 512K][FLASH] <strong>Update to handle swap bank in pcrop config and implement sticky2 area</strong></td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[HAL] Replace devices switches by CMSIS feature switch when possible</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[HAL] Add FDCAN & USB (HCD/PCD) inclusion in hal_conf_template.h</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[HAL] HAL - Tick priority handling in HAL_Init_Tick() is TIM/RTC time base template</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[HAL] [McuAStyle] - HAL and LL code update for obvious rules violation</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[LL GENERIC] Support of new ARM compiler Keil V6 (AC5-like warnings mode)</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[HAL GENERIC] Use all G0 Family common Timer in stm32g0xx_hal_timebase_tim_template.h</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[HAL GENERIC] Correct regression on HAL_SetTickFreq</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[HAL GENERIC][MISRA C 2012] uwTickFreq cast in (uint32_t) in HAL_InitTick() to avoid MISRA issue</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[HAL GENERIC] <strong>Add new API HAL_GET_PENDING_IT() to determine interrupt source per line</strong></td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[GPIO] HAL - Update initialization sequence in HAL_GPIO_Init to avoid a glitch (Sw workaround)</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[GPIO] LL - LL_GPIO_Init() generate undesired pulse</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[GPIO] HAL - bug on HAL_GPIO_TogglePin: doesn’t allow toggle multiple pin</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[GPIO-LL] Correct issue with LL_GPIO_TogglePin function</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[GPIO] HAL_GPIO_DeInit() bug on EXTI management</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[I2C] LL - [GithHub][HAL_LL] Issue with ‘register’ storage class specifier, should be removed</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[I2C] I2C slave interrupt handling issue</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[I2C][MISRAC2012-Rule-2.2_c] Value assigned to variable `tmpITFlags’ is never used</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[I2C] Incorrectly enable interrupts in I2C_Enable_IRQ routine when InterruptRequest = I2C_XFER_CPLT_IT</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[I2C] HardFault in I2C_DMAXferCplt</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[I2C] Sequential transfer MAX_NBYTE_SIZE correspond to no reload</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[I2C] Correct compilation Warning: variable "tmp" was set but never used</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[I2C][CHM generation] <span class="citation" data-cites="ref">@ref</span> IS_xxx macro can’t be resolved since CMSIS file is not included</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[IWDG] LL - IWDG start-up timeout insufficiently low</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[LPTIM] Digital filter for external clock should be configured also when LPTIM is clocked by an internal clock source</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[LPTIM] <strong>LPTIM related EXTI interrupts should be handled from within the driver</strong></td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[PWR] <strong>HAL PVD API should me moved to extension file</strong></td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[PWR] PWR_WAKEUP_PIN5 should be defined only if PWR_CR3_EWUP5 is defined</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[RCC] RCC_CCIPR2_USBFSSEL renaming in RCC_CCIPR2_USBSEL</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[RCC] Improve CHM/PDF Document generation</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[RCC] LL - <strong>Add API LL_RCC_PLL_ConfigDomain_FDCAN(), LL_RCC_PLL_EnableDomain_FDCAN(), LL_RCC_PLL_DisableDomain_FDCAN()</strong></td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[RCC] LL - STM32G0xx_ll_rcc.h bug with ADC clock selection</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[RCC] LL - <strong>FW is missing some RCC LL defines for due to addition of RCC_CFGR_MCOPRE_3 & RCC_CFGR_MCOSEL_3 bits</strong></td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[RCC] HAL - stm32g0xx_hal_rcc_ex.h #if (macro) -> #if defined(macro)</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[RCC] HAL [MISRA C 2012] Correction for new warning MISRAC2012-Rule-15.7</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[RCC] <strong>RCC_CCIPR2_CK48MSEL renaming in RCC_CCIPR2_USBFSSEL</strong></td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[RCC] [McuAStyle] - HAL and LL code update for obvious rules violation</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[RTC] LL/HAL - Issue with ‘register’ storage class specifier, should be removed</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[RCC] Constants <strong>RCC_CFGR_</strong> shall be removed from CMSIS</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[RTC] wrong reference to RTC, use RTCx instead</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[RTC] Correct RTC_HOURFORMAT12_PM definition</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[RTC] Correction in HAL_RTC_GetAlarm() - wrong shift mask used to get TimeFormat</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[RTC] Correction in HAL_RTCEx_TimeStampIRQHandler()</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[SMARTCARD] HAL - No repetition after NACK is received in smartcard T=0</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[SMARTCARD] remove SMARTCARD default PCLK1 clock source on USART2, since USART2 is a basic instance with no SMARTCARD.</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[SMBUS] Implement SMBus "wrong PEC" fix in driver</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[SMBUS] [MISRAC2012] struct __SMBUS_HandleTypeDef is wrongly used in all static functions</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[SPI] Problematic timeout management inside SPI DMA xfer complete handler (interrupt context)</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[SPI] Correct problematic timeout management inside SPI DMA xfer complete handler (interrupt context)</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[SPI] HAL - Issue in 3wires communication (Need Disable / Enable SPI</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[SPI] HAL - BaudRatePrescaler: Assert must not be call in Slave Motorola mode + Add Mask</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[SPI] HAL - SPI Tx DMA request is disabled in Rx DMA transfer complete callback function</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[SPI] HAL - [I2S] HAL_I2S_DMAStop doesn’t check the BSY flag as described in RM0390</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[SPI] HAL - MISRA C 2012 - regression on I2S</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[SPI] HAL - HAL_SPI_Receive doesn’t work after HAL_SPI_Transmit in half-duplex mode</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[SPI] LL/HAL Issue with ‘register’ storage class specifier, should be removed</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[SPI] SPI Tx DMA request is disabled in Rx DMA transfer complete callback function</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[SPI] SPI driver unaligned data</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[SYSCFG-HAL]The function LL_SYSCFG_EnableDBATT() shall be removed</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[TIM] All HAL_TIM_xxx_Start functions systematically access the TIMx_SMCR register even though the TIMx instance cannot be used as slave timer</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[TIM] TIM DMA burst mode should be enhanced</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[TIM] Wrong references to TIM_DMABASE_AF1 and TIM_DMABASE_AF2</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[TIM] HAL_TIM_DMABurst_(Read/Write)Stop returns HAL_ERROR when called while DMA transfer is completed</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[TIM] LL/HAL Issue with ‘register’ storage class specifier, should be removed</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[TIM] LL - COUNTERMODE defines are inverted for TIM_CR1_CMS in ll_tim.h</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[TIM] HAL - Order of disabling in <code>HAL_TIM_IC_Stop_DMA</code> function</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[TIM] Wrong instance parameter check in encoder mode - Replace IS_TIM_CC2_INSTANCE by IS_TIM_ENCODER_INTERFACE_INSTANCE</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[TIM] Correct RepetitionCounter value</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[TIM] <strong>Provide API to set and clear UIFREMAP</strong></td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[TIM] Remove <strong>Useless define in ll_tim.h</strong></td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[TIM] Bug in HAL libraries when using multiple DMA request to different channels of same timer</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[UART] Implementation of HAL UART enhanced reception services (ReceptionToIdle) <strong>API update</strong></td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[UART] LL/HAL Issue with ‘register’ storage class specifier, should be removed</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[UART] HAL MISRA C 2012 - regression on UART</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[UART] HAL Rework BRR register value computation in HAL_UART_Init() for ROM size gain</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[UART] <strong>Add Receiver Timeout to UART HAL flags and IRQ macros</strong></td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;"><strong>New functions added</strong>:</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue)</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart)</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart)</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">New definition HAL_UART_ERROR_RTO, UART_FLAG_RTOF, UART_IT_RTO, UART_CLEAR_RTOF</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">New macro IS_UART_RECEIVER_TIMEOUT_VALUE()</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[UART] Deadlock scenario while mixing polling Transmit and IT Receive requests</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[USART] Fix typos introduced in some APIs descriptions</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[USART] [CHM documentation] <span class="citation" data-cites="ref">@ref</span> IS_xxx macro can’t be resolved since CMSIS file is not included</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[USART] LL/HAL Issue with ‘register’ storage class specifier, should be removed</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[USART][CHM documentation] <span class="citation" data-cites="ref">@ref</span> IS_xxx macro can’t be resolved since CMSIS file is not included</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[VREFBUF] G0 Family has only one VREBUF calibration point, Range 1</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[WWDG] HAL Correct header to improve PDF generation</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[UCPD] LL Allow UCPD HBIT Clock divider and prescaler configuration</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[UCPD] Change default values for CFGR1 registers</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[UCPD] Missing defines for UCPD in UM2570</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[UCPD] LL_UCPD_IMR_RXERR should be removed</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[UTILS] Turn <strong>UTILS_SetFlashLatency() into public function</strong></td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[UTILS] <strong>Rename UTILS_SetFlashLatency() into LL_SetFlashLatency()</strong></td> |
| </tr> |
| </tbody> |
| </table> |
| <h2 id="known-limitations-6">Known limitations</h2> |
| <ul> |
| <li>USB HAL limitation: Double buffer mode is not functional with isochronous data transfers in host mode.</li> |
| </ul> |
| <h2 id="development-toolchains-and-compilers-6">Development Toolchains and Compilers</h2> |
| <ul> |
| <li>IAR Embedded Workbench for ARM (EWARM) toolchain V8.30.1</li> |
| <li>RealView Microcontroller Development Kit (MDK-ARM) toolchain V5.29</li> |
| <li>STM32CubeIDE toolchain v1.5.0</li> |
| </ul> |
| <h2 id="supported-devices-and-boards-6">Supported Devices and boards</h2> |
| <p>Supported Devices:</p> |
| <ul> |
| <li><strong>STM32G0C1xx, STM32G0B1xx, STM32G0B0xx</strong></li> |
| <li><strong>STM32G061xx, STM32G051xx, STM32G050xx</strong></li> |
| <li>STM32G081xx, STM32G071xx, STM32G070xx</li> |
| <li>STM32G041xx, STM32G031xx, STM32G030xx</li> |
| </ul> |
| <h2 id="backward-compatibility-4">Backward Compatibility</h2> |
| <p>This release is compatible with the previous versions.</p> |
| <h2 id="dependencies-6">Dependencies</h2> |
| <p><br /> |
| </p> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section4" aria-hidden="true"> <label for="collapse-section4" aria-hidden="true">V1.3.0 / 25-June-2019</label> |
| <div> |
| <h2 id="main-changes-7">Main Changes</h2> |
| <h3 id="maintenance-release-5">Maintenance release</h3> |
| <p>Maintenance release of HAL and Low layers drivers supporting STM32G041xx/STM32G031xx/STM32G030xx and STM32G081xx/STM32G071xx/STM32G070xx devices.</p> |
| <p><strong>Fixed bugs list</strong></p> |
| <table> |
| <thead> |
| <tr class="header"> |
| <th style="text-align: left;">Headline</th> |
| </tr> |
| </thead> |
| <tbody> |
| <tr class="odd"> |
| <td style="text-align: left;">[FLASH HAL] Add Missing clear of End Of Operation flag in HAL FLASH_WaitForLastOperation() function</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[GPIO HAL] Correct issue on EXTI management in HAL_GPIO_DeInit()</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[IWDG] Update comments ti improve document generation</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[RNG HAL] Correct wrong bits used for Seed and Clock errors detection (CEI and SEI)</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[RNG] Add new definition for RNG error type : HAL_RNG_ERROR_BUSY, HAL_RNG_ERROR_SEED, HAL_RNG_ERROR_CLOCK</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[RNG] Update comments area to reflect Data Ready status behavior</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[SYSCFG LL] Correct wrong bit definition used for LL_SYSCFG_UCPD2_STROBE</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[TIM HAL] Master Slave Mode (MSM) configurable: add <span class="citation" data-cites="note">@note</span> in TIM_MasterConfigTypeDef</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[TIM HAL] Configure fast mode for One pulse mode: add new __HAL_TIM_DISABLE_OCxFAST() & __HAL_TIM_ENABLE_OCxFAST() macros</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[TIM HAL] Configure IT for break and dead-time API: add <span class="citation" data-cites="note">@note</span> HAL_TIMEx_ConfigBreakDeadTime()</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[TIM HAL] Remove useless uint16_t cast when clearing bit</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[USART/UART/IRDA/SMARTCARD HAL] Correction to avoid using macros with function calls as argument in PPP_SetConfig()</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[USART/UART/IRDA/SMARTCARD HAL] Fix minor doxygen issues to improve CHM document generation</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[USART/UART/IRDA HAL] Improve API description in HAL_PPP_Transmit/Receive() and HAL_PPP_Transmit/Receive()</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[IRDA/SMARTCARD HAL] In PPP_HandleTypeDef, ErrorCode field is now declared in volatile (__IO added)</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[USART LL] Update Macros __LL_USART_DIV_SAMPLING8() and __LL_USART_DIV_SAMPLING16 to use uint32_t</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[USART LL] Change USART_PRESCALER_TAB[] table definition from uint16_t to uint32_t</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[USART LL] [MISRAC2012-Rule-18.1_b/d] array out of bounds in LL_USART_SetBaudRate()</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[SMARTCARD HAL] [MISRAC2012-Rule-13.5] The right-hand operand of a logical && or || operator shall not contain side effects</td> |
| </tr> |
| </tbody> |
| </table> |
| <h2 id="development-toolchains-and-compilers-7">Development Toolchains and Compilers</h2> |
| <ul> |
| <li>IAR Embedded Workbench for ARM (EWARM) toolchain V8.20.2</li> |
| <li>RealView Microcontroller Development Kit (MDK-ARM) toolchain V5.25</li> |
| <li>System Workbench STM32 (SW4STM32) toolchain V2.7.2</li> |
| </ul> |
| <h2 id="supported-devices-and-boards-7">Supported Devices and boards</h2> |
| <p>Supported Devices:</p> |
| <ul> |
| <li>STM32G081xx, STM32G071xx, STM32G070xx</li> |
| <li>STM32G041xx, STM32G031xx, STM32G030xx</li> |
| </ul> |
| <h2 id="backward-compatibility-5">Backward Compatibility</h2> |
| <p>This release is compatible with the previous versions.</p> |
| <h2 id="dependencies-7">Dependencies</h2> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section3" aria-hidden="true"> <label for="collapse-section3" aria-hidden="true">V1.2.0 / 05-April-2019</label> |
| <div> |
| <h2 id="main-changes-8">Main Changes</h2> |
| <h3 id="maintenance-release-and-product-update-1">Maintenance release and product update</h3> |
| <p>First release of HAL and Low layers drivers to introduce support of <strong>STM32G041xx/STM32G031xx/STM32G030xx devices</strong>.</p> |
| <p>Maintenance release of HAL and Low layers drivers supporting STM32G081xx/STM32G071xx/STM32G070xx devices.</p> |
| <p><strong>Additional features</strong></p> |
| <table> |
| <thead> |
| <tr class="header"> |
| <th style="text-align: left;">Headline</th> |
| </tr> |
| </thead> |
| <tbody> |
| <tr class="odd"> |
| <td style="text-align: left;">HAL, LL Drivers update to support STM32G041xx, STM32G031xx, STM32G030xx</td> |
| </tr> |
| </tbody> |
| </table> |
| <p><strong>Fixed bugs list</strong></p> |
| <table> |
| <thead> |
| <tr class="header"> |
| <th style="text-align: left;">Headline</th> |
| </tr> |
| </thead> |
| <tbody> |
| <tr class="odd"> |
| <td style="text-align: left;">[HAL] Correct possible issue within HAL_SetTickFreq()function</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[HAL RCC] Use variable uwTickPrio instead TICK_INT_PRIORITY to not overwrite Tick priority</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[HAL RCC] Use LL macro __LL_RCC_CALC_PCLK1_FREQ() in HAL_RCC_GetPCLK1Freq() to solve misra c 2012 issues</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[LL ADC] LL function LL_ADC_SetCommonFrequencyMode() is useless in STM32G0, kept for legacy purpose.</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[HAL DAC] Rename HAL_DAC_MSP_INIT_CB_ID/HAL_DAC_MSP_DEINIT_CB_ID in HAL_DAC_MSPINIT_CB_ID/HAL_DAC_MSPDEINIT_CB_ID</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[HAL DAC] Internal function DAC_DMAConvCpltCh1(), DAC_DMAErrorCh1(), DAC_DMAHalfConvCpltCh1() moved to hal_dac_ex.c</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[HAL DAC] Use DAC driver define instead of CMSIS bit to check if software trigger enabled in HAL_DAC_Start()</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[HAL FLASH] HAL flash driver improvement : typo, comments correction, add U suffix, used CMSIS define instead of hard coded value, use HAL macro instead of direct register access</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[HAL FLASH] Clear FLASH_IT_ECCC flag when disabling End of Operation and Error interrupts in HAL_FLASH_IRQHandler()</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[HAL GPIO] Correct compilation warning with new IAR 8.30.1 in IS_GPIO_PIN() macro</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[HAL GPIO] Enhance re-entrance robustness for HAL_GPIO_TogglePin() API</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[LL PWR] Correct definition of LL_PWR_MODE_STOP0 and LL_PWR_MODE_STOP1</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[LL PWR] Correct definition of registers address-based accesses, which MUST be volatile</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[HAL RTC] Add management of INITF flag rising occurrence too early when entering init mode</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[HAL RTC] Correct WUTWF flag management in HAL_RTCEx_SetWakeUpTimer() API</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[HAL RTC] Rename RTC_IT_MASK into RTC_FLAG_MASK</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[HAL RTC] Replace hard coded values by CMSIS _Pos definition</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[HAL TIM] Align DMA Burst defines with the reference manual: Add TIM_DMABASE_TISEL definition</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[LL TIM] Remove parenthesis on REG parameter in LL_LPTIM_WriteReg() and LL_LPTIM_ReadReg() to avoid compilation failure after MISRA correction</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[HAL DMA] Add clean of Callbacks in HAL_DMA_DeInit() and remove it from HAL_DMA_Init()</td> |
| </tr> |
| </tbody> |
| </table> |
| <h2 id="development-toolchains-and-compilers-8">Development Toolchains and Compilers</h2> |
| <ul> |
| <li>IAR Embedded Workbench for ARM (EWARM) toolchain V8.20.2</li> |
| <li>RealView Microcontroller Development Kit (MDK-ARM) toolchain V5.25</li> |
| <li>System Workbench STM32 (SW4STM32) toolchain V2.7.2</li> |
| </ul> |
| <h2 id="supported-devices-and-boards-8">Supported Devices and boards</h2> |
| <p>Supported Devices:</p> |
| <ul> |
| <li>STM32G081xx, STM32G071xx, STM32G070xx</li> |
| <li><strong>STM32G041xx, STM32G031xx, STM32G030xx</strong></li> |
| </ul> |
| <h2 id="backward-compatibility-6">Backward Compatibility</h2> |
| <p>This release is compatible with the previous versions.</p> |
| <h2 id="dependencies-8">Dependencies</h2> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section2" aria-hidden="true"> <label for="collapse-section2" aria-hidden="true">V1.1.0 / 06-February-2019</label> |
| <div> |
| <h2 id="main-changes-9">Main Changes</h2> |
| <h3 id="maintenance-release-and-product-update-2">Maintenance release and product update</h3> |
| <p>Maintenance release of HAL and Low layers drivers to support STM32G071xx/STM32G081xx/STM32G070xx devices.</p> |
| <p><strong>Additional features</strong></p> |
| <table> |
| <thead> |
| <tr class="header"> |
| <th style="text-align: left;">Headline</th> |
| </tr> |
| </thead> |
| <tbody> |
| <tr class="odd"> |
| <td style="text-align: left;">MISRAC2012 implementation in CEC/CRYP/WWDG/RNG/I2S/SPI/UTILS/IWDG/USART/UART/I2C</td> |
| </tr> |
| </tbody> |
| </table> |
| <p><strong>Fixed bugs list</strong></p> |
| <table> |
| <thead> |
| <tr class="header"> |
| <th style="text-align: left;">Headline</th> |
| </tr> |
| </thead> |
| <tbody> |
| <tr class="odd"> |
| <td style="text-align: left;">[LL ADC] compilation warning in stm32g0xx_ll_adc.h with MDK-ARM</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[LL ADC] Wrong commentary in stm32g0xx_ll_adc.h</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[LL ADC] missing to fill ADC_CFGR2_CKMODE in LL_ADC_Init ()</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[LL ADC] redefinition of registers address MUST be volatile (_IO)</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[LL ADC] Potential infinite wait in while loop of LL_ADC_DeInit()</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[ADC] Embedded SW code comments or document must use ‘’Peripheral’’ rather than ‘’IP’’</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[LL COMP] redefinition of registers address MUST be volatile (_IO)</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[HAL CYRP] Support several call to decrypt API without initialize Key and IVR - <strong>API update</strong></td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[HAL CRYP] Add possibility to not set key in HAL CRYP interface</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[LL DMA] IS_LL_DMA_PERIPHREQUEST macro is not aligned with the max number of request</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[FLASH][MISRAC2012-Rule-8.5_b] Multiple declarations of externally-linked object</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[FLASH]Program DoubleWord fails (PGAERR) when using STRD assembly instruction</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[I2C][MISRAC2012] MISRAC2012-Rule-2.2c and 17.8 when ITFlags is modified</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[HAL I2C] Issue using HAL_I2C_Slave_Sequential_Receive_DMA, STOPF arrives too early versus DMA cplt message</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[LL RCC] Correct EXTERNAL_CLOCK_VALUE</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[HAL RCC][CodeSonar] HAL_RCCEx_GetPeriphCLKFreq - Useless Assignment</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[HAL RCC] MCU hangs after some stop/wakeup cycles</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[HAL RCC] __HAL_RCC_PLLxx_CONFIG() macros shall preserve output clock(s) enable state</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[LL UART][CodeSonar] Cast alter value (LL_LPUART_ReceiveData8)</td> |
| </tr> |
| <tr class="even"> |
| <td style="text-align: left;">[LL UART][CodeSonar] Uninitialized Variable (LL_LPUART_GetBaudRate)</td> |
| </tr> |
| <tr class="odd"> |
| <td style="text-align: left;">[LL USART][CodeSonar] Cast alter value (LL_USART_ReceiveData8)</td> |
| </tr> |
| </tbody> |
| </table> |
| <h2 id="supported-devices-and-boards-9">Supported Devices and boards</h2> |
| <p>Supported Devices:</p> |
| <ul> |
| <li>STM32G0<strong>81</strong>xx</li> |
| <li>STM32G0<strong>71</strong>xx</li> |
| <li>STM32G0<strong>70</strong>xx</li> |
| </ul> |
| <h2 id="backward-compatibility-7">Backward Compatibility</h2> |
| <p>This release is compatible with the previous versions.</p> |
| <h2 id="dependencies-9">Dependencies</h2> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section1" aria-hidden="true"> <label for="collapse-section1" aria-hidden="true">V1.0.0 / 26-October-2018</label> |
| <div> |
| <h2 id="main-changes-10">Main Changes</h2> |
| <h3 id="first-release">First release</h3> |
| <p>First official release of HAL and Low layers drivers to support STM32G071xx/STM32G081xx/STM32G070xx</p> |
| <h2 id="supported-devices-and-boards-10">Supported Devices and boards</h2> |
| <p>Supported Devices:</p> |
| <ul> |
| <li>STM32G0<strong>81</strong>xx</li> |
| <li>STM32G0<strong>71</strong>xx</li> |
| <li>STM32G0<strong>70</strong>xx</li> |
| </ul> |
| <h2 id="dependencies-10">Dependencies</h2> |
| </div> |
| </div> |
| </div> |
| </div> |
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| <p>For complete documentation on <strong>STM32 Microcontrollers</strong>, visit: <a href="http://www.st.com/STM32">http://www.st.com/STM32</a></p> |
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