[HAL][LL][USB] Fix USB data toggle

Src/stm32g0xx_hal_hcd.c

diff --git a/Src/stm32g0xx_hal_hcd.c b/Src/stm32g0xx_hal_hcd.c
index 79481ec..c92fca9 100644
--- a/Src/stm32g0xx_hal_hcd.c
+++ b/Src/stm32g0xx_hal_hcd.c
@@ -1919,8 +1919,8 @@
         if ((hhcd->hc[ch_num & 0xFU].xfer_len == 0U) ||
             ((received_bytes < hhcd->hc[ch_num & 0xFU].max_packet)))
         {
-          hhcd->hc[ch_num & 0xFU].urb_state  = URB_DONE;
-          hhcd->hc[ch_num & 0xFU].state  = HC_XFRC;
+          hhcd->hc[ch_num & 0xFU].urb_state = URB_DONE;
+          hhcd->hc[ch_num & 0xFU].state = HC_XFRC;
         }
         else
         {
@@ -1933,10 +1933,10 @@
         if ((hhcd->hc[ch_num & 0xFU].ep_type == EP_TYPE_BULK) ||
             (hhcd->hc[ch_num & 0xFU].ep_type == EP_TYPE_INTR))
         {
-          hhcd->hc[ch_num & 0xFU].toggle_out ^= 1U;
+          hhcd->hc[ch_num & 0xFU].toggle_in ^= 1U;
         }
       }
-      /* manage NACK Response */
+      /* Manage NACK Response */
       else if (((ch_reg & USB_CH_RX_STRX) == USB_CH_RX_NAK)
                && (hhcd->hc[ch_num & 0xFU].urb_state != URB_DONE))
       {
@@ -1950,7 +1950,7 @@
           HCD_SET_CH_RX_STATUS(hhcd->Instance, phy_chnum, USB_CH_RX_DIS);
         }
       }
-      /* manage STALL Response */
+      /* Manage STALL Response */
       else if ((ch_reg & USB_CH_RX_STRX) == USB_CH_RX_STALL)
       {
         (void)HAL_HCD_HC_Halt(hhcd, ch_num);
@@ -2039,7 +2039,7 @@
     /* Handle Isochronous channel */
     if ((ch_reg & USB_CH_UTYPE) == USB_EP_ISOCHRONOUS)
     {
-      /* correct transaction */
+      /* Correct transaction */
       if ((hhcd->Instance->ISTR & USB_ISTR_ERR) == 0U)
       {
         /* Double buffer isochronous out */
@@ -2048,7 +2048,7 @@
           HCD_SET_CH_TX_CNT(hhcd->Instance, phy_chnum, 0U);
         }
 #if (USE_USB_DOUBLE_BUFFER == 1U)
-        else /* double buffer isochronous out */
+        else /* Double buffer isochronous out */
         {
           /* Odd Transaction */
           if ((ch_reg & USB_CH_DTOG_TX) != 0U)
@@ -2097,14 +2097,20 @@
           hhcd->hc[ch_num & 0xFU].xfer_len = 0U;
         }
 
+        if ((hhcd->hc[ch_num & 0xFU].ep_type == EP_TYPE_BULK) ||
+            (hhcd->hc[ch_num & 0xFU].ep_type == EP_TYPE_INTR))
+        {
+          hhcd->hc[ch_num & 0xFU].toggle_out ^= 1U;
+        }
+
         /* Transfer no yet finished only one packet of mps is transferred and ACKed from device */
         if (hhcd->hc[ch_num & 0xFU].xfer_len != 0U)
         {
-          /* manage multiple Xfer */
+          /* Manage multiple Xfer */
           hhcd->hc[ch_num & 0xFU].xfer_buff += data_xfr;
           hhcd->hc[ch_num & 0xFU].xfer_count += data_xfr;
 
-          /* start a new transfer */
+          /* Start a new transfer */
           (void) USB_HC_StartXfer(hhcd->Instance, &hhcd->hc[ch_num & 0xFU]);
         }
         else
@@ -2113,12 +2119,6 @@
           hhcd->hc[ch_num & 0xFU].xfer_count += data_xfr;
           hhcd->hc[ch_num & 0xFU].state = HC_XFRC;
           hhcd->hc[ch_num & 0xFU].urb_state = URB_DONE;
-
-          if ((hhcd->hc[ch_num & 0xFU].ep_type == EP_TYPE_BULK) ||
-              (hhcd->hc[ch_num & 0xFU].ep_type == EP_TYPE_INTR))
-          {
-            hhcd->hc[ch_num & 0xFU].toggle_out ^= 1U;
-          }
         }
       }
       /* Check NACK Response */
@@ -2133,7 +2133,7 @@
         /* Get Channel register value */
         WregCh = *(__IO uint32_t *)(&(hhcd->Instance->CHEP0R) + phy_chnum);
 
-        /*clear NAK status*/
+        /* Clear NAK status */
         WregCh &= ~USB_CHEP_NAK & USB_CHEP_REG_MASK;
 
         /* Update channel register Value */
@@ -2224,13 +2224,13 @@
     /* Host Port State */
     hhcd->HostState = HCD_HCD_STATE_DISCONNECTED;
 
-    /* clear all allocated virtual channel */
+    /* Clear all allocated virtual channel */
     HAL_HCD_ClearPhyChannel(hhcd);
 
     /* Reset the PMA current pointer */
     (void)HAL_HCD_PMAReset(hhcd);
 
-    /* reset Ep0 Pma allocation state */
+    /* Reset Ep0 Pma allocation state */
     hhcd->ep0_PmaAllocState = 0U;
 
     /* Disconnection Callback */

Src/stm32g0xx_ll_usb.c

diff --git a/Src/stm32g0xx_ll_usb.c b/Src/stm32g0xx_ll_usb.c
index 38f18a9..8fb3b1f 100644
--- a/Src/stm32g0xx_ll_usb.c
+++ b/Src/stm32g0xx_ll_usb.c
@@ -1151,7 +1151,14 @@
   }
 
   /* Clear device address, Endpoint number and Low Speed Endpoint fields */
-  wChRegVal &= ~(USB_CHEP_DEVADDR | USB_CHEP_ADDR | USB_CHEP_LSEP);
+  wChRegVal &= ~(USB_CHEP_DEVADDR |
+                 USB_CHEP_ADDR |
+                 USB_CHEP_LSEP |
+                 USB_CHEP_NAK |
+                 USB_CHEP_KIND |
+                 USB_CHEP_ERRTX |
+                 USB_CHEP_ERRRX |
+                 (0xFU << 27));
 
   /* Set device address and Endpoint number assiciated to the channel */
   wChRegVal |= (((uint32_t)dev_address << USB_CHEP_DEVADDR_Pos) |
@@ -1200,6 +1207,18 @@
 
     if (hc->doublebuffer == 0U)
     {
+      if ((hc->ep_type == EP_TYPE_BULK) ||
+          (hc->ep_type == EP_TYPE_INTR))
+      {
+        USB_DRD_CLEAR_RX_DTOG(USBx, phy_ch_num);
+
+        /* Set Data PID */
+        if (hc->data_pid == HC_PID_DATA1)
+        {
+          USB_DRD_RX_DTOG(USBx, phy_ch_num);
+        }
+      }
+
       /* Set RX buffer count */
       USB_DRD_SET_CHEP_RX_CNT(USBx, phy_ch_num, len);
     }
@@ -1257,6 +1276,18 @@
       {
         USB_DRD_CHEP_TX_SETUP(USBx,  phy_ch_num);
       }
+
+      if ((hc->ep_type == EP_TYPE_BULK) ||
+          (hc->ep_type == EP_TYPE_INTR))
+      {
+        USB_DRD_CLEAR_TX_DTOG(USBx, phy_ch_num);
+
+        /* Set Data PID */
+        if (hc->data_pid == HC_PID_DATA1)
+        {
+          USB_DRD_TX_DTOG(USBx, phy_ch_num);
+        }
+      }
     }
 #if (USE_USB_DOUBLE_BUFFER == 1U)
     else if (hc->ep_type == EP_TYPE_BULK)