| /** |
| ****************************************************************************** |
| * @file stm32g4xx_ll_rcc.c |
| * @author MCD Application Team |
| * @brief RCC LL module driver. |
| ****************************************************************************** |
| * @attention |
| * |
| * <h2><center>© Copyright (c) 2019 STMicroelectronics. |
| * All rights reserved.</center></h2> |
| * |
| * This software component is licensed by ST under BSD 3-Clause license, |
| * the "License"; You may not use this file except in compliance with the |
| * License. You may obtain a copy of the License at: |
| * opensource.org/licenses/BSD-3-Clause |
| * |
| ****************************************************************************** |
| */ |
| #if defined(USE_FULL_LL_DRIVER) |
| |
| /* Includes ------------------------------------------------------------------*/ |
| #include "stm32g4xx_ll_rcc.h" |
| #ifdef USE_FULL_ASSERT |
| #include "stm32_assert.h" |
| #else |
| #define assert_param(expr) ((void)0U) |
| #endif |
| /** @addtogroup STM32G4xx_LL_Driver |
| * @{ |
| */ |
| |
| /** @addtogroup RCC_LL |
| * @{ |
| */ |
| |
| /* Private types -------------------------------------------------------------*/ |
| /* Private variables ---------------------------------------------------------*/ |
| /* Private constants ---------------------------------------------------------*/ |
| /* Private macros ------------------------------------------------------------*/ |
| /** @addtogroup RCC_LL_Private_Macros |
| * @{ |
| */ |
| #define IS_LL_RCC_USART_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_USART1_CLKSOURCE) \ |
| || ((__VALUE__) == LL_RCC_USART2_CLKSOURCE) \ |
| || ((__VALUE__) == LL_RCC_USART3_CLKSOURCE)) |
| #if defined(RCC_CCIPR_UART5SEL) |
| #define IS_LL_RCC_UART_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_UART4_CLKSOURCE) \ |
| || ((__VALUE__) == LL_RCC_UART5_CLKSOURCE)) |
| #elif defined(RCC_CCIPR_UART4SEL) |
| #define IS_LL_RCC_UART_CLKSOURCE(__VALUE__) ((__VALUE__) == LL_RCC_UART4_CLKSOURCE) |
| #endif /* RCC_CCIPR_UART5SEL*/ |
| |
| #define IS_LL_RCC_LPUART_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_LPUART1_CLKSOURCE)) |
| |
| #if defined(RCC_CCIPR2_I2C4SEL) |
| #define IS_LL_RCC_I2C_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_I2C1_CLKSOURCE) \ |
| || ((__VALUE__) == LL_RCC_I2C2_CLKSOURCE) \ |
| || ((__VALUE__) == LL_RCC_I2C3_CLKSOURCE) \ |
| || ((__VALUE__) == LL_RCC_I2C4_CLKSOURCE)) |
| |
| #else |
| #define IS_LL_RCC_I2C_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_I2C1_CLKSOURCE) \ |
| || ((__VALUE__) == LL_RCC_I2C2_CLKSOURCE) \ |
| || ((__VALUE__) == LL_RCC_I2C3_CLKSOURCE)) |
| #endif /* RCC_CCIPR2_I2C4SEL */ |
| #define IS_LL_RCC_LPTIM_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_LPTIM1_CLKSOURCE)) |
| |
| #define IS_LL_RCC_SAI_CLKSOURCE(__VALUE__) ((__VALUE__) == LL_RCC_SAI1_CLKSOURCE) |
| |
| #define IS_LL_RCC_I2S_CLKSOURCE(__VALUE__) ((__VALUE__) == LL_RCC_I2S_CLKSOURCE) |
| |
| #define IS_LL_RCC_RNG_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_RNG_CLKSOURCE)) |
| |
| #define IS_LL_RCC_USB_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_USB_CLKSOURCE)) |
| |
| #if defined(ADC345_COMMON) |
| #define IS_LL_RCC_ADC_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_ADC12_CLKSOURCE) \ |
| || ((__VALUE__) == LL_RCC_ADC345_CLKSOURCE)) |
| #else |
| #define IS_LL_RCC_ADC_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_ADC12_CLKSOURCE)) |
| #endif /* ADC345_COMMON */ |
| |
| #if defined(QUADSPI) |
| #define IS_LL_RCC_QUADSPI_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_QUADSPI_CLKSOURCE)) |
| #endif /* QUADSPI */ |
| |
| #if defined(FDCAN1) |
| #define IS_LL_RCC_FDCAN_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_FDCAN_CLKSOURCE)) |
| #endif /* FDCAN1 */ |
| |
| /** |
| * @} |
| */ |
| |
| /* Private function prototypes -----------------------------------------------*/ |
| /** @defgroup RCC_LL_Private_Functions RCC Private functions |
| * @{ |
| */ |
| static uint32_t RCC_GetSystemClockFreq(void); |
| static uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency); |
| static uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency); |
| static uint32_t RCC_GetPCLK2ClockFreq(uint32_t HCLK_Frequency); |
| static uint32_t RCC_PLL_GetFreqDomain_SYS(void); |
| static uint32_t RCC_PLL_GetFreqDomain_ADC(void); |
| static uint32_t RCC_PLL_GetFreqDomain_48M(void); |
| /** |
| * @} |
| */ |
| |
| |
| /* Exported functions --------------------------------------------------------*/ |
| /** @addtogroup RCC_LL_Exported_Functions |
| * @{ |
| */ |
| |
| /** @addtogroup RCC_LL_EF_Init |
| * @{ |
| */ |
| |
| /** |
| * @brief Reset the RCC clock configuration to the default reset state. |
| * @note The default reset state of the clock configuration is given below: |
| * - HSI ON and used as system clock source |
| * - HSE and PLL OFF |
| * - AHB, APB1 and APB2 prescaler set to 1. |
| * - CSS, MCO OFF |
| * - All interrupts disabled |
| * @note This function doesn't modify the configuration of the |
| * - Peripheral clocks |
| * - LSI, LSE and RTC clocks |
| * @retval An ErrorStatus enumeration value: |
| * - SUCCESS: RCC registers are de-initialized |
| * - ERROR: not applicable |
| */ |
| ErrorStatus LL_RCC_DeInit(void) |
| { |
| uint32_t vl_mask; |
| |
| /* Set HSION bit and wait for HSI READY bit */ |
| LL_RCC_HSI_Enable(); |
| while (LL_RCC_HSI_IsReady() == 0U) |
| {} |
| |
| /* Set HSITRIM bits to reset value*/ |
| LL_RCC_HSI_SetCalibTrimming(0x40U); |
| |
| /* Reset whole CFGR register but keep HSI as system clock source */ |
| LL_RCC_WriteReg(CFGR, LL_RCC_SYS_CLKSOURCE_HSI); |
| while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_HSI) {}; |
| |
| /* Reset whole CR register but HSI in 2 steps in case HSEBYP is set */ |
| LL_RCC_WriteReg(CR, RCC_CR_HSION); |
| LL_RCC_WriteReg(CR, RCC_CR_HSION); |
| |
| /* Wait for PLL READY bit to be reset */ |
| while (LL_RCC_PLL_IsReady() != 0U) |
| {} |
| |
| /* Reset PLLCFGR register */ |
| LL_RCC_WriteReg(PLLCFGR, 16U << RCC_PLLCFGR_PLLN_Pos); |
| |
| /* Disable all interrupts */ |
| LL_RCC_WriteReg(CIER, 0x00000000U); |
| |
| /* Clear all interrupt flags */ |
| vl_mask = RCC_CICR_LSIRDYC | RCC_CICR_LSERDYC | RCC_CICR_HSIRDYC | RCC_CICR_HSERDYC | RCC_CICR_PLLRDYC | \ |
| RCC_CICR_HSI48RDYC | RCC_CICR_CSSC | RCC_CICR_LSECSSC; |
| |
| LL_RCC_WriteReg(CICR, vl_mask); |
| |
| /* Clear reset flags */ |
| LL_RCC_ClearResetFlags(); |
| |
| return SUCCESS; |
| } |
| |
| /** |
| * @} |
| */ |
| |
| /** @addtogroup RCC_LL_EF_Get_Freq |
| * @brief Return the frequencies of different on chip clocks; System, AHB, APB1 and APB2 buses clocks |
| * and different peripheral clocks available on the device. |
| * @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(**) |
| * @note If SYSCLK source is HSE, function returns values based on HSE_VALUE(***) |
| * @note If SYSCLK source is PLL, function returns values based on HSE_VALUE(***) |
| * or HSI_VALUE(**) multiplied/divided by the PLL factors. |
| * @note (**) HSI_VALUE is a constant defined in this file (default value |
| * 16 MHz) but the real value may vary depending on the variations |
| * in voltage and temperature. |
| * @note (***) HSE_VALUE is a constant defined in this file (default value |
| * 8 MHz), user has to ensure that HSE_VALUE is same as the real |
| * frequency of the crystal used. Otherwise, this function may |
| * have wrong result. |
| * @note The result of this function could be incorrect when using fractional |
| * value for HSE crystal. |
| * @note This function can be used by the user application to compute the |
| * baud-rate for the communication peripherals or configure other parameters. |
| * @{ |
| */ |
| |
| /** |
| * @brief Return the frequencies of different on chip clocks; System, AHB, APB1 and APB2 buses clocks |
| * @note Each time SYSCLK, HCLK, PCLK1 and/or PCLK2 clock changes, this function |
| * must be called to update structure fields. Otherwise, any |
| * configuration based on this function will be incorrect. |
| * @param RCC_Clocks pointer to a @ref LL_RCC_ClocksTypeDef structure which will hold the clocks frequencies |
| * @retval None |
| */ |
| void LL_RCC_GetSystemClocksFreq(LL_RCC_ClocksTypeDef *RCC_Clocks) |
| { |
| /* Get SYSCLK frequency */ |
| RCC_Clocks->SYSCLK_Frequency = RCC_GetSystemClockFreq(); |
| |
| /* HCLK clock frequency */ |
| RCC_Clocks->HCLK_Frequency = RCC_GetHCLKClockFreq(RCC_Clocks->SYSCLK_Frequency); |
| |
| /* PCLK1 clock frequency */ |
| RCC_Clocks->PCLK1_Frequency = RCC_GetPCLK1ClockFreq(RCC_Clocks->HCLK_Frequency); |
| |
| /* PCLK2 clock frequency */ |
| RCC_Clocks->PCLK2_Frequency = RCC_GetPCLK2ClockFreq(RCC_Clocks->HCLK_Frequency); |
| } |
| |
| /** |
| * @brief Return USARTx clock frequency |
| * @param USARTxSource This parameter can be one of the following values: |
| * @arg @ref LL_RCC_USART1_CLKSOURCE |
| * @arg @ref LL_RCC_USART2_CLKSOURCE |
| * @arg @ref LL_RCC_USART3_CLKSOURCE |
| * |
| * @retval USART clock frequency (in Hz) |
| * - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (HSI or LSE) is not ready |
| */ |
| uint32_t LL_RCC_GetUSARTClockFreq(uint32_t USARTxSource) |
| { |
| uint32_t usart_frequency = LL_RCC_PERIPH_FREQUENCY_NO; |
| |
| /* Check parameter */ |
| assert_param(IS_LL_RCC_USART_CLKSOURCE(USARTxSource)); |
| |
| if (USARTxSource == LL_RCC_USART1_CLKSOURCE) |
| { |
| /* USART1CLK clock frequency */ |
| switch (LL_RCC_GetUSARTClockSource(USARTxSource)) |
| { |
| case LL_RCC_USART1_CLKSOURCE_SYSCLK: /* USART1 Clock is System Clock */ |
| usart_frequency = RCC_GetSystemClockFreq(); |
| break; |
| |
| case LL_RCC_USART1_CLKSOURCE_HSI: /* USART1 Clock is HSI Osc. */ |
| if (LL_RCC_HSI_IsReady() != 0U) |
| { |
| usart_frequency = HSI_VALUE; |
| } |
| break; |
| |
| case LL_RCC_USART1_CLKSOURCE_LSE: /* USART1 Clock is LSE Osc. */ |
| if (LL_RCC_LSE_IsReady() != 0U) |
| { |
| usart_frequency = LSE_VALUE; |
| } |
| break; |
| |
| case LL_RCC_USART1_CLKSOURCE_PCLK2: /* USART1 Clock is PCLK2 */ |
| default: |
| usart_frequency = RCC_GetPCLK2ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq())); |
| break; |
| } |
| } |
| else if (USARTxSource == LL_RCC_USART2_CLKSOURCE) |
| { |
| /* USART2CLK clock frequency */ |
| switch (LL_RCC_GetUSARTClockSource(USARTxSource)) |
| { |
| case LL_RCC_USART2_CLKSOURCE_SYSCLK: /* USART2 Clock is System Clock */ |
| usart_frequency = RCC_GetSystemClockFreq(); |
| break; |
| |
| case LL_RCC_USART2_CLKSOURCE_HSI: /* USART2 Clock is HSI Osc. */ |
| if (LL_RCC_HSI_IsReady() != 0U) |
| { |
| usart_frequency = HSI_VALUE; |
| } |
| break; |
| |
| case LL_RCC_USART2_CLKSOURCE_LSE: /* USART2 Clock is LSE Osc. */ |
| if (LL_RCC_LSE_IsReady() != 0U) |
| { |
| usart_frequency = LSE_VALUE; |
| } |
| break; |
| |
| case LL_RCC_USART2_CLKSOURCE_PCLK1: /* USART2 Clock is PCLK1 */ |
| default: |
| usart_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq())); |
| break; |
| } |
| } |
| else |
| { |
| if (USARTxSource == LL_RCC_USART3_CLKSOURCE) |
| { |
| /* USART3CLK clock frequency */ |
| switch (LL_RCC_GetUSARTClockSource(USARTxSource)) |
| { |
| case LL_RCC_USART3_CLKSOURCE_SYSCLK: /* USART3 Clock is System Clock */ |
| usart_frequency = RCC_GetSystemClockFreq(); |
| break; |
| |
| case LL_RCC_USART3_CLKSOURCE_HSI: /* USART3 Clock is HSI Osc. */ |
| if (LL_RCC_HSI_IsReady() != 0U) |
| { |
| usart_frequency = HSI_VALUE; |
| } |
| break; |
| |
| case LL_RCC_USART3_CLKSOURCE_LSE: /* USART3 Clock is LSE Osc. */ |
| if (LL_RCC_LSE_IsReady() != 0U) |
| { |
| usart_frequency = LSE_VALUE; |
| } |
| break; |
| |
| case LL_RCC_USART3_CLKSOURCE_PCLK1: /* USART3 Clock is PCLK1 */ |
| default: |
| usart_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq())); |
| break; |
| } |
| } |
| } |
| return usart_frequency; |
| } |
| |
| #if defined(RCC_CCIPR_UART4SEL) |
| /** |
| * @brief Return UARTx clock frequency |
| * @param UARTxSource This parameter can be one of the following values: |
| * @arg @ref LL_RCC_UART4_CLKSOURCE (*) |
| * @arg @ref LL_RCC_UART5_CLKSOURCE (*) |
| * |
| * (*) value not defined in all devices. |
| * @retval UART clock frequency (in Hz) |
| * - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (HSI or LSE) is not ready |
| */ |
| uint32_t LL_RCC_GetUARTClockFreq(uint32_t UARTxSource) |
| { |
| uint32_t uart_frequency = LL_RCC_PERIPH_FREQUENCY_NO; |
| |
| /* Check parameter */ |
| assert_param(IS_LL_RCC_UART_CLKSOURCE(UARTxSource)); |
| |
| if (UARTxSource == LL_RCC_UART4_CLKSOURCE) |
| { |
| /* UART4CLK clock frequency */ |
| switch (LL_RCC_GetUARTClockSource(UARTxSource)) |
| { |
| case LL_RCC_UART4_CLKSOURCE_SYSCLK: /* UART4 Clock is System Clock */ |
| uart_frequency = RCC_GetSystemClockFreq(); |
| break; |
| |
| case LL_RCC_UART4_CLKSOURCE_HSI: /* UART4 Clock is HSI Osc. */ |
| if (LL_RCC_HSI_IsReady() != 0U) |
| { |
| uart_frequency = HSI_VALUE; |
| } |
| break; |
| |
| case LL_RCC_UART4_CLKSOURCE_LSE: /* UART4 Clock is LSE Osc. */ |
| if (LL_RCC_LSE_IsReady() != 0U) |
| { |
| uart_frequency = LSE_VALUE; |
| } |
| break; |
| |
| case LL_RCC_UART4_CLKSOURCE_PCLK1: /* UART4 Clock is PCLK1 */ |
| default: |
| uart_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq())); |
| break; |
| } |
| } |
| |
| #if defined(RCC_CCIPR_UART5SEL) |
| if (UARTxSource == LL_RCC_UART5_CLKSOURCE) |
| { |
| /* UART5CLK clock frequency */ |
| switch (LL_RCC_GetUARTClockSource(UARTxSource)) |
| { |
| case LL_RCC_UART5_CLKSOURCE_SYSCLK: /* UART5 Clock is System Clock */ |
| uart_frequency = RCC_GetSystemClockFreq(); |
| break; |
| |
| case LL_RCC_UART5_CLKSOURCE_HSI: /* UART5 Clock is HSI Osc. */ |
| if (LL_RCC_HSI_IsReady() != 0U) |
| { |
| uart_frequency = HSI_VALUE; |
| } |
| break; |
| |
| case LL_RCC_UART5_CLKSOURCE_LSE: /* UART5 Clock is LSE Osc. */ |
| if (LL_RCC_LSE_IsReady() != 0U) |
| { |
| uart_frequency = LSE_VALUE; |
| } |
| break; |
| |
| case LL_RCC_UART5_CLKSOURCE_PCLK1: /* UART5 Clock is PCLK1 */ |
| default: |
| uart_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq())); |
| break; |
| } |
| } |
| #endif /* RCC_CCIPR_UART5SEL */ |
| |
| return uart_frequency; |
| } |
| #endif /* RCC_CCIPR_UART4SEL */ |
| |
| /** |
| * @brief Return I2Cx clock frequency |
| * @param I2CxSource This parameter can be one of the following values: |
| * @arg @ref LL_RCC_I2C1_CLKSOURCE |
| * @arg @ref LL_RCC_I2C2_CLKSOURCE |
| * @arg @ref LL_RCC_I2C3_CLKSOURCE |
| * @arg @ref LL_RCC_I2C4_CLKSOURCE (*) |
| * |
| * (*) value not defined in all devices. |
| * @retval I2C clock frequency (in Hz) |
| * - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that HSI oscillator is not ready |
| */ |
| uint32_t LL_RCC_GetI2CClockFreq(uint32_t I2CxSource) |
| { |
| uint32_t i2c_frequency = LL_RCC_PERIPH_FREQUENCY_NO; |
| |
| /* Check parameter */ |
| assert_param(IS_LL_RCC_I2C_CLKSOURCE(I2CxSource)); |
| |
| if (I2CxSource == LL_RCC_I2C1_CLKSOURCE) |
| { |
| /* I2C1 CLK clock frequency */ |
| switch (LL_RCC_GetI2CClockSource(I2CxSource)) |
| { |
| case LL_RCC_I2C1_CLKSOURCE_SYSCLK: /* I2C1 Clock is System Clock */ |
| i2c_frequency = RCC_GetSystemClockFreq(); |
| break; |
| |
| case LL_RCC_I2C1_CLKSOURCE_HSI: /* I2C1 Clock is HSI Osc. */ |
| if (LL_RCC_HSI_IsReady() != 0U) |
| { |
| i2c_frequency = HSI_VALUE; |
| } |
| break; |
| |
| case LL_RCC_I2C1_CLKSOURCE_PCLK1: /* I2C1 Clock is PCLK1 */ |
| default: |
| i2c_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq())); |
| break; |
| } |
| } |
| else if (I2CxSource == LL_RCC_I2C2_CLKSOURCE) |
| { |
| /* I2C2 CLK clock frequency */ |
| switch (LL_RCC_GetI2CClockSource(I2CxSource)) |
| { |
| case LL_RCC_I2C2_CLKSOURCE_SYSCLK: /* I2C2 Clock is System Clock */ |
| i2c_frequency = RCC_GetSystemClockFreq(); |
| break; |
| |
| case LL_RCC_I2C2_CLKSOURCE_HSI: /* I2C2 Clock is HSI Osc. */ |
| if (LL_RCC_HSI_IsReady() != 0U) |
| { |
| i2c_frequency = HSI_VALUE; |
| } |
| break; |
| |
| case LL_RCC_I2C2_CLKSOURCE_PCLK1: /* I2C2 Clock is PCLK1 */ |
| default: |
| i2c_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq())); |
| break; |
| } |
| } |
| else |
| { |
| if (I2CxSource == LL_RCC_I2C3_CLKSOURCE) |
| { |
| /* I2C3 CLK clock frequency */ |
| switch (LL_RCC_GetI2CClockSource(I2CxSource)) |
| { |
| case LL_RCC_I2C3_CLKSOURCE_SYSCLK: /* I2C3 Clock is System Clock */ |
| i2c_frequency = RCC_GetSystemClockFreq(); |
| break; |
| |
| case LL_RCC_I2C3_CLKSOURCE_HSI: /* I2C3 Clock is HSI Osc. */ |
| if (LL_RCC_HSI_IsReady() != 0U) |
| { |
| i2c_frequency = HSI_VALUE; |
| } |
| break; |
| |
| case LL_RCC_I2C3_CLKSOURCE_PCLK1: /* I2C3 Clock is PCLK1 */ |
| default: |
| i2c_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq())); |
| break; |
| } |
| } |
| #if defined(RCC_CCIPR2_I2C4SEL) |
| else |
| { |
| if (I2CxSource == LL_RCC_I2C4_CLKSOURCE) |
| { |
| /* I2C4 CLK clock frequency */ |
| switch (LL_RCC_GetI2CClockSource(I2CxSource)) |
| { |
| case LL_RCC_I2C4_CLKSOURCE_SYSCLK: /* I2C4 Clock is System Clock */ |
| i2c_frequency = RCC_GetSystemClockFreq(); |
| break; |
| |
| case LL_RCC_I2C4_CLKSOURCE_HSI: /* I2C4 Clock is HSI Osc. */ |
| if (LL_RCC_HSI_IsReady() != 0U) |
| { |
| i2c_frequency = HSI_VALUE; |
| } |
| break; |
| |
| case LL_RCC_I2C4_CLKSOURCE_PCLK1: /* I2C4 Clock is PCLK1 */ |
| default: |
| i2c_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq())); |
| break; |
| } |
| } |
| } |
| #endif /*RCC_CCIPR2_I2C4SEL*/ |
| } |
| |
| return i2c_frequency; |
| } |
| |
| |
| /** |
| * @brief Return LPUARTx clock frequency |
| * @param LPUARTxSource This parameter can be one of the following values: |
| * @arg @ref LL_RCC_LPUART1_CLKSOURCE |
| * @retval LPUART clock frequency (in Hz) |
| * - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (HSI or LSE) is not ready |
| */ |
| uint32_t LL_RCC_GetLPUARTClockFreq(uint32_t LPUARTxSource) |
| { |
| uint32_t lpuart_frequency = LL_RCC_PERIPH_FREQUENCY_NO; |
| |
| /* Check parameter */ |
| assert_param(IS_LL_RCC_LPUART_CLKSOURCE(LPUARTxSource)); |
| |
| /* LPUART1CLK clock frequency */ |
| switch (LL_RCC_GetLPUARTClockSource(LPUARTxSource)) |
| { |
| case LL_RCC_LPUART1_CLKSOURCE_SYSCLK: /* LPUART1 Clock is System Clock */ |
| lpuart_frequency = RCC_GetSystemClockFreq(); |
| break; |
| |
| case LL_RCC_LPUART1_CLKSOURCE_HSI: /* LPUART1 Clock is HSI Osc. */ |
| if (LL_RCC_HSI_IsReady() != 0U) |
| { |
| lpuart_frequency = HSI_VALUE; |
| } |
| break; |
| |
| case LL_RCC_LPUART1_CLKSOURCE_LSE: /* LPUART1 Clock is LSE Osc. */ |
| if (LL_RCC_LSE_IsReady() != 0U) |
| { |
| lpuart_frequency = LSE_VALUE; |
| } |
| break; |
| |
| case LL_RCC_LPUART1_CLKSOURCE_PCLK1: /* LPUART1 Clock is PCLK1 */ |
| default: |
| lpuart_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq())); |
| break; |
| } |
| |
| return lpuart_frequency; |
| } |
| |
| /** |
| * @brief Return LPTIMx clock frequency |
| * @param LPTIMxSource This parameter can be one of the following values: |
| * @arg @ref LL_RCC_LPTIM1_CLKSOURCE |
| * @retval LPTIM clock frequency (in Hz) |
| * - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (HSI, LSI or LSE) is not ready |
| */ |
| uint32_t LL_RCC_GetLPTIMClockFreq(uint32_t LPTIMxSource) |
| { |
| uint32_t lptim_frequency = LL_RCC_PERIPH_FREQUENCY_NO; |
| |
| /* Check parameter */ |
| assert_param(IS_LL_RCC_LPTIM_CLKSOURCE(LPTIMxSource)); |
| |
| if (LPTIMxSource == LL_RCC_LPTIM1_CLKSOURCE) |
| { |
| /* LPTIM1CLK clock frequency */ |
| switch (LL_RCC_GetLPTIMClockSource(LPTIMxSource)) |
| { |
| case LL_RCC_LPTIM1_CLKSOURCE_LSI: /* LPTIM1 Clock is LSI Osc. */ |
| if (LL_RCC_LSI_IsReady() != 0U) |
| { |
| lptim_frequency = LSI_VALUE; |
| } |
| break; |
| |
| case LL_RCC_LPTIM1_CLKSOURCE_HSI: /* LPTIM1 Clock is HSI Osc. */ |
| if (LL_RCC_HSI_IsReady() != 0U) |
| { |
| lptim_frequency = HSI_VALUE; |
| } |
| break; |
| |
| case LL_RCC_LPTIM1_CLKSOURCE_LSE: /* LPTIM1 Clock is LSE Osc. */ |
| if (LL_RCC_LSE_IsReady() != 0U) |
| { |
| lptim_frequency = LSE_VALUE; |
| } |
| break; |
| |
| case LL_RCC_LPTIM1_CLKSOURCE_PCLK1: /* LPTIM1 Clock is PCLK1 */ |
| default: |
| lptim_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq())); |
| break; |
| } |
| } |
| |
| return lptim_frequency; |
| } |
| |
| /** |
| * @brief Return SAIx clock frequency |
| * @param SAIxSource This parameter can be one of the following values: |
| * @arg @ref LL_RCC_SAI1_CLKSOURCE |
| * |
| * @retval SAI clock frequency (in Hz) |
| * - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that PLL is not ready |
| */ |
| uint32_t LL_RCC_GetSAIClockFreq(uint32_t SAIxSource) |
| { |
| uint32_t sai_frequency = LL_RCC_PERIPH_FREQUENCY_NO; |
| |
| /* Check parameter */ |
| assert_param(IS_LL_RCC_SAI_CLKSOURCE(SAIxSource)); |
| |
| if (SAIxSource == LL_RCC_SAI1_CLKSOURCE) |
| { |
| /* SAI1CLK clock frequency */ |
| switch (LL_RCC_GetSAIClockSource(SAIxSource)) |
| { |
| case LL_RCC_SAI1_CLKSOURCE_SYSCLK: /* System clock used as SAI1 clock source */ |
| sai_frequency = RCC_GetSystemClockFreq(); |
| break; |
| |
| case LL_RCC_SAI1_CLKSOURCE_PLL: /* PLL clock used as SAI1 clock source */ |
| if (LL_RCC_PLL_IsReady() != 0U) |
| { |
| sai_frequency = RCC_PLL_GetFreqDomain_48M(); |
| } |
| break; |
| |
| case LL_RCC_SAI1_CLKSOURCE_PIN: /* SAI1 Clock is External clock */ |
| sai_frequency = EXTERNAL_CLOCK_VALUE; |
| break; |
| |
| case LL_RCC_SAI1_CLKSOURCE_HSI: /* HSI clock used as SAI1 clock source */ |
| default: |
| if (LL_RCC_HSI_IsReady() != 0U) |
| { |
| sai_frequency = HSI_VALUE; |
| } |
| break; |
| |
| } |
| } |
| |
| return sai_frequency; |
| } |
| |
| /** |
| * @brief Return I2Sx clock frequency |
| * @param I2SxSource This parameter can be one of the following values: |
| * @arg @ref LL_RCC_I2S_CLKSOURCE |
| * @retval I2S clock frequency (in Hz) |
| * @arg @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator is not ready |
| */ |
| uint32_t LL_RCC_GetI2SClockFreq(uint32_t I2SxSource) |
| { |
| uint32_t i2s_frequency = LL_RCC_PERIPH_FREQUENCY_NO; |
| |
| /* Check parameter */ |
| assert_param(IS_LL_RCC_I2S_CLKSOURCE(I2SxSource)); |
| |
| if (I2SxSource == LL_RCC_I2S_CLKSOURCE) |
| { |
| /* I2S CLK clock frequency */ |
| switch (LL_RCC_GetI2SClockSource(I2SxSource)) |
| { |
| case LL_RCC_I2S_CLKSOURCE_SYSCLK: /* I2S Clock is System Clock */ |
| i2s_frequency = RCC_GetSystemClockFreq(); |
| break; |
| |
| case LL_RCC_I2S_CLKSOURCE_PLL: /* I2S Clock is PLL"Q" */ |
| if (LL_RCC_PLL_IsReady() != 0U) |
| { |
| i2s_frequency = RCC_PLL_GetFreqDomain_48M(); |
| } |
| break; |
| |
| case LL_RCC_I2S_CLKSOURCE_PIN: /* I2S Clock is External clock */ |
| i2s_frequency = EXTERNAL_CLOCK_VALUE; |
| break; |
| |
| case LL_RCC_I2S_CLKSOURCE_HSI: /* I2S Clock is HSI */ |
| default: |
| if (LL_RCC_HSI_IsReady() != 0U) |
| { |
| i2s_frequency = HSI_VALUE; |
| } |
| break; |
| } |
| } |
| |
| return i2s_frequency; |
| } |
| |
| #if defined(FDCAN1) |
| /** |
| * @brief Return FDCAN kernel clock frequency |
| * @param FDCANxSource This parameter can be one of the following values: |
| * @arg @ref LL_RCC_FDCAN_CLKSOURCE |
| * @retval FDCAN kernel clock frequency (in Hz) |
| * - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator is not ready |
| * - @ref LL_RCC_PERIPH_FREQUENCY_NA indicates that no clock source selected |
| */ |
| uint32_t LL_RCC_GetFDCANClockFreq(uint32_t FDCANxSource) |
| { |
| uint32_t fdcan_frequency = LL_RCC_PERIPH_FREQUENCY_NO; |
| |
| /* Check parameter */ |
| assert_param(IS_LL_RCC_FDCAN_CLKSOURCE(FDCANxSource)); |
| |
| /* FDCAN kernel clock frequency */ |
| switch (LL_RCC_GetFDCANClockSource(FDCANxSource)) |
| { |
| case LL_RCC_FDCAN_CLKSOURCE_HSE: /* HSE clock used as FDCAN kernel clock */ |
| if (LL_RCC_HSE_IsReady() != 0U) |
| { |
| fdcan_frequency = HSE_VALUE; |
| } |
| break; |
| |
| case LL_RCC_FDCAN_CLKSOURCE_PLL: /* PLL clock used as FDCAN kernel clock */ |
| if (LL_RCC_PLL_IsReady() != 0U) |
| { |
| fdcan_frequency = RCC_PLL_GetFreqDomain_48M(); |
| } |
| break; |
| |
| case LL_RCC_FDCAN_CLKSOURCE_PCLK1: /* PCLK1 clock used as FDCAN kernel clock */ |
| fdcan_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq())); |
| break; |
| |
| default: |
| fdcan_frequency = LL_RCC_PERIPH_FREQUENCY_NA; |
| break; |
| } |
| return fdcan_frequency; |
| } |
| #endif /* FDCAN1 */ |
| |
| /** |
| * @brief Return RNGx clock frequency |
| * @param RNGxSource This parameter can be one of the following values: |
| * @arg @ref LL_RCC_RNG_CLKSOURCE |
| * @retval RNG clock frequency (in Hz) |
| * - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (HSI48) or PLL is not ready |
| * - @ref LL_RCC_PERIPH_FREQUENCY_NA indicates that no clock source selected |
| */ |
| uint32_t LL_RCC_GetRNGClockFreq(uint32_t RNGxSource) |
| { |
| uint32_t rng_frequency = LL_RCC_PERIPH_FREQUENCY_NO; |
| |
| /* Check parameter */ |
| assert_param(IS_LL_RCC_RNG_CLKSOURCE(RNGxSource)); |
| |
| /* RNGCLK clock frequency */ |
| switch (LL_RCC_GetRNGClockSource(RNGxSource)) |
| { |
| case LL_RCC_RNG_CLKSOURCE_PLL: /* PLL clock used as RNG clock source */ |
| if (LL_RCC_PLL_IsReady() != 0U) |
| { |
| rng_frequency = RCC_PLL_GetFreqDomain_48M(); |
| } |
| break; |
| |
| case LL_RCC_RNG_CLKSOURCE_HSI48: /* HSI48 used as RNG clock source */ |
| if (LL_RCC_HSI48_IsReady() != 0U) |
| { |
| rng_frequency = HSI48_VALUE; |
| } |
| break; |
| |
| default: |
| rng_frequency = LL_RCC_PERIPH_FREQUENCY_NA; |
| break; |
| |
| } |
| |
| return rng_frequency; |
| } |
| |
| /** |
| * @brief Return USBx clock frequency |
| * @param USBxSource This parameter can be one of the following values: |
| * @arg @ref LL_RCC_USB_CLKSOURCE |
| * @retval USB clock frequency (in Hz) |
| * - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (HSI48) or PLL is not ready |
| * - @ref LL_RCC_PERIPH_FREQUENCY_NA indicates that no clock source selected |
| */ |
| uint32_t LL_RCC_GetUSBClockFreq(uint32_t USBxSource) |
| { |
| uint32_t usb_frequency = LL_RCC_PERIPH_FREQUENCY_NO; |
| |
| /* Check parameter */ |
| assert_param(IS_LL_RCC_USB_CLKSOURCE(USBxSource)); |
| |
| /* USBCLK clock frequency */ |
| switch (LL_RCC_GetUSBClockSource(USBxSource)) |
| { |
| case LL_RCC_USB_CLKSOURCE_PLL: /* PLL clock used as USB clock source */ |
| if (LL_RCC_PLL_IsReady() != 0U) |
| { |
| usb_frequency = RCC_PLL_GetFreqDomain_48M(); |
| } |
| break; |
| |
| case LL_RCC_USB_CLKSOURCE_HSI48: /* HSI48 used as USB clock source */ |
| if (LL_RCC_HSI48_IsReady() != 0U) |
| { |
| usb_frequency = HSI48_VALUE; |
| } |
| break; |
| |
| default: |
| usb_frequency = LL_RCC_PERIPH_FREQUENCY_NA; |
| break; |
| } |
| |
| return usb_frequency; |
| } |
| |
| /** |
| * @brief Return ADCx clock frequency |
| * @param ADCxSource This parameter can be one of the following values: |
| * @arg @ref LL_RCC_ADC12_CLKSOURCE |
| * @arg @ref LL_RCC_ADC345_CLKSOURCE (*) |
| * |
| * (*) value not defined in all devices. |
| * @retval ADC clock frequency (in Hz) |
| * - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that PLL is not ready |
| * - @ref LL_RCC_PERIPH_FREQUENCY_NA indicates that no clock source selected |
| */ |
| uint32_t LL_RCC_GetADCClockFreq(uint32_t ADCxSource) |
| { |
| uint32_t adc_frequency = LL_RCC_PERIPH_FREQUENCY_NO; |
| |
| /* Check parameter */ |
| assert_param(IS_LL_RCC_ADC_CLKSOURCE(ADCxSource)); |
| |
| if (ADCxSource == LL_RCC_ADC12_CLKSOURCE) |
| { |
| /* ADC12CLK clock frequency */ |
| switch (LL_RCC_GetADCClockSource(ADCxSource)) |
| { |
| case LL_RCC_ADC12_CLKSOURCE_PLL: /* PLL clock used as ADC12 clock source */ |
| if (LL_RCC_PLL_IsReady() != 0U) |
| { |
| adc_frequency = RCC_PLL_GetFreqDomain_ADC(); |
| } |
| break; |
| |
| case LL_RCC_ADC12_CLKSOURCE_SYSCLK: /* System clock used as ADC12 clock source */ |
| adc_frequency = RCC_GetSystemClockFreq(); |
| break; |
| |
| case LL_RCC_ADC12_CLKSOURCE_NONE: /* No clock used as ADC12 clock source */ |
| default: |
| adc_frequency = LL_RCC_PERIPH_FREQUENCY_NA; |
| break; |
| } |
| } |
| #if defined(ADC345_COMMON) |
| else |
| { |
| /* ADC345CLK clock frequency */ |
| switch (LL_RCC_GetADCClockSource(ADCxSource)) |
| { |
| case LL_RCC_ADC345_CLKSOURCE_PLL: /* PLL clock used as ADC345 clock source */ |
| if (LL_RCC_PLL_IsReady() != 0U) |
| { |
| adc_frequency = RCC_PLL_GetFreqDomain_ADC(); |
| } |
| break; |
| |
| case LL_RCC_ADC345_CLKSOURCE_SYSCLK: /* System clock used as ADC345 clock source */ |
| adc_frequency = RCC_GetSystemClockFreq(); |
| break; |
| |
| case LL_RCC_ADC345_CLKSOURCE_NONE: /* No clock used as ADC345 clock source */ |
| default: |
| adc_frequency = LL_RCC_PERIPH_FREQUENCY_NA; |
| break; |
| } |
| } |
| #endif /* ADC345_COMMON */ |
| |
| return adc_frequency; |
| } |
| |
| #if defined(QUADSPI) |
| /** |
| * @brief Return QUADSPI clock frequency |
| * @param QUADSPIxSource This parameter can be one of the following values: |
| * @arg @ref LL_RCC_QUADSPI_CLKSOURCE |
| * @retval QUADSPI clock frequency (in Hz) |
| * - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that no clock is configured |
| */ |
| uint32_t LL_RCC_GetQUADSPIClockFreq(uint32_t QUADSPIxSource) |
| { |
| uint32_t quadspi_frequency = LL_RCC_PERIPH_FREQUENCY_NO; |
| |
| /* Check parameter */ |
| assert_param(IS_LL_RCC_QUADSPI_CLKSOURCE(QUADSPIxSource)); |
| |
| /* QUADSPI clock frequency */ |
| switch (LL_RCC_GetQUADSPIClockSource(QUADSPIxSource)) |
| { |
| case LL_RCC_QUADSPI_CLKSOURCE_SYSCLK: /* SYSCLK used as QUADSPI source */ |
| quadspi_frequency = RCC_GetSystemClockFreq(); |
| break; |
| |
| case LL_RCC_QUADSPI_CLKSOURCE_HSI: /* HSI clock used as QUADSPI source */ |
| if (LL_RCC_HSI_IsReady() != 0U) |
| { |
| quadspi_frequency = HSI_VALUE; |
| } |
| break; |
| |
| case LL_RCC_QUADSPI_CLKSOURCE_PLL: /* PLL clock used as QUADSPI source */ |
| if (LL_RCC_PLL_IsReady() != 0U) |
| { |
| quadspi_frequency = RCC_PLL_GetFreqDomain_48M(); |
| } |
| break; |
| |
| default: |
| /* Nothing to do: quadspi frequency already initilalized to LL_RCC_PERIPH_FREQUENCY_NO */ |
| break; |
| } |
| |
| return quadspi_frequency; |
| } |
| #endif /* QUADSPI */ |
| |
| /** |
| * @} |
| */ |
| |
| /** |
| * @} |
| */ |
| |
| /** @addtogroup RCC_LL_Private_Functions |
| * @{ |
| */ |
| |
| /** |
| * @brief Return SYSTEM clock frequency |
| * @retval SYSTEM clock frequency (in Hz) |
| */ |
| static uint32_t RCC_GetSystemClockFreq(void) |
| { |
| uint32_t frequency; |
| |
| /* Get SYSCLK source -------------------------------------------------------*/ |
| switch (LL_RCC_GetSysClkSource()) |
| { |
| case LL_RCC_SYS_CLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ |
| frequency = HSI_VALUE; |
| break; |
| |
| case LL_RCC_SYS_CLKSOURCE_STATUS_HSE: /* HSE used as system clock source */ |
| frequency = HSE_VALUE; |
| break; |
| |
| case LL_RCC_SYS_CLKSOURCE_STATUS_PLL: /* PLL used as system clock source */ |
| frequency = RCC_PLL_GetFreqDomain_SYS(); |
| break; |
| |
| default: |
| frequency = HSI_VALUE; |
| break; |
| } |
| |
| return frequency; |
| } |
| |
| /** |
| * @brief Return HCLK clock frequency |
| * @param SYSCLK_Frequency SYSCLK clock frequency |
| * @retval HCLK clock frequency (in Hz) |
| */ |
| static uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency) |
| { |
| /* HCLK clock frequency */ |
| return __LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, LL_RCC_GetAHBPrescaler()); |
| } |
| |
| /** |
| * @brief Return PCLK1 clock frequency |
| * @param HCLK_Frequency HCLK clock frequency |
| * @retval PCLK1 clock frequency (in Hz) |
| */ |
| static uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency) |
| { |
| /* PCLK1 clock frequency */ |
| return __LL_RCC_CALC_PCLK1_FREQ(HCLK_Frequency, LL_RCC_GetAPB1Prescaler()); |
| } |
| |
| /** |
| * @brief Return PCLK2 clock frequency |
| * @param HCLK_Frequency HCLK clock frequency |
| * @retval PCLK2 clock frequency (in Hz) |
| */ |
| static uint32_t RCC_GetPCLK2ClockFreq(uint32_t HCLK_Frequency) |
| { |
| /* PCLK2 clock frequency */ |
| return __LL_RCC_CALC_PCLK2_FREQ(HCLK_Frequency, LL_RCC_GetAPB2Prescaler()); |
| } |
| |
| /** |
| * @brief Return PLL clock frequency used for system domain |
| * @retval PLL clock frequency (in Hz) |
| */ |
| static uint32_t RCC_PLL_GetFreqDomain_SYS(void) |
| { |
| uint32_t pllinputfreq, pllsource; |
| |
| /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN |
| SYSCLK = PLL_VCO / PLLR |
| */ |
| pllsource = LL_RCC_PLL_GetMainSource(); |
| |
| switch (pllsource) |
| { |
| case LL_RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */ |
| pllinputfreq = HSI_VALUE; |
| break; |
| |
| case LL_RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */ |
| pllinputfreq = HSE_VALUE; |
| break; |
| |
| default: |
| pllinputfreq = HSI_VALUE; |
| break; |
| } |
| return __LL_RCC_CALC_PLLCLK_FREQ(pllinputfreq, LL_RCC_PLL_GetDivider(), |
| LL_RCC_PLL_GetN(), LL_RCC_PLL_GetR()); |
| } |
| |
| /** |
| * @brief Return PLL clock frequency used for ADC domain |
| * @retval PLL clock frequency (in Hz) |
| */ |
| static uint32_t RCC_PLL_GetFreqDomain_ADC(void) |
| { |
| uint32_t pllinputfreq, pllsource; |
| |
| /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN |
| ADC Domain clock = PLL_VCO / PLLP |
| */ |
| pllsource = LL_RCC_PLL_GetMainSource(); |
| |
| switch (pllsource) |
| { |
| case LL_RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */ |
| pllinputfreq = HSI_VALUE; |
| break; |
| |
| case LL_RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */ |
| pllinputfreq = HSE_VALUE; |
| break; |
| |
| default: |
| pllinputfreq = HSI_VALUE; |
| break; |
| } |
| return __LL_RCC_CALC_PLLCLK_ADC_FREQ(pllinputfreq, LL_RCC_PLL_GetDivider(), |
| LL_RCC_PLL_GetN(), LL_RCC_PLL_GetP()); |
| } |
| |
| /** |
| * @brief Return PLL clock frequency used for 48 MHz domain |
| * @retval PLL clock frequency (in Hz) |
| */ |
| static uint32_t RCC_PLL_GetFreqDomain_48M(void) |
| { |
| uint32_t pllinputfreq, pllsource; |
| |
| /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN |
| 48M Domain clock = PLL_VCO / PLLQ |
| */ |
| pllsource = LL_RCC_PLL_GetMainSource(); |
| |
| switch (pllsource) |
| { |
| case LL_RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */ |
| pllinputfreq = HSI_VALUE; |
| break; |
| |
| case LL_RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */ |
| pllinputfreq = HSE_VALUE; |
| break; |
| |
| default: |
| pllinputfreq = HSI_VALUE; |
| break; |
| } |
| return __LL_RCC_CALC_PLLCLK_48M_FREQ(pllinputfreq, LL_RCC_PLL_GetDivider(), |
| LL_RCC_PLL_GetN(), LL_RCC_PLL_GetQ()); |
| } |
| |
| /** |
| * @} |
| */ |
| |
| /** |
| * @} |
| */ |
| |
| /** |
| * @} |
| */ |
| |
| #endif /* USE_FULL_LL_DRIVER */ |
| |
| /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
