| /** |
| ****************************************************************************** |
| * @file stm32g4xx_hal_hrtim.c |
| * @author MCD Application Team |
| * @brief TIM HAL module driver. |
| * This file provides firmware functions to manage the following |
| * functionalities of the High Resolution Timer (HRTIM) peripheral: |
| * + HRTIM Initialization |
| * + DLL Calibration Start |
| * + Timer Time Base Unit Configuration |
| * + Simple Time Base Start/Stop |
| * + Simple Time Base Start/Stop Interrupt |
| * + Simple Time Base Start/Stop DMA Request |
| * + Simple Output Compare/PWM Channel Configuration |
| * + Simple Output Compare/PWM Channel Start/Stop Interrupt |
| * + Simple Output Compare/PWM Channel Start/Stop DMA Request |
| * + Simple Input Capture Channel Configuration |
| * + Simple Input Capture Channel Start/Stop Interrupt |
| * + Simple Input Capture Channel Start/Stop DMA Request |
| * + Simple One Pulse Channel Configuration |
| * + Simple One Pulse Channel Start/Stop Interrupt |
| * + HRTIM External Synchronization Configuration |
| * + HRTIM Burst Mode Controller Configuration |
| * + HRTIM Burst Mode Controller Enabling |
| * + HRTIM External Events Conditioning Configuration |
| * + HRTIM Faults Conditioning Configuration |
| * + HRTIM Faults Enabling |
| * + HRTIM ADC trigger Configuration |
| * + Waveform Timer Configuration |
| * + Waveform Event Filtering Configuration |
| * + Waveform Dead Time Insertion Configuration |
| * + Waveform Chopper Mode Configuration |
| * + Waveform Compare Unit Configuration |
| * + Waveform Capture Unit Configuration |
| * + Waveform Output Configuration |
| * + Waveform Counter Start/Stop |
| * + Waveform Counter Start/Stop Interrupt |
| * + Waveform Counter Start/Stop DMA Request |
| * + Waveform Output Enabling |
| * + Waveform Output Level Set/Get |
| * + Waveform Output State Get |
| * + Waveform Burst DMA Operation Configuration |
| * + Waveform Burst DMA Operation Start |
| * + Waveform Timer Counter Software Reset |
| * + Waveform Capture Software Trigger |
| * + Waveform Burst Mode Controller Software Trigger |
| * + Waveform Timer Pre-loadable Registers Update Enabling |
| * + Waveform Timer Pre-loadable Registers Software Update |
| * + Waveform Timer Delayed Protection Status Get |
| * + Waveform Timer Burst Status Get |
| * + Waveform Timer Push-Pull Status Get |
| * + Peripheral State Get |
| @verbatim |
| ============================================================================== |
| ##### Simple mode v.s. waveform mode ##### |
| ============================================================================== |
| [..] The HRTIM HAL API is split into 2 categories: |
| (#)Simple functions: these functions allow for using a HRTIM timer as a |
| general purpose timer with high resolution capabilities. |
| HRTIM simple modes are managed through the set of functions named |
| HAL_HRTIM_Simple<Function>. These functions are similar in name and usage |
| to the one defined for the TIM peripheral. When a HRTIM timer operates in |
| simple mode, only a very limited set of HRTIM features are used. |
| Following simple modes are proposed: |
| (++)Output compare mode, |
| (++)PWM output mode, |
| (++)Input capture mode, |
| (++)One pulse mode. |
| (#)Waveform functions: These functions allow taking advantage of the HRTIM |
| flexibility to produce numerous types of control signal. When a HRTIM timer |
| operates in waveform mode, all the HRTIM features are accessible without |
| any restriction. HRTIM waveform modes are managed through the set of |
| functions named HAL_HRTIM_Waveform<Function> |
| ##### How to use this driver ##### |
| ============================================================================== |
| [..] |
| (#)Initialize the HRTIM low level resources by implementing the |
| HAL_HRTIM_MspInit() function: |
| (##)Enable the HRTIM clock source using __HRTIMx_CLK_ENABLE() |
| (##)Connect HRTIM pins to MCU I/Os |
| (+++) Enable the clock for the HRTIM GPIOs using the following |
| function: __HAL_RCC_GPIOx_CLK_ENABLE() |
| (+++) Configure these GPIO pins in Alternate Function mode using |
| HAL_GPIO_Init() |
| (##)When using DMA to control data transfer (e.g HAL_HRTIM_SimpleBaseStart_DMA()) |
| (+++)Enable the DMAx interface clock using __DMAx_CLK_ENABLE() |
| (+++)Initialize the DMA handle |
| (+++)Associate the initialized DMA handle to the appropriate DMA |
| handle of the HRTIM handle using __HAL_LINKDMA() |
| (+++)Initialize the DMA channel using HAL_DMA_Init() |
| (+++)Configure the priority and enable the NVIC for the transfer |
| complete interrupt on the DMA channel using HAL_NVIC_SetPriority() |
| and HAL_NVIC_EnableIRQ() |
| (##)In case of using interrupt mode (e.g HAL_HRTIM_SimpleBaseStart_IT()) |
| (+++)Configure the priority and enable the NVIC for the concerned |
| HRTIM interrupt using HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ() |
| |
| (#)Initialize the HRTIM HAL using HAL_HRTIM_Init(). The HRTIM configuration |
| structure (field of the HRTIM handle) specifies which global interrupt of |
| whole HRTIM must be enabled (Burst mode period, System fault, Faults). |
| It also contains the HRTIM external synchronization configuration. HRTIM |
| can act as a master (generating a synchronization signal) or as a slave |
| (waiting for a trigger to be synchronized). |
| |
| (#)Start the high resolution unit using HAL_HRTIM_DLLCalibrationStart(). DLL |
| calibration is executed periodically and compensate for potential voltage |
| and temperature drifts. DLL calibration period is specified by the |
| CalibrationRate argument. |
| |
| (#)HRTIM timers cannot be used until the high resolution unit is ready. This |
| can be checked using HAL_HRTIM_PollForDLLCalibration(): this function returns |
| HAL_OK if DLL calibration is completed or HAL_TIMEOUT if the DLL calibration |
| is still going on when timeout given as argument expires. DLL calibration |
| can also be started in interrupt mode using HAL_HRTIM_DLLCalibrationStart_IT(). |
| In that case an interrupt is generated when the DLL calibration is completed. |
| Note that as DLL calibration is executed on a periodic basis an interrupt |
| will be generated at the end of every DLL calibration operation |
| (worst case: one interrupt every 14 micro seconds !). |
| |
| (#) Configure HRTIM resources shared by all HRTIM timers |
| (##)Burst Mode Controller: |
| (+++)HAL_HRTIM_BurstModeConfig(): configures the HRTIM burst mode |
| controller: operating mode (continuous or one-shot mode), clock |
| (source, prescaler) , trigger(s), period, idle duration. |
| (##)External Events Conditioning: |
| (+++)HAL_HRTIM_EventConfig(): configures the conditioning of an |
| external event channel: source, polarity, edge-sensitivity. |
| External event can be used as triggers (timer reset, input |
| capture, burst mode, ADC triggers, delayed protection) |
| They can also be used to set or reset timer outputs. Up to |
| 10 event channels are available. |
| (+++)HAL_HRTIM_EventPrescalerConfig(): configures the external |
| event sampling clock (used for digital filtering). |
| (##)Fault Conditioning: |
| (+++)HAL_HRTIM_FaultConfig(): configures the conditioning of a |
| fault channel: source, polarity, edge-sensitivity. Fault |
| channels are used to disable the outputs in case of an |
| abnormal operation. Up to 6 fault channels are available. |
| (+++)HAL_HRTIM_FaultPrescalerConfig(): configures the fault |
| sampling clock (used for digital filtering). |
| (+++)HAL_HRTIM_FaultModeCtl(): Enables or disables fault input(s) |
| circuitry. By default all fault inputs are disabled. |
| (##)ADC trigger: |
| (+++)HAL_HRTIM_ADCTriggerConfig(): configures the source triggering |
| the update of the ADC trigger register and the ADC trigger. |
| 4 independent triggers are available to start both the regular |
| and the injected sequencers of the 2 ADCs |
| |
| (#) Configure HRTIM timer time base using HAL_HRTIM_TimeBaseConfig(). This |
| function must be called whatever the HRTIM timer operating mode is |
| (simple v.s. waveform). It configures mainly: |
| (##)The HRTIM timer counter operating mode (continuous v.s. one shot) |
| (##)The HRTIM timer clock prescaler |
| (##)The HRTIM timer period |
| (##)The HRTIM timer repetition counter |
| |
| *** If the HRTIM timer operates in simple mode *** |
| =================================================== |
| [..] |
| (#) Start or Stop simple timers |
| (++)Simple time base: HAL_HRTIM_SimpleBaseStart(),HAL_HRTIM_SimpleBaseStop(), |
| HAL_HRTIM_SimpleBaseStart_IT(),HAL_HRTIM_SimpleBaseStop_IT(), |
| HAL_HRTIM_SimpleBaseStart_DMA(),HAL_HRTIM_SimpleBaseStop_DMA(). |
| (++)Simple output compare: HAL_HRTIM_SimpleOCChannelConfig(), |
| HAL_HRTIM_SimpleOCStart(),HAL_HRTIM_SimpleOCStop(), |
| HAL_HRTIM_SimpleOCStart_IT(),HAL_HRTIM_SimpleOCStop_IT(), |
| HAL_HRTIM_SimpleOCStart_DMA(),HAL_HRTIM_SimpleOCStop_DMA(), |
| (++)Simple PWM output: HAL_HRTIM_SimplePWMChannelConfig(), |
| HAL_HRTIM_SimplePWMStart(),HAL_HRTIM_SimplePWMStop(), |
| HAL_HRTIM_SimplePWMStart_IT(),HAL_HRTIM_SimplePWMStop_IT(), |
| HAL_HRTIM_SimplePWMStart_DMA(),HAL_HRTIM_SimplePWMStop_DMA(), |
| (++)Simple input capture: HAL_HRTIM_SimpleCaptureChannelConfig(), |
| HAL_HRTIM_SimpleCaptureStart(),HAL_HRTIM_SimpleCaptureStop(), |
| HAL_HRTIM_SimpleCaptureStart_IT(),HAL_HRTIM_SimpleCaptureStop_IT(), |
| HAL_HRTIM_SimpleCaptureStart_DMA(),HAL_HRTIM_SimpleCaptureStop_DMA(). |
| (++)Simple one pulse: HAL_HRTIM_SimpleOnePulseChannelConfig(), |
| HAL_HRTIM_SimpleOnePulseStart(),HAL_HRTIM_SimpleOnePulseStop(), |
| HAL_HRTIM_SimpleOnePulseStart_IT(),HAL_HRTIM_SimpleOnePulseStop_It(). |
| |
| *** If the HRTIM timer operates in waveform mode *** |
| ==================================================== |
| [..] |
| (#) Completes waveform timer configuration |
| (++)HAL_HRTIM_WaveformTimerConfig(): configuration of a HRTIM timer |
| operating in wave form mode mainly consists in: |
| (+++)Enabling the HRTIM timer interrupts and DMA requests. |
| (+++)Enabling the half mode for the HRTIM timer. |
| (+++)Defining how the HRTIM timer reacts to external synchronization input. |
| (+++)Enabling the push-pull mode for the HRTIM timer. |
| (+++)Enabling the fault channels for the HRTIM timer. |
| (+++)Enabling the dead-time insertion for the HRTIM timer. |
| (+++)Setting the delayed protection mode for the HRTIM timer (source and outputs |
| on which the delayed protection are applied). |
| (+++)Specifying the HRTIM timer update and reset triggers. |
| (+++)Specifying the HRTIM timer registers update policy (e.g. pre-load enabling). |
| (++)HAL_HRTIM_TimerEventFilteringConfig(): configures external |
| event blanking and windowing circuitry of a HRTIM timer: |
| (+++)Blanking: to mask external events during a defined time period a defined time period |
| (+++)Windowing, to enable external events only during a defined time period |
| (++)HAL_HRTIM_DeadTimeConfig(): configures the dead-time insertion |
| unit for a HRTIM timer. Allows to generate a couple of |
| complementary signals from a single reference waveform, |
| with programmable delays between active state. |
| (++)HAL_HRTIM_ChopperModeConfig(): configures the parameters of |
| the high-frequency carrier signal added on top of the timing |
| unit output. Chopper mode can be enabled or disabled for each |
| timer output separately (see HAL_HRTIM_WaveformOutputConfig()). |
| (++)HAL_HRTIM_BurstDMAConfig(): configures the burst DMA burst |
| controller. Allows having multiple HRTIM registers updated |
| with a single DMA request. The burst DMA operation is started |
| by calling HAL_HRTIM_BurstDMATransfer(). |
| (++)HAL_HRTIM_WaveformCompareConfig():configures the compare unit |
| of a HRTIM timer. This operation consists in setting the |
| compare value and possibly specifying the auto delayed mode |
| for compare units 2 and 4 (allows to have compare events |
| generated relatively to capture events). Note that when auto |
| delayed mode is needed, the capture unit associated to the |
| compare unit must be configured separately. |
| (++)HAL_HRTIM_WaveformCaptureConfig(): configures the capture unit |
| of a HRTIM timer. This operation consists in specifying the |
| source(s) triggering the capture (timer register update event, |
| external event, timer output set/reset event, other HRTIM |
| timer related events). |
| (++)HAL_HRTIM_WaveformOutputConfig(): configuration of a HRTIM timer |
| output mainly consists in: |
| (+++)Setting the output polarity (active high or active low), |
| (+++)Defining the set/reset crossbar for the output, |
| (+++)Specifying the fault level (active or inactive) in IDLE and FAULT states., |
| |
| (#) Set waveform timer output(s) level |
| (++)HAL_HRTIM_WaveformSetOutputLevel(): forces the output to its |
| active or inactive level. For example, when deadtime insertion |
| is enabled it is necessary to force the output level by software |
| to have the outputs in a complementary state as soon as the RUN mode is entered. |
| |
| (#) Enable or Disable waveform timer output(s) |
| (++)HAL_HRTIM_WaveformOutputStart(),HAL_HRTIM_WaveformOutputStop(). |
| |
| (#) Start or Stop waveform HRTIM timer(s). |
| (++)HAL_HRTIM_WaveformCountStart(),HAL_HRTIM_WaveformCountStop(), |
| (++)HAL_HRTIM_WaveformCountStart_IT(),HAL_HRTIM_WaveformCountStop_IT(), |
| (++)HAL_HRTIM_WaveformCountStart_DMA(),HAL_HRTIM_WaveformCountStop_DMA(), |
| (#) Burst mode controller enabling: |
| (++)HAL_HRTIM_BurstModeCtl(): activates or de-activates the |
| burst mode controller. |
| |
| (#) Some HRTIM operations can be triggered by software: |
| (++)HAL_HRTIM_BurstModeSoftwareTrigger(): calling this function |
| trigs the burst operation. |
| (++)HAL_HRTIM_SoftwareCapture(): calling this function trigs the |
| capture of the HRTIM timer counter. |
| (++)HAL_HRTIM_SoftwareUpdate(): calling this function trigs the |
| update of the pre-loadable registers of the HRTIM timer |
| (++)HAL_HRTIM_SoftwareReset():calling this function resets the |
| HRTIM timer counter. |
| |
| (#) Some functions can be used any time to retrieve HRTIM timer related |
| information |
| (++)HAL_HRTIM_GetCapturedValue(): returns actual value of the |
| capture register of the designated capture unit. |
| (++)HAL_HRTIM_WaveformGetOutputLevel(): returns actual level |
| (ACTIVE/INACTIVE) of the designated timer output. |
| (++)HAL_HRTIM_WaveformGetOutputState():returns actual state |
| (IDLE/RUN/FAULT) of the designated timer output. |
| (++)HAL_HRTIM_GetDelayedProtectionStatus():returns actual level |
| (ACTIVE/INACTIVE) of the designated output when the delayed |
| protection was triggered. |
| (++)HAL_HRTIM_GetBurstStatus(): returns the actual status |
| (ACTIVE/INACTIVE) of the burst mode controller. |
| (++)HAL_HRTIM_GetCurrentPushPullStatus(): when the push-pull mode |
| is enabled for the HRTIM timer (see HAL_HRTIM_WaveformTimerConfig()), |
| the push-pull status indicates on which output the signal is currently |
| active (e.g signal applied on output 1 and output 2 forced |
| inactive or vice versa). |
| (++)HAL_HRTIM_GetIdlePushPullStatus(): when the push-pull mode |
| is enabled for the HRTIM timer (see HAL_HRTIM_WaveformTimerConfig()), |
| the idle push-pull status indicates during which period the |
| delayed protection request occurred (e.g. protection occurred |
| when the output 1 was active and output 2 forced inactive or |
| vice versa). |
| |
| (#) Some functions can be used any time to retrieve actual HRTIM status |
| (++)HAL_HRTIM_GetState(): returns actual HRTIM instance HAL state. |
| |
| *** Callback registration *** |
| ============================= |
| [..] |
| The compilation flag USE_HAL_HRTIM_REGISTER_CALLBACKS when set to 1 |
| allows the user to configure dynamically the driver callbacks. |
| Use Functions HAL_HRTIM_RegisterCallback() or HAL_HRTIM_TIMxRegisterCallback() |
| to register an interrupt callback. |
| |
| [..] |
| Function HAL_HRTIM_RegisterCallback() allows to register following callbacks: |
| (+) Fault1Callback : Fault 1 interrupt callback function |
| (+) Fault2Callback : Fault 2 interrupt callback function |
| (+) Fault3Callback : Fault 3 interrupt callback function |
| (+) Fault4Callback : Fault 4 interrupt callback function |
| (+) Fault5Callback : Fault 5 interrupt callback function |
| (+) Fault6Callback : Fault 6 interrupt callback function |
| (+) SystemFaultCallback : System fault interrupt callback function |
| (+) DLLCalibrationReadyCallback : DLL Ready interrupt callback function |
| (+) BurstModePeriodCallback : Burst mode period interrupt callback function |
| (+) SynchronizationEventCallback : Sync Input interrupt callback function |
| (+) ErrorCallback : DMA error callback function |
| (+) MspInitCallback : HRTIM MspInit callback function |
| (+) MspDeInitCallback : HRTIM MspInit callback function |
| |
| [..] |
| Function HAL_HRTIM_TIMxRegisterCallback() allows to register following callbacks: |
| (+) RegistersUpdateCallback : Timer x Update interrupt callback function |
| (+) RepetitionEventCallback : Timer x Repetition interrupt callback function |
| (+) Compare1EventCallback : Timer x Compare 1 match interrupt callback function |
| (+) Compare2EventCallback : Timer x Compare 2 match interrupt callback function |
| (+) Compare3EventCallback : Timer x Compare 3 match interrupt callback function |
| (+) Compare4EventCallback : Timer x Compare 4 match interrupt callback function |
| (+) Capture1EventCallback : Timer x Capture 1 interrupts callback function |
| (+) Capture2EventCallback : Timer x Capture 2 interrupts callback function |
| (+) DelayedProtectionCallback : Timer x Delayed protection interrupt callback function |
| (+) CounterResetCallback : Timer x counter reset/roll-over interrupt callback function |
| (+) Output1SetCallback : Timer x output 1 set interrupt callback function |
| (+) Output1ResetCallback : Timer x output 1 reset interrupt callback function |
| (+) Output2SetCallback : Timer x output 2 set interrupt callback function |
| (+) Output2ResetCallback : Timer x output 2 reset interrupt callback function |
| (+) BurstDMATransferCallback : Timer x Burst DMA completed interrupt callback function |
| |
| [..] |
| Both functions take as parameters the HAL peripheral handle, the Callback ID |
| and a pointer to the user callback function. |
| |
| [..] |
| Use function HAL_HRTIM_UnRegisterCallback or HAL_HRTIM_TIMxUnRegisterCallback |
| to reset a callback to the default weak function. Both functions take as parameters |
| the HAL peripheral handle and the Callback ID. |
| |
| [..] |
| By default, after the HAL_HRTIM_Init() and when the state is HAL_HRTIM_STATE_RESET |
| all callbacks are set to the corresponding weak functions (e.g HAL_HRTIM_Fault1Callback) |
| Exception done for MspInit and MspDeInit functions that are reset to the legacy |
| weak functions in the HAL_HRTIM_Init()/ HAL_HRTIM_DeInit() only when these |
| callbacks are null (not registered beforehand). If MspInit or MspDeInit are |
| not null, the HAL_HRTIM_Init()/ HAL_HRTIM_DeInit() keep and use the user |
| MspInit/MspDeInit callbacks (registered beforehand) whatever the state. |
| |
| [..] |
| Callbacks can be registered/unregistered in HAL_HRTIM_STATE_READY state only. |
| Exception done MspInit/MspDeInit functions that can be registered/unregistered |
| in HAL_HRTIM_STATE_READY or HAL_HRTIM_STATE_RESET states, thus registered |
| (user) MspInit/DeInit callbacks can be used during the Init/DeInit. |
| Then, the user first registers the MspInit/MspDeInit user callbacks |
| using HAL_HRTIM_RegisterCallback() before calling HAL_HRTIM_DeInit() |
| or HAL_HRTIM_Init() function. |
| |
| [..] |
| When the compilation flag USE_HAL_HRTIM_REGISTER_CALLBACKS is set to 0 or |
| not defined, the callback registration feature is not available and all |
| callbacks are set to the corresponding weak functions. |
| |
| @endverbatim |
| |
| ****************************************************************************** |
| * @attention |
| * |
| * <h2><center>© Copyright (c) 2019 STMicroelectronics. |
| * All rights reserved.</center></h2> |
| * |
| * This software component is licensed by ST under BSD 3-Clause license, |
| * the "License"; You may not use this file except in compliance with the |
| * License. You may obtain a copy of the License at: |
| * opensource.org/licenses/BSD-3-Clause |
| * |
| ****************************************************************************** |
| */ |
| |
| /* Includes ------------------------------------------------------------------*/ |
| #include "stm32g4xx_hal.h" |
| |
| /** @addtogroup STM32G4xx_HAL_Driver |
| * @{ |
| */ |
| |
| #ifdef HAL_HRTIM_MODULE_ENABLED |
| |
| #if defined(HRTIM1) |
| |
| /** @defgroup HRTIM HRTIM |
| * @brief HRTIM HAL module driver |
| * @{ |
| */ |
| |
| /* Private typedef -----------------------------------------------------------*/ |
| /* Private define ------------------------------------------------------------*/ |
| /** @defgroup HRTIM_Private_Defines HRTIM Private Define |
| * @{ |
| */ |
| #define HRTIM_FLTR_FLTxEN (HRTIM_FLTR_FLT1EN |\ |
| HRTIM_FLTR_FLT2EN |\ |
| HRTIM_FLTR_FLT3EN |\ |
| HRTIM_FLTR_FLT4EN | \ |
| HRTIM_FLTR_FLT5EN | \ |
| HRTIM_FLTR_FLT6EN) |
| |
| #define HRTIM_TIMCR_TIMUPDATETRIGGER (HRTIM_TIMUPDATETRIGGER_MASTER |\ |
| HRTIM_TIMUPDATETRIGGER_TIMER_A |\ |
| HRTIM_TIMUPDATETRIGGER_TIMER_B |\ |
| HRTIM_TIMUPDATETRIGGER_TIMER_C |\ |
| HRTIM_TIMUPDATETRIGGER_TIMER_D |\ |
| HRTIM_TIMUPDATETRIGGER_TIMER_E |\ |
| HRTIM_TIMUPDATETRIGGER_TIMER_F) |
| |
| #define HRTIM_FLTINR1_FLTxLCK ((HRTIM_FAULTLOCK_READONLY) | \ |
| (HRTIM_FAULTLOCK_READONLY << 8U) | \ |
| (HRTIM_FAULTLOCK_READONLY << 16U) | \ |
| (HRTIM_FAULTLOCK_READONLY << 24U)) |
| |
| #define HRTIM_FLTINR2_FLTxLCK ((HRTIM_FAULTLOCK_READONLY) | \ |
| (HRTIM_FAULTLOCK_READONLY << 8U)) |
| /** |
| * @} |
| */ |
| |
| /* Private macro -------------------------------------------------------------*/ |
| /* Private variables ---------------------------------------------------------*/ |
| /** @defgroup HRTIM_Private_Variables HRTIM Private Variables |
| * @{ |
| */ |
| static uint32_t TimerIdxToTimerId[] = |
| { |
| HRTIM_TIMERID_TIMER_A, |
| HRTIM_TIMERID_TIMER_B, |
| HRTIM_TIMERID_TIMER_C, |
| HRTIM_TIMERID_TIMER_D, |
| HRTIM_TIMERID_TIMER_E, |
| HRTIM_TIMERID_TIMER_F, |
| HRTIM_TIMERID_MASTER, |
| }; |
| /** |
| * @} |
| */ |
| |
| /* Private function prototypes -----------------------------------------------*/ |
| /** @defgroup HRTIM_Private_Functions HRTIM Private Functions |
| * @{ |
| */ |
| static void HRTIM_MasterBase_Config(HRTIM_HandleTypeDef * hhrtim, |
| HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg); |
| |
| static void HRTIM_TimingUnitBase_Config(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx, |
| HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg); |
| |
| static void HRTIM_MasterWaveform_Config(HRTIM_HandleTypeDef * hhrtim, |
| HRTIM_TimerCfgTypeDef * pTimerCfg); |
| |
| static void HRTIM_TimingUnitWaveform_Config(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx, |
| HRTIM_TimerCfgTypeDef * pTimerCfg); |
| |
| static void HRTIM_TimingUnitWaveform_Control(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx, |
| HRTIM_TimerCtlTypeDef * pTimerCtl); |
| |
| static void HRTIM_TimingUnitRollOver_Config(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx, |
| uint32_t pRollOverMode); |
| |
| |
| static void HRTIM_CaptureUnitConfig(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx, |
| uint32_t CaptureUnit, |
| uint32_t Event); |
| |
| static void HRTIM_OutputConfig(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx, |
| uint32_t Output, |
| HRTIM_OutputCfgTypeDef * pOutputCfg); |
| |
| static void HRTIM_EventConfig(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t Event, |
| HRTIM_EventCfgTypeDef * pEventCfg); |
| |
| static void HRTIM_TIM_ResetConfig(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx, |
| uint32_t Event); |
| |
| static uint32_t HRTIM_GetITFromOCMode(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx, |
| uint32_t OCChannel); |
| |
| static uint32_t HRTIM_GetDMAFromOCMode(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx, |
| uint32_t OCChannel); |
| |
| static DMA_HandleTypeDef * HRTIM_GetDMAHandleFromTimerIdx(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx); |
| |
| static uint32_t GetTimerIdxFromDMAHandle(HRTIM_HandleTypeDef * hhrtim, |
| DMA_HandleTypeDef * hdma); |
| |
| static void HRTIM_ForceRegistersUpdate(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx); |
| |
| static void HRTIM_HRTIM_ISR(HRTIM_HandleTypeDef * hhrtim); |
| |
| static void HRTIM_Master_ISR(HRTIM_HandleTypeDef * hhrtim); |
| |
| static void HRTIM_Timer_ISR(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx); |
| |
| static void HRTIM_DMAMasterCplt(DMA_HandleTypeDef *hdma); |
| |
| static void HRTIM_DMATimerxCplt(DMA_HandleTypeDef *hdma); |
| |
| static void HRTIM_DMAError(DMA_HandleTypeDef *hdma); |
| |
| static void HRTIM_BurstDMACplt(DMA_HandleTypeDef *hdma); |
| /** |
| * @} |
| */ |
| |
| /* Exported functions ---------------------------------------------------------*/ |
| /** @defgroup HRTIM_Exported_Functions HRTIM Exported Functions |
| * @{ |
| */ |
| |
| /** @defgroup HRTIM_Exported_Functions_Group1 Initialization and de-initialization functions |
| * @brief Initialization and Configuration functions |
| @verbatim |
| =============================================================================== |
| ##### Initialization and Time Base Configuration functions ##### |
| =============================================================================== |
| [..] This section provides functions allowing to: |
| (+) Initialize a HRTIM instance |
| (+) De-initialize a HRTIM instance |
| (+) Initialize the HRTIM MSP |
| (+) De-initialize the HRTIM MSP |
| (+) Start the high-resolution unit (start DLL calibration) |
| (+) Check that the high resolution unit is ready (DLL calibration done) |
| (+) Configure the time base unit of a HRTIM timer |
| |
| @endverbatim |
| * @{ |
| */ |
| |
| /** |
| * @brief Initialize a HRTIM instance |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @retval HAL status |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_Init(HRTIM_HandleTypeDef * hhrtim) |
| { |
| uint8_t timer_idx; |
| uint32_t hrtim_mcr; |
| |
| /* Check the HRTIM handle allocation */ |
| if(hhrtim == NULL) |
| { |
| return HAL_ERROR; |
| } |
| |
| /* Check the parameters */ |
| assert_param(IS_HRTIM_ALL_INSTANCE(hhrtim->Instance)); |
| assert_param(IS_HRTIM_IT(hhrtim->Init.HRTIMInterruptResquests)); |
| |
| #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1) |
| if (hhrtim->State == HAL_HRTIM_STATE_RESET) |
| { |
| /* Initialize callback function pointers to their default values */ |
| hhrtim->Fault1Callback = HAL_HRTIM_Fault1Callback; |
| hhrtim->Fault2Callback = HAL_HRTIM_Fault2Callback; |
| hhrtim->Fault3Callback = HAL_HRTIM_Fault3Callback; |
| hhrtim->Fault4Callback = HAL_HRTIM_Fault4Callback; |
| hhrtim->Fault5Callback = HAL_HRTIM_Fault5Callback; |
| hhrtim->Fault6Callback = HAL_HRTIM_Fault6Callback; |
| hhrtim->SystemFaultCallback = HAL_HRTIM_SystemFaultCallback; |
| hhrtim->DLLCalibrationReadyCallback = HAL_HRTIM_DLLCalibrationReadyCallback; |
| hhrtim->BurstModePeriodCallback = HAL_HRTIM_BurstModePeriodCallback; |
| hhrtim->SynchronizationEventCallback = HAL_HRTIM_SynchronizationEventCallback; |
| hhrtim->ErrorCallback = HAL_HRTIM_ErrorCallback; |
| hhrtim->RegistersUpdateCallback = HAL_HRTIM_RegistersUpdateCallback; |
| hhrtim->RepetitionEventCallback = HAL_HRTIM_RepetitionEventCallback; |
| hhrtim->Compare1EventCallback = HAL_HRTIM_Compare1EventCallback; |
| hhrtim->Compare2EventCallback = HAL_HRTIM_Compare2EventCallback; |
| hhrtim->Compare3EventCallback = HAL_HRTIM_Compare3EventCallback; |
| hhrtim->Compare4EventCallback = HAL_HRTIM_Compare4EventCallback; |
| hhrtim->Capture1EventCallback = HAL_HRTIM_Capture1EventCallback; |
| hhrtim->Capture2EventCallback = HAL_HRTIM_Capture2EventCallback; |
| hhrtim->DelayedProtectionCallback = HAL_HRTIM_DelayedProtectionCallback; |
| hhrtim->CounterResetCallback = HAL_HRTIM_CounterResetCallback; |
| hhrtim->Output1SetCallback = HAL_HRTIM_Output1SetCallback; |
| hhrtim->Output1ResetCallback = HAL_HRTIM_Output1ResetCallback; |
| hhrtim->Output2SetCallback = HAL_HRTIM_Output2SetCallback; |
| hhrtim->Output2ResetCallback = HAL_HRTIM_Output2ResetCallback; |
| hhrtim->BurstDMATransferCallback = HAL_HRTIM_BurstDMATransferCallback; |
| |
| if (hhrtim->MspInitCallback == NULL) |
| { |
| hhrtim->MspInitCallback = HAL_HRTIM_MspInit; |
| } |
| } |
| #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */ |
| |
| /* Set the HRTIM state */ |
| hhrtim->State = HAL_HRTIM_STATE_BUSY; |
| |
| /* Initialize the DMA handles */ |
| hhrtim->hdmaMaster = (DMA_HandleTypeDef *)NULL; |
| hhrtim->hdmaTimerA = (DMA_HandleTypeDef *)NULL; |
| hhrtim->hdmaTimerB = (DMA_HandleTypeDef *)NULL; |
| hhrtim->hdmaTimerC = (DMA_HandleTypeDef *)NULL; |
| hhrtim->hdmaTimerD = (DMA_HandleTypeDef *)NULL; |
| hhrtim->hdmaTimerE = (DMA_HandleTypeDef *)NULL; |
| hhrtim->hdmaTimerF = (DMA_HandleTypeDef *)NULL; |
| |
| /* HRTIM output synchronization configuration (if required) */ |
| if ((hhrtim->Init.SyncOptions & HRTIM_SYNCOPTION_MASTER) != (uint32_t)RESET) |
| { |
| /* Check parameters */ |
| assert_param(IS_HRTIM_SYNCOUTPUTSOURCE(hhrtim->Init.SyncOutputSource)); |
| assert_param(IS_HRTIM_SYNCOUTPUTPOLARITY(hhrtim->Init.SyncOutputPolarity)); |
| |
| /* The synchronization output initialization procedure must be done prior |
| to the configuration of the MCU outputs (done within HAL_HRTIM_MspInit) |
| */ |
| if (hhrtim->Instance == HRTIM1) |
| { |
| /* Enable the HRTIM peripheral clock */ |
| __HAL_RCC_HRTIM1_CLK_ENABLE(); |
| } |
| |
| hrtim_mcr = hhrtim->Instance->sMasterRegs.MCR; |
| |
| /* Set the event to be sent on the synchronization output */ |
| hrtim_mcr &= ~(HRTIM_MCR_SYNC_SRC); |
| hrtim_mcr |= (hhrtim->Init.SyncOutputSource & HRTIM_MCR_SYNC_SRC); |
| |
| /* Set the polarity of the synchronization output */ |
| hrtim_mcr &= ~(HRTIM_MCR_SYNC_OUT); |
| hrtim_mcr |= (hhrtim->Init.SyncOutputPolarity & HRTIM_MCR_SYNC_OUT); |
| |
| /* Update the HRTIM registers */ |
| hhrtim->Instance->sMasterRegs.MCR = hrtim_mcr; |
| } |
| |
| /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ |
| #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1) |
| hhrtim->MspInitCallback(hhrtim); |
| #else |
| HAL_HRTIM_MspInit(hhrtim); |
| #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */ |
| |
| /* HRTIM input synchronization configuration (if required) */ |
| if ((hhrtim->Init.SyncOptions & HRTIM_SYNCOPTION_SLAVE) != (uint32_t)RESET) |
| { |
| /* Check parameters */ |
| assert_param(IS_HRTIM_SYNCINPUTSOURCE(hhrtim->Init.SyncInputSource)); |
| |
| hrtim_mcr = hhrtim->Instance->sMasterRegs.MCR; |
| |
| /* Set the synchronization input source */ |
| hrtim_mcr &= ~(HRTIM_MCR_SYNC_IN); |
| hrtim_mcr |= (hhrtim->Init.SyncInputSource & HRTIM_MCR_SYNC_IN); |
| |
| /* Update the HRTIM registers */ |
| hhrtim->Instance->sMasterRegs.MCR = hrtim_mcr; |
| } |
| |
| /* Initialize the HRTIM state*/ |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| /* Initialize the lock status of the HRTIM HAL API */ |
| __HAL_UNLOCK(hhrtim); |
| |
| /* Initialize timer related parameters */ |
| for (timer_idx = HRTIM_TIMERINDEX_TIMER_A ; |
| timer_idx <= HRTIM_TIMERINDEX_MASTER ; |
| timer_idx++) |
| { |
| hhrtim->TimerParam[timer_idx].CaptureTrigger1 = HRTIM_CAPTURETRIGGER_NONE; |
| hhrtim->TimerParam[timer_idx].CaptureTrigger2 = HRTIM_CAPTURETRIGGER_NONE; |
| hhrtim->TimerParam[timer_idx].InterruptRequests = HRTIM_IT_NONE; |
| hhrtim->TimerParam[timer_idx].DMARequests = HRTIM_IT_NONE; |
| hhrtim->TimerParam[timer_idx].DMASrcAddress = 0U; |
| hhrtim->TimerParam[timer_idx].DMASize = 0U; |
| } |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @brief De-initialize a HRTIM instance |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @retval HAL status |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_DeInit (HRTIM_HandleTypeDef * hhrtim) |
| { |
| /* Check the HRTIM handle allocation */ |
| if(hhrtim == NULL) |
| { |
| return HAL_ERROR; |
| } |
| |
| /* Check the parameters */ |
| assert_param(IS_HRTIM_ALL_INSTANCE(hhrtim->Instance)); |
| |
| /* Set the HRTIM state */ |
| hhrtim->State = HAL_HRTIM_STATE_BUSY; |
| |
| /* DeInit the low level hardware */ |
| #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1) |
| if (hhrtim->MspDeInitCallback == NULL) |
| { |
| hhrtim->MspDeInitCallback = HAL_HRTIM_MspDeInit; |
| } |
| |
| hhrtim->MspDeInitCallback(hhrtim); |
| #else |
| HAL_HRTIM_MspDeInit(hhrtim); |
| #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */ |
| |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @brief MSP initialization for a HRTIM instance |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @retval None |
| */ |
| __weak void HAL_HRTIM_MspInit(HRTIM_HandleTypeDef * hhrtim) |
| { |
| /* Prevent unused argument(s) compilation warning */ |
| UNUSED(hhrtim); |
| |
| /* NOTE: This function should not be modified, when the callback is needed, |
| the HAL_HRTIM_MspInit could be implemented in the user file |
| */ |
| } |
| |
| /** |
| * @brief MSP de-initialization of a HRTIM instance |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @retval None |
| */ |
| __weak void HAL_HRTIM_MspDeInit(HRTIM_HandleTypeDef * hhrtim) |
| { |
| /* Prevent unused argument(s) compilation warning */ |
| UNUSED(hhrtim); |
| |
| /* NOTE: This function should not be modified, when the callback is needed, |
| the HAL_HRTIM_MspDeInit could be implemented in the user file |
| */ |
| } |
| |
| /** |
| * @brief Start the DLL calibration |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param CalibrationRate DLL calibration period |
| * This parameter can be one of the following values: |
| * @arg HRTIM_SINGLE_CALIBRATION: One shot DLL calibration |
| * @arg HRTIM_CALIBRATIONRATE_0: Periodic DLL calibration. T=6.168 ms |
| * @arg HRTIM_CALIBRATIONRATE_1: Periodic DLL calibration. T=0.771 ms |
| * @arg HRTIM_CALIBRATIONRATE_2: Periodic DLL calibration. T=0.096 ms |
| * @arg HRTIM_CALIBRATIONRATE_3: Periodic DLL calibration. T=0.012 ms |
| * @retval HAL status |
| * @note This function locks the HRTIM instance. HRTIM instance is unlocked |
| * within the HAL_HRTIM_PollForDLLCalibration function, just before |
| * exiting the function. |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_DLLCalibrationStart(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t CalibrationRate) |
| { |
| /* Check the parameters */ |
| assert_param(IS_HRTIM_CALIBRATIONRATE(CalibrationRate)); |
| |
| /* Process Locked */ |
| __HAL_LOCK(hhrtim); |
| |
| hhrtim->State = HAL_HRTIM_STATE_BUSY; |
| |
| if (CalibrationRate == HRTIM_SINGLE_CALIBRATION) |
| { |
| /* One shot DLL calibration */ |
| CLEAR_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALEN); |
| SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CAL); |
| } |
| else |
| { |
| /* Periodic DLL calibration */ |
| SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALEN); |
| MODIFY_REG(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALRTE, CalibrationRate); |
| SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CAL); |
| } |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @brief Start the DLL calibration. |
| * DLL ready interrupt is enabled |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param CalibrationRate DLL calibration period |
| * This parameter can be one of the following values: |
| * @arg HRTIM_SINGLE_CALIBRATION: One shot DLL calibration |
| * @arg HRTIM_CALIBRATIONRATE_0: Periodic DLL calibration. T=6.168 ms |
| * @arg HRTIM_CALIBRATIONRATE_1: Periodic DLL calibration. T=0.771 ms |
| * @arg HRTIM_CALIBRATIONRATE_2: Periodic DLL calibration. T=0.096 ms |
| * @arg HRTIM_CALIBRATIONRATE_3: Periodic DLL calibration. T=0.012 ms |
| * @retval HAL status |
| * @note This function locks the HRTIM instance. HRTIM instance is unlocked |
| * within the IRQ processing function when processing the DLL ready |
| * interrupt. |
| * @note If this function is called for periodic calibration, the DLLRDY |
| * interrupt is generated every time the calibration completes which |
| * will significantly increases the overall interrupt rate. |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_DLLCalibrationStart_IT(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t CalibrationRate) |
| { |
| /* Check the parameters */ |
| assert_param(IS_HRTIM_CALIBRATIONRATE(CalibrationRate)); |
| |
| /* Process Locked */ |
| __HAL_LOCK(hhrtim); |
| |
| hhrtim->State = HAL_HRTIM_STATE_BUSY; |
| |
| /* Enable DLL Ready interrupt flag */ |
| __HAL_HRTIM_ENABLE_IT(hhrtim, HRTIM_IT_DLLRDY); |
| |
| if (CalibrationRate == HRTIM_SINGLE_CALIBRATION) |
| { |
| /* One shot DLL calibration */ |
| CLEAR_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALEN); |
| SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CAL); |
| } |
| else |
| { |
| /* Periodic DLL calibration */ |
| SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALEN); |
| MODIFY_REG(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALRTE, CalibrationRate); |
| SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CAL); |
| } |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @brief Poll the DLL calibration ready flag and returns when the flag is |
| * set (DLL calibration completed) or upon timeout expiration. |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param Timeout Timeout duration in millisecond |
| * @retval HAL status |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_PollForDLLCalibration(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t Timeout) |
| { |
| uint32_t tickstart; |
| |
| tickstart = HAL_GetTick(); |
| |
| /* Check End of conversion flag */ |
| while(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_IT_DLLRDY) == (uint32_t)RESET) |
| { |
| if (Timeout != HAL_MAX_DELAY) |
| { |
| if(((HAL_GetTick()-tickstart) > Timeout) || (Timeout == 0U)) |
| { |
| hhrtim->State = HAL_HRTIM_STATE_ERROR; |
| return HAL_TIMEOUT; |
| } |
| } |
| } |
| |
| /* Set HRTIM State */ |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| /* Process unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @brief Configure the time base unit of a timer |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param TimerIdx Timer index |
| * This parameter can be one of the following values: |
| * @arg HRTIM_TIMERINDEX_MASTER for master timer |
| * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
| * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
| * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
| * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
| * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
| * @arg HRTIM_TIMERINDEX_TIMER_F for timer F |
| * @param pTimeBaseCfg pointer to the time base configuration structure |
| * @note This function must be called prior starting the timer |
| * @note The time-base unit initialization parameters specify: |
| * The timer counter operating mode (continuous, one shot), |
| * The timer clock prescaler, |
| * The timer period, |
| * The timer repetition counter. |
| * @retval HAL status |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_TimeBaseConfig(HRTIM_HandleTypeDef *hhrtim, |
| uint32_t TimerIdx, |
| HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg) |
| { |
| /* Check the parameters */ |
| assert_param(IS_HRTIM_TIMERINDEX(TimerIdx)); |
| assert_param(IS_HRTIM_PRESCALERRATIO(pTimeBaseCfg->PrescalerRatio)); |
| assert_param(IS_HRTIM_MODE(pTimeBaseCfg->Mode)); |
| |
| if(hhrtim->State == HAL_HRTIM_STATE_BUSY) |
| { |
| return HAL_BUSY; |
| } |
| |
| /* Set the HRTIM state */ |
| hhrtim->State = HAL_HRTIM_STATE_BUSY; |
| |
| if (TimerIdx == HRTIM_TIMERINDEX_MASTER) |
| { |
| /* Configure master timer time base unit */ |
| HRTIM_MasterBase_Config(hhrtim, pTimeBaseCfg); |
| } |
| else |
| { |
| /* Configure timing unit time base unit */ |
| HRTIM_TimingUnitBase_Config(hhrtim, TimerIdx, pTimeBaseCfg); |
| } |
| |
| /* Set HRTIM state */ |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @} |
| */ |
| |
| /** @defgroup HRTIM_Exported_Functions_Group2 Simple time base mode functions |
| * @brief Simple time base mode functions. |
| @verbatim |
| =============================================================================== |
| ##### Simple time base mode functions ##### |
| =============================================================================== |
| [..] This section provides functions allowing to: |
| (+) Start simple time base |
| (+) Stop simple time base |
| (+) Start simple time base and enable interrupt |
| (+) Stop simple time base and disable interrupt |
| (+) Start simple time base and enable DMA transfer |
| (+) Stop simple time base and disable DMA transfer |
| -@- When a HRTIM timer operates in simple time base mode, the timer |
| counter counts from 0 to the period value. |
| |
| @endverbatim |
| * @{ |
| */ |
| |
| /** |
| * @brief Start the counter of a timer operating in simple time base mode. |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param TimerIdx Timer index. |
| * This parameter can be one of the following values: |
| * @arg HRTIM_TIMERINDEX_MASTER for master timer |
| * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
| * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
| * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
| * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
| * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
| * @arg HRTIM_TIMERINDEX_TIMER_F for timer F |
| * @retval HAL status |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStart(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx) |
| { |
| /* Check the parameters */ |
| assert_param(IS_HRTIM_TIMERINDEX(TimerIdx)); |
| |
| /* Process Locked */ |
| __HAL_LOCK(hhrtim); |
| |
| hhrtim->State = HAL_HRTIM_STATE_BUSY; |
| |
| /* Enable the timer counter */ |
| __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
| |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @brief Stop the counter of a timer operating in simple time base mode. |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param TimerIdx Timer index. |
| * This parameter can be one of the following values: |
| * @arg HRTIM_TIMERINDEX_MASTER for master timer |
| * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
| * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
| * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
| * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
| * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
| * @arg HRTIM_TIMERINDEX_TIMER_F for timer F |
| * @retval HAL status |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStop(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx) |
| { |
| /* Check the parameters */ |
| assert_param(IS_HRTIM_TIMERINDEX(TimerIdx)); |
| |
| /* Process Locked */ |
| __HAL_LOCK(hhrtim); |
| |
| hhrtim->State = HAL_HRTIM_STATE_BUSY; |
| |
| /* Disable the timer counter */ |
| __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
| |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @brief Start the counter of a timer operating in simple time base mode |
| * (Timer repetition interrupt is enabled). |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param TimerIdx Timer index. |
| * This parameter can be one of the following values: |
| * @arg HRTIM_TIMERINDEX_MASTER for master timer |
| * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
| * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
| * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
| * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
| * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
| * @arg HRTIM_TIMERINDEX_TIMER_F for timer F |
| * @retval HAL status |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStart_IT(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx) |
| { |
| /* Check the parameters */ |
| assert_param(IS_HRTIM_TIMERINDEX(TimerIdx)); |
| |
| /* Process Locked */ |
| __HAL_LOCK(hhrtim); |
| |
| hhrtim->State = HAL_HRTIM_STATE_BUSY; |
| |
| /* Enable the repetition interrupt */ |
| if (TimerIdx == HRTIM_TIMERINDEX_MASTER) |
| { |
| __HAL_HRTIM_MASTER_ENABLE_IT(hhrtim, HRTIM_MASTER_IT_MREP); |
| } |
| else |
| { |
| __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_REP); |
| } |
| |
| /* Enable the timer counter */ |
| __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
| |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @brief Stop the counter of a timer operating in simple time base mode |
| * (Timer repetition interrupt is disabled). |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param TimerIdx Timer index. |
| * This parameter can be one of the following values: |
| * @arg HRTIM_TIMERINDEX_MASTER for master timer |
| * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
| * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
| * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
| * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
| * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
| * @arg HRTIM_TIMERINDEX_TIMER_F for timer F |
| * @retval HAL status |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStop_IT(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx) |
| { |
| /* Check the parameters */ |
| assert_param(IS_HRTIM_TIMERINDEX(TimerIdx)); |
| |
| /* Process Locked */ |
| __HAL_LOCK(hhrtim); |
| |
| hhrtim->State = HAL_HRTIM_STATE_BUSY; |
| |
| /* Disable the repetition interrupt */ |
| if (TimerIdx == HRTIM_TIMERINDEX_MASTER) |
| { |
| __HAL_HRTIM_MASTER_DISABLE_IT(hhrtim, HRTIM_MASTER_IT_MREP); |
| } |
| else |
| { |
| __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_REP); |
| } |
| |
| /* Disable the timer counter */ |
| __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
| |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @brief Start the counter of a timer operating in simple time base mode |
| * (Timer repetition DMA request is enabled). |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param TimerIdx Timer index. |
| * This parameter can be one of the following values: |
| * @arg HRTIM_TIMERINDEX_MASTER for master timer |
| * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
| * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
| * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
| * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
| * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
| * @arg HRTIM_TIMERINDEX_TIMER_F for timer F |
| * @param SrcAddr DMA transfer source address |
| * @param DestAddr DMA transfer destination address |
| * @param Length The length of data items (data size) to be transferred |
| * from source to destination |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStart_DMA(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx, |
| uint32_t SrcAddr, |
| uint32_t DestAddr, |
| uint32_t Length) |
| { |
| DMA_HandleTypeDef * hdma; |
| |
| /* Check the parameters */ |
| assert_param(IS_HRTIM_TIMERINDEX(TimerIdx)); |
| |
| if(hhrtim->State == HAL_HRTIM_STATE_BUSY) |
| { |
| return HAL_BUSY; |
| } |
| if(hhrtim->State == HAL_HRTIM_STATE_READY) |
| { |
| if((SrcAddr == 0U ) || (DestAddr == 0U ) || (Length == 0U)) |
| { |
| return HAL_ERROR; |
| } |
| else |
| { |
| hhrtim->State = HAL_HRTIM_STATE_BUSY; |
| } |
| } |
| |
| /* Process Locked */ |
| __HAL_LOCK(hhrtim); |
| |
| /* Get the timer DMA handler */ |
| hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx); |
| |
| if (hdma == NULL) |
| { |
| hhrtim->State = HAL_HRTIM_STATE_ERROR; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_ERROR; |
| } |
| |
| /* Set the DMA transfer completed callback */ |
| if (TimerIdx == HRTIM_TIMERINDEX_MASTER) |
| { |
| hdma->XferCpltCallback = HRTIM_DMAMasterCplt; |
| } |
| else |
| { |
| hdma->XferCpltCallback = HRTIM_DMATimerxCplt; |
| } |
| |
| /* Set the DMA error callback */ |
| hdma->XferErrorCallback = HRTIM_DMAError ; |
| |
| /* Enable the DMA channel */ |
| if (HAL_DMA_Start_IT(hdma, SrcAddr, DestAddr, Length) != HAL_OK) |
| { |
| hhrtim->State = HAL_HRTIM_STATE_ERROR; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_ERROR; |
| } |
| |
| /* Enable the timer repetition DMA request */ |
| if (TimerIdx == HRTIM_TIMERINDEX_MASTER) |
| { |
| __HAL_HRTIM_MASTER_ENABLE_DMA(hhrtim, HRTIM_MASTER_DMA_MREP); |
| } |
| else |
| { |
| __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_REP); |
| } |
| |
| /* Enable the timer counter */ |
| __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
| |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @brief Stop the counter of a timer operating in simple time base mode |
| * (Timer repetition DMA request is disabled). |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param TimerIdx Timer index. |
| * This parameter can be one of the following values: |
| * @arg HRTIM_TIMERINDEX_MASTER for master timer |
| * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
| * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
| * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
| * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
| * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
| * @arg HRTIM_TIMERINDEX_TIMER_F for timer F |
| * @retval HAL status |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStop_DMA(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx) |
| { |
| DMA_HandleTypeDef * hdma; |
| |
| /* Check the parameters */ |
| assert_param(IS_HRTIM_TIMERINDEX(TimerIdx)); |
| |
| /* Process Locked */ |
| __HAL_LOCK(hhrtim); |
| |
| if (TimerIdx == HRTIM_TIMERINDEX_MASTER) |
| { |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| /* Disable the DMA */ |
| if (HAL_DMA_Abort(hhrtim->hdmaMaster) != HAL_OK) |
| { |
| hhrtim->State = HAL_HRTIM_STATE_ERROR; |
| } |
| /* Disable the timer repetition DMA request */ |
| __HAL_HRTIM_MASTER_DISABLE_DMA(hhrtim, HRTIM_MASTER_DMA_MREP); |
| } |
| else |
| { |
| /* Get the timer DMA handler */ |
| hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx); |
| |
| if (hdma == NULL) |
| { |
| hhrtim->State = HAL_HRTIM_STATE_ERROR; |
| } |
| else |
| { |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| /* Disable the DMA */ |
| if (HAL_DMA_Abort(hdma) != HAL_OK) |
| { |
| hhrtim->State = HAL_HRTIM_STATE_ERROR; |
| } |
| |
| /* Disable the timer repetition DMA request */ |
| __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_REP); |
| } |
| } |
| |
| /* Disable the timer counter */ |
| __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| if (hhrtim->State == HAL_HRTIM_STATE_ERROR) |
| { |
| return HAL_ERROR; |
| } |
| else |
| { |
| return HAL_OK; |
| } |
| } |
| |
| /** |
| * @} |
| */ |
| |
| /** @defgroup HRTIM_Exported_Functions_Group3 Simple output compare mode functions |
| * @brief Simple output compare functions |
| @verbatim |
| =============================================================================== |
| ##### Simple output compare functions ##### |
| =============================================================================== |
| [..] This section provides functions allowing to: |
| (+) Configure simple output channel |
| (+) Start simple output compare |
| (+) Stop simple output compare |
| (+) Start simple output compare and enable interrupt |
| (+) Stop simple output compare and disable interrupt |
| (+) Start simple output compare and enable DMA transfer |
| (+) Stop simple output compare and disable DMA transfer |
| -@- When a HRTIM timer operates in simple output compare mode |
| the output level is set to a programmable value when a match |
| is found between the compare register and the counter. |
| Compare unit 1 is automatically associated to output 1 |
| Compare unit 2 is automatically associated to output 2 |
| @endverbatim |
| * @{ |
| */ |
| |
| /** |
| * @brief Configure an output in simple output compare mode |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param TimerIdx Timer index |
| * This parameter can be one of the following values: |
| * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
| * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
| * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
| * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
| * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
| * @arg HRTIM_TIMERINDEX_TIMER_F for timer F |
| * @param OCChannel Timer output |
| * This parameter can be one of the following values: |
| * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1 |
| * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2 |
| * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1 |
| * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2 |
| * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1 |
| * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2 |
| * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1 |
| * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2 |
| * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1 |
| * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2 |
| * @arg HRTIM_OUTPUT_TF1: Timer F - Output 1 |
| * @arg HRTIM_OUTPUT_TF2: Timer F - Output 2 |
| * @param pSimpleOCChannelCfg pointer to the simple output compare output configuration structure |
| * @note When the timer operates in simple output compare mode: |
| * Output 1 is implicitly controlled by the compare unit 1 |
| * Output 2 is implicitly controlled by the compare unit 2 |
| * Output Set/Reset crossbar is set according to the selected output compare mode: |
| * Toggle: SETxyR = RSTxyR = CMPy |
| * Active: SETxyR = CMPy, RSTxyR = 0 |
| * Inactive: SETxy =0, RSTxy = CMPy |
| * @retval HAL status |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_SimpleOCChannelConfig(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx, |
| uint32_t OCChannel, |
| HRTIM_SimpleOCChannelCfgTypeDef* pSimpleOCChannelCfg) |
| { |
| uint32_t CompareUnit = (uint32_t)RESET; |
| HRTIM_OutputCfgTypeDef OutputCfg; |
| |
| /* Check parameters */ |
| assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel)); |
| assert_param(IS_HRTIM_BASICOCMODE(pSimpleOCChannelCfg->Mode)); |
| assert_param(IS_HRTIM_OUTPUTPULSE(pSimpleOCChannelCfg->Pulse)); |
| assert_param(IS_HRTIM_OUTPUTPOLARITY(pSimpleOCChannelCfg->Polarity)); |
| assert_param(IS_HRTIM_OUTPUTIDLELEVEL(pSimpleOCChannelCfg->IdleLevel)); |
| |
| if(hhrtim->State == HAL_HRTIM_STATE_BUSY) |
| { |
| return HAL_BUSY; |
| } |
| |
| /* Set HRTIM state */ |
| hhrtim->State = HAL_HRTIM_STATE_BUSY; |
| |
| /* Configure timer compare unit */ |
| switch (OCChannel) |
| { |
| case HRTIM_OUTPUT_TA1: |
| case HRTIM_OUTPUT_TB1: |
| case HRTIM_OUTPUT_TC1: |
| case HRTIM_OUTPUT_TD1: |
| case HRTIM_OUTPUT_TE1: |
| case HRTIM_OUTPUT_TF1: |
| { |
| CompareUnit = HRTIM_COMPAREUNIT_1; |
| hhrtim->Instance->sTimerxRegs[TimerIdx].CMP1xR = pSimpleOCChannelCfg->Pulse; |
| break; |
| } |
| case HRTIM_OUTPUT_TA2: |
| case HRTIM_OUTPUT_TB2: |
| case HRTIM_OUTPUT_TC2: |
| case HRTIM_OUTPUT_TD2: |
| case HRTIM_OUTPUT_TE2: |
| case HRTIM_OUTPUT_TF2: |
| { |
| CompareUnit = HRTIM_COMPAREUNIT_2; |
| hhrtim->Instance->sTimerxRegs[TimerIdx].CMP2xR = pSimpleOCChannelCfg->Pulse; |
| break; |
| } |
| default: |
| { |
| hhrtim->State = HAL_HRTIM_STATE_ERROR; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| break; |
| } |
| } |
| |
| if(hhrtim->State == HAL_HRTIM_STATE_ERROR) |
| { |
| return HAL_ERROR; |
| } |
| |
| /* Configure timer output */ |
| OutputCfg.Polarity = (pSimpleOCChannelCfg->Polarity & HRTIM_OUTR_POL1); |
| OutputCfg.IdleLevel = (pSimpleOCChannelCfg->IdleLevel & HRTIM_OUTR_IDLES1); |
| OutputCfg.FaultLevel = HRTIM_OUTPUTFAULTLEVEL_NONE; |
| OutputCfg.IdleMode = HRTIM_OUTPUTIDLEMODE_NONE; |
| OutputCfg.ChopperModeEnable = HRTIM_OUTPUTCHOPPERMODE_DISABLED; |
| OutputCfg.BurstModeEntryDelayed = HRTIM_OUTPUTBURSTMODEENTRY_REGULAR; |
| |
| switch (pSimpleOCChannelCfg->Mode) |
| { |
| case HRTIM_BASICOCMODE_TOGGLE: |
| { |
| if (CompareUnit == HRTIM_COMPAREUNIT_1) |
| { |
| OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1; |
| } |
| else |
| { |
| OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2; |
| } |
| OutputCfg.ResetSource = OutputCfg.SetSource; |
| break; |
| } |
| |
| case HRTIM_BASICOCMODE_ACTIVE: |
| { |
| if (CompareUnit == HRTIM_COMPAREUNIT_1) |
| { |
| OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1; |
| } |
| else |
| { |
| OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2; |
| } |
| OutputCfg.ResetSource = HRTIM_OUTPUTRESET_NONE; |
| break; |
| } |
| |
| case HRTIM_BASICOCMODE_INACTIVE: |
| { |
| if (CompareUnit == HRTIM_COMPAREUNIT_1) |
| { |
| OutputCfg.ResetSource = HRTIM_OUTPUTRESET_TIMCMP1; |
| } |
| else |
| { |
| OutputCfg.ResetSource = HRTIM_OUTPUTRESET_TIMCMP2; |
| } |
| OutputCfg.SetSource = HRTIM_OUTPUTSET_NONE; |
| break; |
| } |
| |
| default: |
| { |
| hhrtim->State = HAL_HRTIM_STATE_ERROR; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| break; |
| } |
| } |
| |
| if(hhrtim->State == HAL_HRTIM_STATE_ERROR) |
| { |
| return HAL_ERROR; |
| } |
| |
| HRTIM_OutputConfig(hhrtim, |
| TimerIdx, |
| OCChannel, |
| &OutputCfg); |
| |
| /* Set HRTIM state */ |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @brief Start the output compare signal generation on the designed timer output |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param TimerIdx Timer index |
| * This parameter can be one of the following values: |
| * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
| * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
| * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
| * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
| * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
| * @arg HRTIM_TIMERINDEX_TIMER_F for timer F |
| * @param OCChannel Timer output |
| * This parameter can be one of the following values: |
| * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1 |
| * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2 |
| * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1 |
| * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2 |
| * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1 |
| * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2 |
| * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1 |
| * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2 |
| * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1 |
| * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2 |
| * @arg HRTIM_OUTPUT_TF1: Timer F - Output 1 |
| * @arg HRTIM_OUTPUT_TF2: Timer F - Output 2 |
| * @retval HAL status |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_SimpleOCStart(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx, |
| uint32_t OCChannel) |
| { |
| /* Check the parameters */ |
| assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel)); |
| |
| /* Process Locked */ |
| __HAL_LOCK(hhrtim); |
| |
| hhrtim->State = HAL_HRTIM_STATE_BUSY; |
| |
| /* Enable the timer output */ |
| hhrtim->Instance->sCommonRegs.OENR |= OCChannel; |
| |
| /* Enable the timer counter */ |
| __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
| |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @brief Stop the output compare signal generation on the designed timer output |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param TimerIdx Timer index |
| * This parameter can be one of the following values: |
| * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
| * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
| * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
| * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
| * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
| * @arg HRTIM_TIMERINDEX_TIMER_F for timer F |
| * @param OCChannel Timer output |
| * This parameter can be one of the following values: |
| * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1 |
| * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2 |
| * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1 |
| * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2 |
| * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1 |
| * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2 |
| * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1 |
| * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2 |
| * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1 |
| * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2 |
| * @arg HRTIM_OUTPUT_TF1: Timer F - Output 1 |
| * @arg HRTIM_OUTPUT_TF2: Timer F - Output 2 |
| * @retval HAL status |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_SimpleOCStop(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx, |
| uint32_t OCChannel) |
| { |
| /* Check the parameters */ |
| assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel)); |
| |
| /* Process Locked */ |
| __HAL_LOCK(hhrtim); |
| |
| hhrtim->State = HAL_HRTIM_STATE_BUSY; |
| |
| /* Disable the timer output */ |
| hhrtim->Instance->sCommonRegs.ODISR |= OCChannel; |
| |
| /* Disable the timer counter */ |
| __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
| |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @brief Start the output compare signal generation on the designed timer output |
| * (Interrupt is enabled (see note note below)). |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param TimerIdx Timer index |
| * This parameter can be one of the following values: |
| * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
| * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
| * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
| * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
| * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
| * @arg HRTIM_TIMERINDEX_TIMER_F for timer F |
| * @param OCChannel Timer output |
| * This parameter can be one of the following values: |
| * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1 |
| * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2 |
| * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1 |
| * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2 |
| * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1 |
| * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2 |
| * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1 |
| * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2 |
| * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1 |
| * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2 |
| * @arg HRTIM_OUTPUT_TF1: Timer F - Output 1 |
| * @arg HRTIM_OUTPUT_TF2: Timer F - Output 2 |
| * @note Interrupt enabling depends on the chosen output compare mode |
| * Output toggle: compare match interrupt is enabled |
| * Output set active: output set interrupt is enabled |
| * Output set inactive: output reset interrupt is enabled |
| * @retval HAL status |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_SimpleOCStart_IT(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx, |
| uint32_t OCChannel) |
| { |
| uint32_t interrupt; |
| |
| /* Check the parameters */ |
| assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel)); |
| |
| /* Process Locked */ |
| __HAL_LOCK(hhrtim); |
| |
| hhrtim->State = HAL_HRTIM_STATE_BUSY; |
| |
| /* Get the interrupt to enable (depends on the output compare mode) */ |
| interrupt = HRTIM_GetITFromOCMode(hhrtim, TimerIdx, OCChannel); |
| |
| /* Enable the timer output */ |
| hhrtim->Instance->sCommonRegs.OENR |= OCChannel; |
| |
| /* Enable the timer interrupt (depends on the output compare mode) */ |
| __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, interrupt); |
| |
| /* Enable the timer counter */ |
| __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
| |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @brief Stop the output compare signal generation on the designed timer output |
| * (Interrupt is disabled). |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param TimerIdx Timer index |
| * This parameter can be one of the following values: |
| * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
| * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
| * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
| * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
| * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
| * @arg HRTIM_TIMERINDEX_TIMER_F for timer F |
| * @param OCChannel Timer output |
| * This parameter can be one of the following values: |
| * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1 |
| * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2 |
| * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1 |
| * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2 |
| * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1 |
| * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2 |
| * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1 |
| * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2 |
| * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1 |
| * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2 |
| * @arg HRTIM_OUTPUT_TF1: Timer F - Output 1 |
| * @arg HRTIM_OUTPUT_TF2: Timer F - Output 2 |
| * @retval HAL status |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_SimpleOCStop_IT(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx, |
| uint32_t OCChannel) |
| { |
| uint32_t interrupt; |
| |
| /* Check the parameters */ |
| assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel)); |
| |
| /* Process Locked */ |
| __HAL_LOCK(hhrtim); |
| |
| hhrtim->State = HAL_HRTIM_STATE_BUSY; |
| |
| /* Disable the timer output */ |
| hhrtim->Instance->sCommonRegs.ODISR |= OCChannel; |
| |
| /* Get the interrupt to disable (depends on the output compare mode) */ |
| interrupt = HRTIM_GetITFromOCMode(hhrtim, TimerIdx, OCChannel); |
| |
| /* Disable the timer interrupt */ |
| __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, interrupt); |
| |
| /* Disable the timer counter */ |
| __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
| |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @brief Start the output compare signal generation on the designed timer output |
| * (DMA request is enabled (see note below)). |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param TimerIdx Timer index |
| * This parameter can be one of the following values: |
| * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
| * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
| * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
| * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
| * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
| * @arg HRTIM_TIMERINDEX_TIMER_F for timer F |
| * @param OCChannel Timer output |
| * This parameter can be one of the following values: |
| * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1 |
| * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2 |
| * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1 |
| * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2 |
| * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1 |
| * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2 |
| * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1 |
| * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2 |
| * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1 |
| * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2 |
| * @arg HRTIM_OUTPUT_TF1: Timer F - Output 1 |
| * @arg HRTIM_OUTPUT_TF2: Timer F - Output 2 |
| * @param SrcAddr DMA transfer source address |
| * @param DestAddr DMA transfer destination address |
| * @param Length The length of data items (data size) to be transferred |
| * from source to destination |
| * @note DMA request enabling depends on the chosen output compare mode |
| * Output toggle: compare match DMA request is enabled |
| * Output set active: output set DMA request is enabled |
| * Output set inactive: output reset DMA request is enabled |
| * @retval HAL status |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_SimpleOCStart_DMA(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx, |
| uint32_t OCChannel, |
| uint32_t SrcAddr, |
| uint32_t DestAddr, |
| uint32_t Length) |
| { |
| DMA_HandleTypeDef * hdma; |
| uint32_t dma_request; |
| |
| /* Check the parameters */ |
| assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel)); |
| |
| if((hhrtim->State == HAL_HRTIM_STATE_BUSY)) |
| { |
| return HAL_BUSY; |
| } |
| if((hhrtim->State == HAL_HRTIM_STATE_READY)) |
| { |
| if((SrcAddr == 0U ) || (DestAddr == 0U ) || (Length == 0U)) |
| { |
| return HAL_ERROR; |
| } |
| else |
| { |
| hhrtim->State = HAL_HRTIM_STATE_BUSY; |
| } |
| } |
| |
| /* Process Locked */ |
| __HAL_LOCK(hhrtim); |
| |
| /* Enable the timer output */ |
| hhrtim->Instance->sCommonRegs.OENR |= OCChannel; |
| |
| /* Get the DMA request to enable */ |
| dma_request = HRTIM_GetDMAFromOCMode(hhrtim, TimerIdx, OCChannel); |
| |
| /* Get the timer DMA handler */ |
| hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx); |
| |
| if (hdma == NULL) |
| { |
| hhrtim->State = HAL_HRTIM_STATE_ERROR; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_ERROR; |
| } |
| |
| /* Set the DMA error callback */ |
| hdma->XferErrorCallback = HRTIM_DMAError ; |
| |
| /* Set the DMA transfer completed callback */ |
| hdma->XferCpltCallback = HRTIM_DMATimerxCplt; |
| |
| /* Enable the DMA channel */ |
| if (HAL_DMA_Start_IT(hdma, SrcAddr, DestAddr, Length) != HAL_OK) |
| { |
| hhrtim->State = HAL_HRTIM_STATE_ERROR; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_ERROR; |
| } |
| |
| /* Enable the timer DMA request */ |
| __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, dma_request); |
| |
| /* Enable the timer counter */ |
| __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
| |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @brief Stop the output compare signal generation on the designed timer output |
| * (DMA request is disabled). |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param TimerIdx Timer index |
| * This parameter can be one of the following values: |
| * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
| * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
| * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
| * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
| * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
| * @arg HRTIM_TIMERINDEX_TIMER_F for timer F |
| * @param OCChannel Timer output |
| * This parameter can be one of the following values: |
| * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1 |
| * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2 |
| * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1 |
| * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2 |
| * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1 |
| * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2 |
| * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1 |
| * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2 |
| * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1 |
| * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2 |
| * @arg HRTIM_OUTPUT_TF1: Timer F - Output 1 |
| * @arg HRTIM_OUTPUT_TF2: Timer F - Output 2 |
| * @retval HAL status |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_SimpleOCStop_DMA(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx, |
| uint32_t OCChannel) |
| { |
| uint32_t dma_request; |
| |
| /* Check the parameters */ |
| assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel)); |
| |
| /* Process Locked */ |
| __HAL_LOCK(hhrtim); |
| |
| hhrtim->State = HAL_HRTIM_STATE_BUSY; |
| |
| /* Disable the timer output */ |
| hhrtim->Instance->sCommonRegs.ODISR |= OCChannel; |
| |
| /* Get the timer DMA handler */ |
| /* Disable the DMA */ |
| if (HAL_DMA_Abort(HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx)) != HAL_OK) |
| { |
| hhrtim->State = HAL_HRTIM_STATE_ERROR; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_ERROR; |
| } |
| |
| /* Get the DMA request to disable */ |
| dma_request = HRTIM_GetDMAFromOCMode(hhrtim, TimerIdx, OCChannel); |
| |
| /* Disable the timer DMA request */ |
| __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, dma_request); |
| |
| /* Disable the timer counter */ |
| __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
| |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @} |
| */ |
| |
| /** @defgroup HRTIM_Exported_Functions_Group4 Simple PWM output mode functions |
| * @brief Simple PWM output functions |
| @verbatim |
| =============================================================================== |
| ##### Simple PWM output functions ##### |
| =============================================================================== |
| [..] This section provides functions allowing to: |
| (+) Configure simple PWM output channel |
| (+) Start simple PWM output |
| (+) Stop simple PWM output |
| (+) Start simple PWM output and enable interrupt |
| (+) Stop simple PWM output and disable interrupt |
| (+) Start simple PWM output and enable DMA transfer |
| (+) Stop simple PWM output and disable DMA transfer |
| -@- When a HRTIM timer operates in simple PWM output mode |
| the output level is set to a programmable value when a match is |
| found between the compare register and the counter and reset when |
| the timer period is reached. Duty cycle is determined by the |
| comparison value. |
| Compare unit 1 is automatically associated to output 1 |
| Compare unit 2 is automatically associated to output 2 |
| @endverbatim |
| * @{ |
| */ |
| |
| /** |
| * @brief Configure an output in simple PWM mode |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param TimerIdx Timer index |
| * This parameter can be one of the following values: |
| * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
| * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
| * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
| * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
| * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
| * @arg HRTIM_TIMERINDEX_TIMER_F for timer F |
| * @param PWMChannel Timer output |
| * This parameter can be one of the following values: |
| * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1 |
| * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2 |
| * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1 |
| * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2 |
| * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1 |
| * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2 |
| * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1 |
| * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2 |
| * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1 |
| * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2 |
| * @arg HRTIM_OUTPUT_TF1: Timer F - Output 1 |
| * @arg HRTIM_OUTPUT_TF2: Timer F - Output 2 |
| * @param pSimplePWMChannelCfg pointer to the simple PWM output configuration structure |
| * @note When the timer operates in simple PWM output mode: |
| * Output 1 is implicitly controlled by the compare unit 1 |
| * Output 2 is implicitly controlled by the compare unit 2 |
| * Output Set/Reset crossbar is set as follows: |
| * Output 1: SETx1R = CMP1, RSTx1R = PER |
| * Output 2: SETx2R = CMP2, RST2R = PER |
| * @note When Simple PWM mode is used the registers preload mechanism is |
| * enabled (otherwise the behavior is not guaranteed). |
| * @retval HAL status |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_SimplePWMChannelConfig(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx, |
| uint32_t PWMChannel, |
| HRTIM_SimplePWMChannelCfgTypeDef* pSimplePWMChannelCfg) |
| { |
| HRTIM_OutputCfgTypeDef OutputCfg; |
| uint32_t hrtim_timcr; |
| |
| /* Check parameters */ |
| assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel)); |
| assert_param(IS_HRTIM_OUTPUTPOLARITY(pSimplePWMChannelCfg->Polarity)); |
| assert_param(IS_HRTIM_OUTPUTPULSE(pSimplePWMChannelCfg->Pulse)); |
| assert_param(IS_HRTIM_OUTPUTIDLELEVEL(pSimplePWMChannelCfg->IdleLevel)); |
| |
| if(hhrtim->State == HAL_HRTIM_STATE_BUSY) |
| { |
| return HAL_BUSY; |
| } |
| |
| /* Process Locked */ |
| __HAL_LOCK(hhrtim); |
| |
| hhrtim->State = HAL_HRTIM_STATE_BUSY; |
| |
| /* Configure timer compare unit */ |
| switch (PWMChannel) |
| { |
| case HRTIM_OUTPUT_TA1: |
| case HRTIM_OUTPUT_TB1: |
| case HRTIM_OUTPUT_TC1: |
| case HRTIM_OUTPUT_TD1: |
| case HRTIM_OUTPUT_TE1: |
| case HRTIM_OUTPUT_TF1: |
| { |
| hhrtim->Instance->sTimerxRegs[TimerIdx].CMP1xR = pSimplePWMChannelCfg->Pulse; |
| OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1; |
| break; |
| } |
| |
| case HRTIM_OUTPUT_TA2: |
| case HRTIM_OUTPUT_TB2: |
| case HRTIM_OUTPUT_TC2: |
| case HRTIM_OUTPUT_TD2: |
| case HRTIM_OUTPUT_TE2: |
| case HRTIM_OUTPUT_TF2: |
| { |
| hhrtim->Instance->sTimerxRegs[TimerIdx].CMP2xR = pSimplePWMChannelCfg->Pulse; |
| OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2; |
| break; |
| } |
| default: |
| { |
| hhrtim->State = HAL_HRTIM_STATE_ERROR; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| break; |
| } |
| } |
| |
| if(hhrtim->State == HAL_HRTIM_STATE_ERROR) |
| { |
| return HAL_ERROR; |
| } |
| |
| /* Configure timer output */ |
| OutputCfg.Polarity = (pSimplePWMChannelCfg->Polarity & HRTIM_OUTR_POL1); |
| OutputCfg.IdleLevel = (pSimplePWMChannelCfg->IdleLevel& HRTIM_OUTR_IDLES1); |
| OutputCfg.FaultLevel = HRTIM_OUTPUTFAULTLEVEL_NONE; |
| OutputCfg.IdleMode = HRTIM_OUTPUTIDLEMODE_NONE; |
| OutputCfg.ChopperModeEnable = HRTIM_OUTPUTCHOPPERMODE_DISABLED; |
| OutputCfg.BurstModeEntryDelayed = HRTIM_OUTPUTBURSTMODEENTRY_REGULAR; |
| OutputCfg.ResetSource = HRTIM_OUTPUTRESET_TIMPER; |
| |
| HRTIM_OutputConfig(hhrtim, |
| TimerIdx, |
| PWMChannel, |
| &OutputCfg); |
| |
| /* Enable the registers preload mechanism */ |
| hrtim_timcr = hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR; |
| hrtim_timcr |= HRTIM_TIMCR_PREEN; |
| hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR = hrtim_timcr; |
| |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @brief Start the PWM output signal generation on the designed timer output |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param TimerIdx Timer index |
| * This parameter can be one of the following values: |
| * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
| * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
| * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
| * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
| * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
| * @arg HRTIM_TIMERINDEX_TIMER_F for timer F |
| * @param PWMChannel Timer output |
| * This parameter can be one of the following values: |
| * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1 |
| * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2 |
| * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1 |
| * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2 |
| * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1 |
| * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2 |
| * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1 |
| * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2 |
| * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1 |
| * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2 |
| * @arg HRTIM_OUTPUT_TF1: Timer F - Output 1 |
| * @arg HRTIM_OUTPUT_TF2: Timer F - Output 2 |
| * @retval HAL status |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_SimplePWMStart(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx, |
| uint32_t PWMChannel) |
| { |
| /* Check the parameters */ |
| assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel)); |
| |
| /* Process Locked */ |
| __HAL_LOCK(hhrtim); |
| |
| hhrtim->State = HAL_HRTIM_STATE_BUSY; |
| |
| /* Enable the timer output */ |
| hhrtim->Instance->sCommonRegs.OENR |= PWMChannel; |
| |
| /* Enable the timer counter */ |
| __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
| |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @brief Stop the PWM output signal generation on the designed timer output |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param TimerIdx Timer index |
| * This parameter can be one of the following values: |
| * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
| * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
| * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
| * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
| * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
| * @arg HRTIM_TIMERINDEX_TIMER_F for timer F |
| * @param PWMChannel Timer output |
| * This parameter can be one of the following values: |
| * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1 |
| * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2 |
| * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1 |
| * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2 |
| * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1 |
| * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2 |
| * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1 |
| * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2 |
| * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1 |
| * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2 |
| * @arg HRTIM_OUTPUT_TF1: Timer F - Output 1 |
| * @arg HRTIM_OUTPUT_TF2: Timer F - Output 2 |
| * @retval HAL status |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_SimplePWMStop(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx, |
| uint32_t PWMChannel) |
| { |
| /* Check the parameters */ |
| assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel)); |
| |
| /* Process Locked */ |
| __HAL_LOCK(hhrtim); |
| |
| hhrtim->State = HAL_HRTIM_STATE_BUSY; |
| |
| /* Disable the timer output */ |
| hhrtim->Instance->sCommonRegs.ODISR |= PWMChannel; |
| |
| /* Disable the timer counter */ |
| __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
| |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @brief Start the PWM output signal generation on the designed timer output |
| * (The compare interrupt is enabled). |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param TimerIdx Timer index |
| * This parameter can be one of the following values: |
| * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
| * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
| * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
| * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
| * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
| * @arg HRTIM_TIMERINDEX_TIMER_F for timer F |
| * @param PWMChannel Timer output |
| * This parameter can be one of the following values: |
| * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1 |
| * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2 |
| * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1 |
| * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2 |
| * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1 |
| * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2 |
| * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1 |
| * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2 |
| * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1 |
| * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2 |
| * @arg HRTIM_OUTPUT_TF1: Timer F - Output 1 |
| * @arg HRTIM_OUTPUT_TF2: Timer F - Output 2 |
| * @retval HAL status |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_SimplePWMStart_IT(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx, |
| uint32_t PWMChannel) |
| { |
| /* Check the parameters */ |
| assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel)); |
| |
| /* Process Locked */ |
| __HAL_LOCK(hhrtim); |
| |
| hhrtim->State = HAL_HRTIM_STATE_BUSY; |
| |
| /* Enable the timer output */ |
| hhrtim->Instance->sCommonRegs.OENR |= PWMChannel; |
| |
| /* Enable the timer interrupt (depends on the PWM output) */ |
| switch (PWMChannel) |
| { |
| case HRTIM_OUTPUT_TA1: |
| case HRTIM_OUTPUT_TB1: |
| case HRTIM_OUTPUT_TC1: |
| case HRTIM_OUTPUT_TD1: |
| case HRTIM_OUTPUT_TE1: |
| case HRTIM_OUTPUT_TF1: |
| { |
| __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1); |
| break; |
| } |
| |
| case HRTIM_OUTPUT_TA2: |
| case HRTIM_OUTPUT_TB2: |
| case HRTIM_OUTPUT_TC2: |
| case HRTIM_OUTPUT_TD2: |
| case HRTIM_OUTPUT_TE2: |
| case HRTIM_OUTPUT_TF2: |
| { |
| __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2); |
| break; |
| } |
| |
| default: |
| { |
| hhrtim->State = HAL_HRTIM_STATE_ERROR; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| break; |
| } |
| } |
| |
| if(hhrtim->State == HAL_HRTIM_STATE_ERROR) |
| { |
| return HAL_ERROR; |
| } |
| |
| /* Enable the timer counter */ |
| __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
| |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @brief Stop the PWM output signal generation on the designed timer output |
| * (The compare interrupt is disabled). |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param TimerIdx Timer index |
| * This parameter can be one of the following values: |
| * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
| * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
| * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
| * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
| * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
| * @arg HRTIM_TIMERINDEX_TIMER_F for timer F |
| * @param PWMChannel Timer output |
| * This parameter can be one of the following values: |
| * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1 |
| * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2 |
| * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1 |
| * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2 |
| * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1 |
| * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2 |
| * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1 |
| * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2 |
| * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1 |
| * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2 |
| * @arg HRTIM_OUTPUT_TF1: Timer F - Output 1 |
| * @arg HRTIM_OUTPUT_TF2: Timer F - Output 2 |
| * @retval HAL status |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_SimplePWMStop_IT(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx, |
| uint32_t PWMChannel) |
| { |
| /* Check the parameters */ |
| assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel)); |
| |
| /* Process Locked */ |
| __HAL_LOCK(hhrtim); |
| |
| hhrtim->State = HAL_HRTIM_STATE_BUSY; |
| |
| /* Disable the timer output */ |
| hhrtim->Instance->sCommonRegs.ODISR |= PWMChannel; |
| |
| /* Disable the timer interrupt (depends on the PWM output) */ |
| switch (PWMChannel) |
| { |
| case HRTIM_OUTPUT_TA1: |
| case HRTIM_OUTPUT_TB1: |
| case HRTIM_OUTPUT_TC1: |
| case HRTIM_OUTPUT_TD1: |
| case HRTIM_OUTPUT_TE1: |
| case HRTIM_OUTPUT_TF1: |
| { |
| __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1); |
| break; |
| } |
| |
| case HRTIM_OUTPUT_TA2: |
| case HRTIM_OUTPUT_TB2: |
| case HRTIM_OUTPUT_TC2: |
| case HRTIM_OUTPUT_TD2: |
| case HRTIM_OUTPUT_TE2: |
| case HRTIM_OUTPUT_TF2: |
| { |
| __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2); |
| break; |
| } |
| |
| default: |
| { |
| hhrtim->State = HAL_HRTIM_STATE_ERROR; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| break; |
| } |
| } |
| |
| if(hhrtim->State == HAL_HRTIM_STATE_ERROR) |
| { |
| return HAL_ERROR; |
| } |
| |
| /* Disable the timer counter */ |
| __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
| |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @brief Start the PWM output signal generation on the designed timer output |
| * (The compare DMA request is enabled). |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param TimerIdx Timer index |
| * This parameter can be one of the following values: |
| * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
| * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
| * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
| * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
| * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
| * @arg HRTIM_TIMERINDEX_TIMER_F for timer F |
| * @param PWMChannel Timer output |
| * This parameter can be one of the following values: |
| * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1 |
| * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2 |
| * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1 |
| * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2 |
| * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1 |
| * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2 |
| * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1 |
| * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2 |
| * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1 |
| * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2 |
| * @arg HRTIM_OUTPUT_TF1: Timer F - Output 1 |
| * @arg HRTIM_OUTPUT_TF2: Timer F - Output 2 |
| * @param SrcAddr DMA transfer source address |
| * @param DestAddr DMA transfer destination address |
| * @param Length The length of data items (data size) to be transferred |
| * from source to destination |
| * @retval HAL status |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_SimplePWMStart_DMA(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx, |
| uint32_t PWMChannel, |
| uint32_t SrcAddr, |
| uint32_t DestAddr, |
| uint32_t Length) |
| { |
| DMA_HandleTypeDef * hdma; |
| |
| /* Check the parameters */ |
| assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel)); |
| |
| if((hhrtim->State == HAL_HRTIM_STATE_BUSY)) |
| { |
| return HAL_BUSY; |
| } |
| if((hhrtim->State == HAL_HRTIM_STATE_READY)) |
| { |
| if((SrcAddr == 0U ) || (DestAddr == 0U ) || (Length == 0U)) |
| { |
| return HAL_ERROR; |
| } |
| else |
| { |
| hhrtim->State = HAL_HRTIM_STATE_BUSY; |
| } |
| } |
| |
| /* Process Locked */ |
| __HAL_LOCK(hhrtim); |
| |
| /* Enable the timer output */ |
| hhrtim->Instance->sCommonRegs.OENR |= PWMChannel; |
| |
| /* Get the timer DMA handler */ |
| hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx); |
| |
| if (hdma == NULL) |
| { |
| hhrtim->State = HAL_HRTIM_STATE_ERROR; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_ERROR; |
| } |
| |
| /* Set the DMA error callback */ |
| hdma->XferErrorCallback = HRTIM_DMAError ; |
| |
| /* Set the DMA transfer completed callback */ |
| hdma->XferCpltCallback = HRTIM_DMATimerxCplt; |
| |
| /* Enable the DMA channel */ |
| if (HAL_DMA_Start_IT(hdma, SrcAddr, DestAddr, Length) != HAL_OK) |
| { |
| hhrtim->State = HAL_HRTIM_STATE_ERROR; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_ERROR; |
| } |
| |
| /* Enable the timer DMA request */ |
| switch (PWMChannel) |
| { |
| case HRTIM_OUTPUT_TA1: |
| case HRTIM_OUTPUT_TB1: |
| case HRTIM_OUTPUT_TC1: |
| case HRTIM_OUTPUT_TD1: |
| case HRTIM_OUTPUT_TE1: |
| case HRTIM_OUTPUT_TF1: |
| { |
| __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CMP1); |
| break; |
| } |
| |
| case HRTIM_OUTPUT_TA2: |
| case HRTIM_OUTPUT_TB2: |
| case HRTIM_OUTPUT_TC2: |
| case HRTIM_OUTPUT_TD2: |
| case HRTIM_OUTPUT_TE2: |
| case HRTIM_OUTPUT_TF2: |
| { |
| __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CMP2); |
| break; |
| } |
| |
| default: |
| { |
| hhrtim->State = HAL_HRTIM_STATE_ERROR; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| break; |
| } |
| } |
| |
| if(hhrtim->State == HAL_HRTIM_STATE_ERROR) |
| { |
| return HAL_ERROR; |
| } |
| |
| /* Enable the timer counter */ |
| __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
| |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @brief Stop the PWM output signal generation on the designed timer output |
| * (The compare DMA request is disabled). |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param TimerIdx Timer index |
| * This parameter can be one of the following values: |
| * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
| * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
| * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
| * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
| * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
| * @arg HRTIM_TIMERINDEX_TIMER_F for timer F |
| * @param PWMChannel Timer output |
| * This parameter can be one of the following values: |
| * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1 |
| * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2 |
| * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1 |
| * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2 |
| * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1 |
| * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2 |
| * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1 |
| * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2 |
| * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1 |
| * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2 |
| * @arg HRTIM_OUTPUT_TF1: Timer F - Output 1 |
| * @arg HRTIM_OUTPUT_TF2: Timer F - Output 2 |
| * @retval HAL status |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_SimplePWMStop_DMA(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx, |
| uint32_t PWMChannel) |
| { |
| /* Check the parameters */ |
| assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel)); |
| |
| /* Process Locked */ |
| __HAL_LOCK(hhrtim); |
| |
| hhrtim->State = HAL_HRTIM_STATE_BUSY; |
| |
| /* Disable the timer output */ |
| hhrtim->Instance->sCommonRegs.ODISR |= PWMChannel; |
| |
| /* Get the timer DMA handler */ |
| /* Disable the DMA */ |
| if (HAL_DMA_Abort(HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx)) != HAL_OK) |
| { |
| hhrtim->State = HAL_HRTIM_STATE_ERROR; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_ERROR; |
| } |
| |
| /* Disable the timer DMA request */ |
| switch (PWMChannel) |
| { |
| case HRTIM_OUTPUT_TA1: |
| case HRTIM_OUTPUT_TB1: |
| case HRTIM_OUTPUT_TC1: |
| case HRTIM_OUTPUT_TD1: |
| case HRTIM_OUTPUT_TE1: |
| case HRTIM_OUTPUT_TF1: |
| { |
| __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CMP1); |
| break; |
| } |
| |
| case HRTIM_OUTPUT_TA2: |
| case HRTIM_OUTPUT_TB2: |
| case HRTIM_OUTPUT_TC2: |
| case HRTIM_OUTPUT_TD2: |
| case HRTIM_OUTPUT_TE2: |
| case HRTIM_OUTPUT_TF2: |
| { |
| __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CMP2); |
| break; |
| } |
| |
| default: |
| { |
| hhrtim->State = HAL_HRTIM_STATE_ERROR; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| break; |
| } |
| } |
| |
| if(hhrtim->State == HAL_HRTIM_STATE_ERROR) |
| { |
| return HAL_ERROR; |
| } |
| |
| /* Disable the timer counter */ |
| __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
| |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @} |
| */ |
| |
| /** @defgroup HRTIM_Exported_Functions_Group5 Simple input capture functions |
| * @brief Simple input capture functions |
| @verbatim |
| =============================================================================== |
| ##### Simple input capture functions ##### |
| =============================================================================== |
| [..] This section provides functions allowing to: |
| (+) Configure simple input capture channel |
| (+) Start simple input capture |
| (+) Stop simple input capture |
| (+) Start simple input capture and enable interrupt |
| (+) Stop simple input capture and disable interrupt |
| (+) Start simple input capture and enable DMA transfer |
| (+) Stop simple input capture and disable DMA transfer |
| -@- When a HRTIM timer operates in simple input capture mode |
| the Capture Register (HRTIM_CPT1/2xR) is used to latch the |
| value of the timer counter counter after a transition detected |
| on a given external event input. |
| @endverbatim |
| * @{ |
| */ |
| |
| /** |
| * @brief Configure a simple capture |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param TimerIdx Timer index |
| * This parameter can be one of the following values: |
| * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
| * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
| * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
| * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
| * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
| * @arg HRTIM_TIMERINDEX_TIMER_F for timer F |
| * @param CaptureChannel Capture unit |
| * This parameter can be one of the following values: |
| * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1 |
| * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2 |
| * @param pSimpleCaptureChannelCfg pointer to the simple capture configuration structure |
| * @note When the timer operates in simple capture mode the capture is trigerred |
| * by the designated external event and GPIO input is implicitly used as event source. |
| * The cature can be triggered by a rising edge, a falling edge or both |
| * edges on event channel. |
| * @retval HAL status |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureChannelConfig(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx, |
| uint32_t CaptureChannel, |
| HRTIM_SimpleCaptureChannelCfgTypeDef* pSimpleCaptureChannelCfg) |
| { |
| HRTIM_EventCfgTypeDef EventCfg; |
| |
| /* Check parameters */ |
| assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx)); |
| assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel)); |
| assert_param(IS_HRTIM_EVENT(pSimpleCaptureChannelCfg->Event)); |
| assert_param(IS_HRTIM_EVENTPOLARITY(pSimpleCaptureChannelCfg->EventSensitivity, |
| pSimpleCaptureChannelCfg->EventPolarity)); |
| assert_param(IS_HRTIM_EVENTSENSITIVITY(pSimpleCaptureChannelCfg->EventSensitivity)); |
| assert_param(IS_HRTIM_EVENTFILTER(pSimpleCaptureChannelCfg->Event, |
| pSimpleCaptureChannelCfg->EventFilter)); |
| |
| if(hhrtim->State == HAL_HRTIM_STATE_BUSY) |
| { |
| return HAL_BUSY; |
| } |
| |
| /* Process Locked */ |
| __HAL_LOCK(hhrtim); |
| |
| hhrtim->State = HAL_HRTIM_STATE_BUSY; |
| |
| /* Configure external event channel */ |
| EventCfg.FastMode = HRTIM_EVENTFASTMODE_DISABLE; |
| EventCfg.Filter = (pSimpleCaptureChannelCfg->EventFilter & HRTIM_EECR3_EE6F); |
| EventCfg.Polarity = (pSimpleCaptureChannelCfg->EventPolarity & HRTIM_EECR1_EE1POL); |
| EventCfg.Sensitivity = (pSimpleCaptureChannelCfg->EventSensitivity & HRTIM_EECR1_EE1SNS); |
| EventCfg.Source = HRTIM_EEV1SRC_GPIO; /* source 1 for External Event */ |
| |
| HRTIM_EventConfig(hhrtim, |
| pSimpleCaptureChannelCfg->Event, |
| &EventCfg); |
| |
| /* Memorize capture trigger (will be configured when the capture is started */ |
| HRTIM_CaptureUnitConfig(hhrtim, |
| TimerIdx, |
| CaptureChannel, |
| pSimpleCaptureChannelCfg->Event); |
| |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @brief Enable a simple capture on the designed capture unit |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param TimerIdx Timer index |
| * This parameter can be one of the following values: |
| * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
| * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
| * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
| * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
| * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
| * @arg HRTIM_TIMERINDEX_TIMER_F for timer F |
| * @param CaptureChannel Timer output |
| * This parameter can be one of the following values: |
| * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1 |
| * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2 |
| * @retval HAL status |
| * @note The external event triggering the capture is available for all timing |
| * units. It can be used directly and is active as soon as the timing |
| * unit counter is enabled. |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStart(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx, |
| uint32_t CaptureChannel) |
| { |
| /* Check the parameters */ |
| assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx)); |
| assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel)); |
| |
| /* Process Locked */ |
| __HAL_LOCK(hhrtim); |
| |
| hhrtim->State = HAL_HRTIM_STATE_BUSY; |
| |
| /* Set the capture unit trigger */ |
| switch (CaptureChannel) |
| { |
| case HRTIM_CAPTUREUNIT_1: |
| { |
| hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger1; |
| break; |
| } |
| |
| case HRTIM_CAPTUREUNIT_2: |
| { |
| hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger2; |
| break; |
| } |
| |
| default: |
| { |
| hhrtim->State = HAL_HRTIM_STATE_ERROR; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| break; |
| } |
| } |
| |
| if(hhrtim->State == HAL_HRTIM_STATE_ERROR) |
| { |
| return HAL_ERROR; |
| } |
| |
| /* Enable the timer counter */ |
| __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
| |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @brief Disable a simple capture on the designed capture unit |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param TimerIdx Timer index |
| * This parameter can be one of the following values: |
| * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
| * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
| * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
| * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
| * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
| * @arg HRTIM_TIMERINDEX_TIMER_F for timer F |
| * @param CaptureChannel Timer output |
| * This parameter can be one of the following values: |
| * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1 |
| * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2 |
| * @retval HAL status |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStop(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx, |
| uint32_t CaptureChannel) |
| { |
| uint32_t hrtim_cpt1cr; |
| uint32_t hrtim_cpt2cr; |
| |
| /* Check the parameters */ |
| assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx)); |
| assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel)); |
| |
| /* Process Locked */ |
| __HAL_LOCK(hhrtim); |
| |
| hhrtim->State = HAL_HRTIM_STATE_BUSY; |
| |
| /* Set the capture unit trigger */ |
| switch (CaptureChannel) |
| { |
| case HRTIM_CAPTUREUNIT_1: |
| { |
| hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = HRTIM_CAPTURETRIGGER_NONE; |
| break; |
| } |
| |
| case HRTIM_CAPTUREUNIT_2: |
| { |
| hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = HRTIM_CAPTURETRIGGER_NONE; |
| break; |
| } |
| |
| default: |
| { |
| hhrtim->State = HAL_HRTIM_STATE_ERROR; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| break; |
| } |
| } |
| |
| if(hhrtim->State == HAL_HRTIM_STATE_ERROR) |
| { |
| return HAL_ERROR; |
| } |
| |
| hrtim_cpt1cr = hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR; |
| hrtim_cpt2cr = hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR; |
| |
| /* Disable the timer counter */ |
| if ((hrtim_cpt1cr == HRTIM_CAPTURETRIGGER_NONE) && |
| (hrtim_cpt2cr == HRTIM_CAPTURETRIGGER_NONE)) |
| { |
| __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
| } |
| |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @brief Enable a simple capture on the designed capture unit |
| * (Capture interrupt is enabled). |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param TimerIdx Timer index |
| * This parameter can be one of the following values: |
| * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
| * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
| * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
| * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
| * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
| * @arg HRTIM_TIMERINDEX_TIMER_F for timer F |
| * @param CaptureChannel Timer output |
| * This parameter can be one of the following values: |
| * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1 |
| * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2 |
| * @retval HAL status |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStart_IT(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx, |
| uint32_t CaptureChannel) |
| { |
| /* Check the parameters */ |
| assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx)); |
| assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel)); |
| |
| /* Process Locked */ |
| __HAL_LOCK(hhrtim); |
| |
| hhrtim->State = HAL_HRTIM_STATE_BUSY; |
| |
| /* Set the capture unit trigger */ |
| switch (CaptureChannel) |
| { |
| case HRTIM_CAPTUREUNIT_1: |
| { |
| hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger1; |
| |
| /* Enable the capture unit 1 interrupt */ |
| __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT1); |
| break; |
| } |
| |
| case HRTIM_CAPTUREUNIT_2: |
| { |
| hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger2; |
| |
| /* Enable the capture unit 2 interrupt */ |
| __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT2); |
| break; |
| } |
| |
| default: |
| { |
| hhrtim->State = HAL_HRTIM_STATE_ERROR; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| break; |
| } |
| } |
| |
| if(hhrtim->State == HAL_HRTIM_STATE_ERROR) |
| { |
| return HAL_ERROR; |
| } |
| |
| /* Enable the timer counter */ |
| __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
| |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @brief Disable a simple capture on the designed capture unit |
| * (Capture interrupt is disabled). |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param TimerIdx Timer index |
| * This parameter can be one of the following values: |
| * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
| * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
| * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
| * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
| * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
| * @arg HRTIM_TIMERINDEX_TIMER_F for timer F |
| * @param CaptureChannel Timer output |
| * This parameter can be one of the following values: |
| * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1 |
| * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2 |
| * @retval HAL status |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStop_IT(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx, |
| uint32_t CaptureChannel) |
| { |
| |
| uint32_t hrtim_cpt1cr; |
| uint32_t hrtim_cpt2cr; |
| |
| /* Check the parameters */ |
| assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx)); |
| assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel)); |
| |
| /* Process Locked */ |
| __HAL_LOCK(hhrtim); |
| |
| hhrtim->State = HAL_HRTIM_STATE_BUSY; |
| |
| /* Set the capture unit trigger */ |
| switch (CaptureChannel) |
| { |
| case HRTIM_CAPTUREUNIT_1: |
| { |
| hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = HRTIM_CAPTURETRIGGER_NONE; |
| |
| /* Disable the capture unit 1 interrupt */ |
| __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT1); |
| break; |
| } |
| |
| case HRTIM_CAPTUREUNIT_2: |
| { |
| hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = HRTIM_CAPTURETRIGGER_NONE; |
| |
| /* Disable the capture unit 2 interrupt */ |
| __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT2); |
| break; |
| } |
| |
| default: |
| { |
| hhrtim->State = HAL_HRTIM_STATE_ERROR; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| break; |
| } |
| } |
| |
| if(hhrtim->State == HAL_HRTIM_STATE_ERROR) |
| { |
| return HAL_ERROR; |
| } |
| |
| hrtim_cpt1cr = hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR; |
| hrtim_cpt2cr = hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR; |
| |
| /* Disable the timer counter */ |
| if ((hrtim_cpt1cr == HRTIM_CAPTURETRIGGER_NONE) && |
| (hrtim_cpt2cr == HRTIM_CAPTURETRIGGER_NONE)) |
| { |
| __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
| } |
| |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @brief Enable a simple capture on the designed capture unit |
| * (Capture DMA request is enabled). |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param TimerIdx Timer index |
| * This parameter can be one of the following values: |
| * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
| * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
| * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
| * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
| * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
| * @arg HRTIM_TIMERINDEX_TIMER_F for timer F |
| * @param CaptureChannel Timer output |
| * This parameter can be one of the following values: |
| * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1 |
| * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2 |
| * @param SrcAddr DMA transfer source address |
| * @param DestAddr DMA transfer destination address |
| * @param Length The length of data items (data size) to be transferred |
| * from source to destination |
| * @retval HAL status |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStart_DMA(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx, |
| uint32_t CaptureChannel, |
| uint32_t SrcAddr, |
| uint32_t DestAddr, |
| uint32_t Length) |
| { |
| DMA_HandleTypeDef * hdma; |
| |
| /* Check the parameters */ |
| assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx)); |
| assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel)); |
| |
| /* Process Locked */ |
| __HAL_LOCK(hhrtim); |
| |
| hhrtim->State = HAL_HRTIM_STATE_BUSY; |
| |
| /* Get the timer DMA handler */ |
| hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx); |
| |
| if (hdma == NULL) |
| { |
| hhrtim->State = HAL_HRTIM_STATE_ERROR; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_ERROR; |
| } |
| |
| /* Set the DMA error callback */ |
| hdma->XferErrorCallback = HRTIM_DMAError ; |
| |
| /* Set the DMA transfer completed callback */ |
| hdma->XferCpltCallback = HRTIM_DMATimerxCplt; |
| |
| /* Enable the DMA channel */ |
| if (HAL_DMA_Start_IT(hdma, SrcAddr, DestAddr, Length) != HAL_OK) |
| { |
| hhrtim->State = HAL_HRTIM_STATE_ERROR; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_ERROR; |
| } |
| |
| switch (CaptureChannel) |
| { |
| case HRTIM_CAPTUREUNIT_1: |
| { |
| /* Set the capture unit trigger */ |
| hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger1; |
| |
| __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CPT1); |
| break; |
| } |
| |
| case HRTIM_CAPTUREUNIT_2: |
| { |
| /* Set the capture unit trigger */ |
| hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger2; |
| |
| /* Enable the timer DMA request */ |
| __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CPT2); |
| break; |
| } |
| |
| default: |
| { |
| hhrtim->State = HAL_HRTIM_STATE_ERROR; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| break; |
| } |
| } |
| |
| if(hhrtim->State == HAL_HRTIM_STATE_ERROR) |
| { |
| return HAL_ERROR; |
| } |
| |
| /* Enable the timer counter */ |
| __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
| |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @brief Disable a simple capture on the designed capture unit |
| * (Capture DMA request is disabled). |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param TimerIdx Timer index |
| * This parameter can be one of the following values: |
| * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
| * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
| * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
| * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
| * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
| * @arg HRTIM_TIMERINDEX_TIMER_F for timer F |
| * @param CaptureChannel Timer output |
| * This parameter can be one of the following values: |
| * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1 |
| * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2 |
| * @retval HAL status |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStop_DMA(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx, |
| uint32_t CaptureChannel) |
| { |
| |
| uint32_t hrtim_cpt1cr; |
| uint32_t hrtim_cpt2cr; |
| |
| /* Check the parameters */ |
| assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx)); |
| assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel)); |
| |
| /* Process Locked */ |
| __HAL_LOCK(hhrtim); |
| |
| hhrtim->State = HAL_HRTIM_STATE_BUSY; |
| |
| /* Get the timer DMA handler */ |
| /* Disable the DMA */ |
| if (HAL_DMA_Abort(HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx)) != HAL_OK) |
| { |
| hhrtim->State = HAL_HRTIM_STATE_ERROR; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_ERROR; |
| } |
| |
| switch (CaptureChannel) |
| { |
| case HRTIM_CAPTUREUNIT_1: |
| { |
| /* Reset the capture unit trigger */ |
| hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = HRTIM_CAPTURETRIGGER_NONE; |
| |
| /* Disable the capture unit 1 DMA request */ |
| __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CPT1); |
| break; |
| } |
| |
| case HRTIM_CAPTUREUNIT_2: |
| { |
| /* Reset the capture unit trigger */ |
| hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = HRTIM_CAPTURETRIGGER_NONE; |
| |
| /* Disable the capture unit 2 DMA request */ |
| __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CPT2); |
| break; |
| } |
| |
| default: |
| { |
| hhrtim->State = HAL_HRTIM_STATE_ERROR; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| break; |
| } |
| } |
| |
| if(hhrtim->State == HAL_HRTIM_STATE_ERROR) |
| { |
| return HAL_ERROR; |
| } |
| |
| hrtim_cpt1cr = hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR; |
| hrtim_cpt2cr = hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR; |
| |
| /* Disable the timer counter */ |
| if ((hrtim_cpt1cr == HRTIM_CAPTURETRIGGER_NONE) && |
| (hrtim_cpt2cr == HRTIM_CAPTURETRIGGER_NONE)) |
| { |
| __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
| } |
| |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @} |
| */ |
| |
| /** @defgroup HRTIM_Exported_Functions_Group6 Simple one pulse functions |
| * @brief Simple one pulse functions |
| @verbatim |
| =============================================================================== |
| ##### Simple one pulse functions ##### |
| =============================================================================== |
| [..] This section provides functions allowing to: |
| (+) Configure one pulse channel |
| (+) Start one pulse generation |
| (+) Stop one pulse generation |
| (+) Start one pulse generation and enable interrupt |
| (+) Stop one pulse generation and disable interrupt |
| -@- When a HRTIM timer operates in simple one pulse mode |
| the timer counter is started in response to transition detected |
| on a given external event input to generate a pulse with a |
| programmable length after a programmable delay. |
| @endverbatim |
| * @{ |
| */ |
| |
| /** |
| * @brief Configure an output simple one pulse mode |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param TimerIdx Timer index |
| * This parameter can be one of the following values: |
| * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
| * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
| * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
| * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
| * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
| * @arg HRTIM_TIMERINDEX_TIMER_F for timer F |
| * @param OnePulseChannel Timer output |
| * This parameter can be one of the following values: |
| * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1 |
| * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2 |
| * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1 |
| * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2 |
| * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1 |
| * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2 |
| * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1 |
| * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2 |
| * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1 |
| * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2 |
| * @arg HRTIM_OUTPUT_TF1: Timer F - Output 1 |
| * @arg HRTIM_OUTPUT_TF2: Timer F - Output 2 |
| * @param pSimpleOnePulseChannelCfg pointer to the simple one pulse output configuration structure |
| * @note When the timer operates in simple one pulse mode: |
| * the timer counter is implicitly started by the reset event, |
| * the reset of the timer counter is triggered by the designated external event |
| * GPIO input is implicitly used as event source, |
| * Output 1 is implicitly controlled by the compare unit 1, |
| * Output 2 is implicitly controlled by the compare unit 2. |
| * Output Set/Reset crossbar is set as follows: |
| * Output 1: SETx1R = CMP1, RSTx1R = PER |
| * Output 2: SETx2R = CMP2, RST2R = PER |
| * @retval HAL status |
| * @note If HAL_HRTIM_SimpleOnePulseChannelConfig is called for both timer |
| * outputs, the reset event related configuration data provided in the |
| * second call will override the reset event related configuration data |
| * provided in the first call. |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseChannelConfig(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx, |
| uint32_t OnePulseChannel, |
| HRTIM_SimpleOnePulseChannelCfgTypeDef* pSimpleOnePulseChannelCfg) |
| { |
| HRTIM_OutputCfgTypeDef OutputCfg; |
| HRTIM_EventCfgTypeDef EventCfg; |
| |
| /* Check parameters */ |
| assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel)); |
| assert_param(IS_HRTIM_OUTPUTPULSE(pSimpleOnePulseChannelCfg->Pulse)); |
| assert_param(IS_HRTIM_OUTPUTPOLARITY(pSimpleOnePulseChannelCfg->OutputPolarity)); |
| assert_param(IS_HRTIM_OUTPUTIDLELEVEL(pSimpleOnePulseChannelCfg->OutputIdleLevel)); |
| assert_param(IS_HRTIM_EVENT(pSimpleOnePulseChannelCfg->Event)); |
| assert_param(IS_HRTIM_EVENTPOLARITY(pSimpleOnePulseChannelCfg->EventSensitivity, |
| pSimpleOnePulseChannelCfg->EventPolarity)); |
| assert_param(IS_HRTIM_EVENTSENSITIVITY(pSimpleOnePulseChannelCfg->EventSensitivity)); |
| assert_param(IS_HRTIM_EVENTFILTER(pSimpleOnePulseChannelCfg->Event, |
| pSimpleOnePulseChannelCfg->EventFilter)); |
| |
| if(hhrtim->State == HAL_HRTIM_STATE_BUSY) |
| { |
| return HAL_BUSY; |
| } |
| |
| /* Process Locked */ |
| __HAL_LOCK(hhrtim); |
| |
| hhrtim->State = HAL_HRTIM_STATE_BUSY; |
| |
| /* Configure timer compare unit */ |
| switch (OnePulseChannel) |
| { |
| case HRTIM_OUTPUT_TA1: |
| case HRTIM_OUTPUT_TB1: |
| case HRTIM_OUTPUT_TC1: |
| case HRTIM_OUTPUT_TD1: |
| case HRTIM_OUTPUT_TE1: |
| case HRTIM_OUTPUT_TF1: |
| { |
| hhrtim->Instance->sTimerxRegs[TimerIdx].CMP1xR = pSimpleOnePulseChannelCfg->Pulse; |
| OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1; |
| break; |
| } |
| |
| case HRTIM_OUTPUT_TA2: |
| case HRTIM_OUTPUT_TB2: |
| case HRTIM_OUTPUT_TC2: |
| case HRTIM_OUTPUT_TD2: |
| case HRTIM_OUTPUT_TE2: |
| case HRTIM_OUTPUT_TF2: |
| { |
| hhrtim->Instance->sTimerxRegs[TimerIdx].CMP2xR = pSimpleOnePulseChannelCfg->Pulse; |
| OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2; |
| break; |
| } |
| |
| default: |
| { |
| hhrtim->State = HAL_HRTIM_STATE_ERROR; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| break; |
| } |
| } |
| |
| if(hhrtim->State == HAL_HRTIM_STATE_ERROR) |
| { |
| return HAL_ERROR; |
| } |
| |
| /* Configure timer output */ |
| OutputCfg.Polarity = (pSimpleOnePulseChannelCfg->OutputPolarity & HRTIM_OUTR_POL1); |
| OutputCfg.IdleLevel = (pSimpleOnePulseChannelCfg->OutputIdleLevel & HRTIM_OUTR_IDLES1); |
| OutputCfg.FaultLevel = HRTIM_OUTPUTFAULTLEVEL_NONE; |
| OutputCfg.IdleMode = HRTIM_OUTPUTIDLEMODE_NONE; |
| OutputCfg.ChopperModeEnable = HRTIM_OUTPUTCHOPPERMODE_DISABLED; |
| OutputCfg.BurstModeEntryDelayed = HRTIM_OUTPUTBURSTMODEENTRY_REGULAR; |
| OutputCfg.ResetSource = HRTIM_OUTPUTRESET_TIMPER; |
| |
| HRTIM_OutputConfig(hhrtim, |
| TimerIdx, |
| OnePulseChannel, |
| &OutputCfg); |
| |
| /* Configure external event channel */ |
| EventCfg.FastMode = HRTIM_EVENTFASTMODE_DISABLE; |
| EventCfg.Filter = (pSimpleOnePulseChannelCfg->EventFilter & HRTIM_EECR3_EE6F); |
| EventCfg.Polarity = (pSimpleOnePulseChannelCfg->EventPolarity & HRTIM_OUTR_POL1); |
| EventCfg.Sensitivity = (pSimpleOnePulseChannelCfg->EventSensitivity &HRTIM_EECR1_EE1SNS); |
| EventCfg.Source = HRTIM_EEV1SRC_GPIO; /* source 1 for External Event */ |
| |
| HRTIM_EventConfig(hhrtim, |
| pSimpleOnePulseChannelCfg->Event, |
| &EventCfg); |
| |
| /* Configure the timer reset register */ |
| HRTIM_TIM_ResetConfig(hhrtim, |
| TimerIdx, |
| pSimpleOnePulseChannelCfg->Event); |
| |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @brief Enable the simple one pulse signal generation on the designed output |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param TimerIdx Timer index |
| * This parameter can be one of the following values: |
| * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
| * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
| * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
| * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
| * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
| * @arg HRTIM_TIMERINDEX_TIMER_F for timer F |
| * @param OnePulseChannel Timer output |
| * This parameter can be one of the following values: |
| * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1 |
| * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2 |
| * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1 |
| * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2 |
| * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1 |
| * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2 |
| * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1 |
| * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2 |
| * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1 |
| * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2 |
| * @arg HRTIM_OUTPUT_TF1: Timer F - Output 1 |
| * @arg HRTIM_OUTPUT_TF2: Timer F - Output 2 |
| * @retval HAL status |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStart(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx, |
| uint32_t OnePulseChannel) |
| { |
| /* Check the parameters */ |
| assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel)); |
| |
| /* Process Locked */ |
| __HAL_LOCK(hhrtim); |
| |
| hhrtim->State = HAL_HRTIM_STATE_BUSY; |
| |
| /* Enable the timer output */ |
| hhrtim->Instance->sCommonRegs.OENR |= OnePulseChannel; |
| |
| /* Enable the timer counter */ |
| __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
| |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @brief Disable the simple one pulse signal generation on the designed output |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param TimerIdx Timer index |
| * This parameter can be one of the following values: |
| * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
| * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
| * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
| * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
| * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
| * @arg HRTIM_TIMERINDEX_TIMER_F for timer F |
| * @param OnePulseChannel Timer output |
| * This parameter can be one of the following values: |
| * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1 |
| * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2 |
| * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1 |
| * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2 |
| * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1 |
| * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2 |
| * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1 |
| * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2 |
| * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1 |
| * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2 |
| * @arg HRTIM_OUTPUT_TF1: Timer F - Output 1 |
| * @arg HRTIM_OUTPUT_TF2: Timer F - Output 2 |
| * @retval HAL status |
| */ |
| HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStop(HRTIM_HandleTypeDef * hhrtim, |
| uint32_t TimerIdx, |
| uint32_t OnePulseChannel) |
| { |
| /* Check the parameters */ |
| assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel)); |
| |
| /* Process Locked */ |
| __HAL_LOCK(hhrtim); |
| |
| hhrtim->State = HAL_HRTIM_STATE_BUSY; |
| |
| /* Disable the timer output */ |
| hhrtim->Instance->sCommonRegs.ODISR |= OnePulseChannel; |
| |
| /* Disable the timer counter */ |
| __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
| |
| hhrtim->State = HAL_HRTIM_STATE_READY; |
| |
| /* Process Unlocked */ |
| __HAL_UNLOCK(hhrtim); |
| |
| return HAL_OK; |
| } |
| |
| /** |
| * @brief Enable the simple one pulse signal generation on the designed output |
| * (The compare interrupt is enabled (pulse start)). |
| * @param hhrtim pointer to HAL HRTIM handle |
| * @param TimerIdx Timer index |
| * This parameter can be one of the following values: |
| * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
| * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
| * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
|
