commit ca48916995af34a403107715689938e0a3063abc
author Ali Labbene <ali.labbene@st.com> Mon Mar 14 17:07:22 2022 +0100
committer Ali Labbene <ali.labbene@st.com> Mon Mar 14 17:07:22 2022 +0100
tree a781ff24df826aaa63f40556b973defcd62319b6
parent c6a2630f1b2b7e2203f8dd53150dbced82f6bbd3

[HAL][ADC] Better performance by removing multiple volatile reads or writes in interrupt handler

Src/stm32l1xx_hal_adc.c

diff --git a/Src/stm32l1xx_hal_adc.c b/Src/stm32l1xx_hal_adc.c
index de754a4..07d0755 100644
--- a/Src/stm32l1xx_hal_adc.c
+++ b/Src/stm32l1xx_hal_adc.c
@@ -1692,6 +1692,9 @@
   */
 void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
 {
+  uint32_t tmp_sr = hadc->Instance->SR;
+  uint32_t tmp_cr1 = hadc->Instance->CR1;
+
   /* Check the parameters */
   assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
   assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
@@ -1699,9 +1702,9 @@
 
   
   /* ========== Check End of Conversion flag for regular group ========== */
-  if(__HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOC))
+  if((tmp_cr1 & ADC_IT_EOC) == ADC_IT_EOC)
   {
-    if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC) )
+    if((tmp_sr & ADC_FLAG_EOC) == ADC_FLAG_EOC)
     {
       /* Update state machine on conversion status if not in error state */
       if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
@@ -1748,9 +1751,9 @@
   }
 
   /* ========== Check End of Conversion flag for injected group ========== */
-  if(__HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_JEOC))
+  if((tmp_cr1 & ADC_IT_JEOC) == ADC_IT_JEOC)
   {
-    if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOC))
+    if((tmp_sr & ADC_FLAG_JEOC) == ADC_FLAG_JEOC)
     {
       /* Update state machine on conversion status if not in error state */
       if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
@@ -1794,9 +1797,9 @@
   }
    
   /* ========== Check Analog watchdog flags ========== */
-  if(__HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD))
+  if((tmp_cr1 & ADC_IT_AWD) == ADC_IT_AWD)
   {
-    if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD))
+    if((tmp_sr & ADC_FLAG_AWD) == ADC_FLAG_AWD)
     {
       /* Set ADC state */
       SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
@@ -1813,9 +1816,9 @@
   }
   
   /* ========== Check Overrun flag ========== */
-  if(__HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_OVR))
+  if((tmp_cr1 & ADC_IT_OVR) == ADC_IT_OVR)
   {
-    if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_OVR))
+    if((tmp_sr & ADC_FLAG_OVR) == ADC_FLAG_OVR)
     {
       /* Note: On STM32L1, ADC overrun can be set through other parameters    */
       /*       refer to description of parameter "EOCSelection" for more      */