Release_Notes.html - third_party/github/STMicroelectronics/stm32l5xx_hal_driver - Git at Google

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 <h1 id="release-notes-for-stm32l5xx-hal-drivers"><small>Release Notes for</small> <strong>STM32L5xx HAL Drivers</strong></h1>
 <p>Copyright © 2019 STMicroelectronics<br />
 </p>
 <a href="https://www.st.com" class="logo"><img src="./_htmresc/st_logo.png" alt="ST logo" /></a>
 </center>
 </div>
 </div>
 <h1 id="license">License</h1>
 <p>This software component is licensed by ST under BSD 3-Clause license, the "License"; You may not use this component except in compliance with the License. You may obtain a copy of the License at:</p>
 <p><a href="https://opensource.org/licenses/BSD-3-Clause">https://opensource.org/licenses/BSD-3-Clause</a></p>
 <h1 id="purpose">Purpose</h1>
 <p>The STM32Cube HAL and LL, an STM32 abstraction layer embedded software, ensure maximized portability across STM32 portfolio.</p>
 <p>The portable APIs layer provides a generic, multi instanced and simple set of APIs to interact with the upper layer (application, libraries and stacks). It is composed of native and extended APIs set. It is directly built around a generic architecture and allows the build-upon layers, like the middleware layer, to implement its functions without knowing in-depth the used STM32 device. This improves the library code reusability and guarantees an easy portability on other devices and STM32 families.</p>
 <p>The Low Layer (LL) drivers are part of the STM32Cube firmware HAL that provides a basic set of optimized and one shot services. The Low layer drivers, contrary to the HAL ones are not fully portable across the STM32 families; the availability of some functions depends on the physical availability of the relative features on the product. The Low Layer (LL) drivers are designed to offer the following features:</p>
 <ul>
 <li>New set of inline functions for direct and atomic register access</li>
 <li>One-shot operations that can be used by the HAL drivers or from application level</li>
 <li>Full independence from HAL and standalone usage (without HAL drivers)</li>
 <li>Full features coverage of all the supported peripherals</li>
 </ul>
 </div>
 <div class="col-sm-12 col-lg-8">
 <h1 id="update-history">Update History</h1>
 <div class="collapse">
 <input type="checkbox" id="collapse-section4" checked aria-hidden="true"> <label for="collapse-section4" aria-hidden="true"><strong>V1.0.3 / 26-June-2020</strong></label>
 <div>
 <h2 id="main-changes">Main Changes</h2>
 <p><strong>Fourth release</strong></p>
 <h2 id="contents">Contents</h2>
 <p>Fourth release of <strong>HAL and Low Layer drivers</strong> for <strong>STM32L552xx/STM32L562xx</strong> devices</p>
 <p>Superset features device STM32L562xx API User Manual available (STM32L562xx_User_Manual.chm)</p>
 <h3 id="hal-drivers-updates"><strong>HAL Drivers</strong> updates</h3>
 <ul>
 <li>Global removal of ‘register’ storage class qualifier deprecated since C++ 11</li>
 <li><strong>HAL</strong> generic driver
 <ul>
 <li>Remove non-applicable HAL_DBGMCU_EnableDBGSleepMode() and HAL_DBGMCU_DisableDBGSleepMode() APIs</li>
 </ul></li>
 <li><strong>HAL CRYP</strong> driver
 <ul>
 <li>AES GSM: Support data encrypt/decrypt with length not multiple of 16 bytes</li>
 <li>AES GSM: Handling of AAD with size not multiple of 4 bytes in HAL_CRYPEx_AESGCM_GenerateAuthTAG()</li>
 </ul></li>
 <li><strong>HAL DAC</strong> driver
 <ul>
 <li>Fix timeout management for sample &amp; hold channel 2</li>
 </ul></li>
 <li><strong>HAL FLASH</strong> driver
 <ul>
 <li>Add FLASH_NB_PAGE definition in stm32l5xx_hal_flash.h</li>
 </ul></li>
 <li><strong>HAL GPIO</strong> driver
 <ul>
 <li>Fix HAL_GPIO_TogglePin() to manage several pins</li>
 </ul></li>
 <li><strong>HAL HASH</strong> driver
 <ul>
 <li>Add comments to describe case of message made of several parts, not all with length multiple of 4 bytes.</li>
 </ul></li>
 <li><strong>HAL ICACHE</strong> driver
 <ul>
 <li>HAL_ICACHE_Enable() updated to enable the instruction cache whatever any ongoing operation.</li>
 <li>HAL_ICACHE_Disable() updated to not wait for end of invalidation procedure.</li>
 <li>Add HAL_ICACHE_WaitForInvalidateComplete() API</li>
 </ul></li>
 <li><strong>HAL IWDG</strong> driver
 <ul>
 <li>HAL_IWDG_DEFAULT_TIMEOUT updated based on LSI_VALUE</li>
 </ul></li>
 <li><strong>HAL MMC</strong> driver
 <ul>
 <li>Add MMC_LOW_VOLTAGE_RANGE and eMMC_LOW_VOLTAGE_RANGE modes</li>
 <li>Add HAL_MMC_GetCardExtCSD() API</li>
 <li>Fix in HAL_MMC_ConfigWideBusOperation() to manage power class before bus width speed</li>
 </ul></li>
 <li><strong>HAL NOR</strong> driver
 <ul>
 <li>Apply adequate commands according to the command set field value (command set 1 for Micron JS28F512P33, command set 2 for Micron M29W128G and Cypress S29GL128P)</li>
 </ul></li>
 <li><strong>HAL PCD</strong> driver
 <ul>
 <li>Fix double buffer bulk out transaction</li>
 </ul></li>
 <li><strong>HAL RNG</strong> driver
 <ul>
 <li>Apply in HAL_RNG_Init() the recommended value after NIST SP 800-90B entropy validation</li>
 <li>New API HAL_RNGEx_RecoverSeedError()</li>
 <li>Add check on seed error with internal seed recovery procedure in HAL_RNG_GenerateRandomNumber()</li>
 </ul></li>
 <li><strong>HAL RCC</strong> driver
 <ul>
 <li>Fix __HAL_RCC_APB1_FORCE_RESET() and __HAL_RCC_APB1_RELEASE_RESET() macros to manage both APB1RSTR1 and APB1RSTR2 registers</li>
 </ul></li>
 <li><strong>HAL SMARTCARD</strong> driver
 <ul>
 <li>Fix NACK management</li>
 </ul></li>
 <li><strong>HAL SPI</strong> driver
 <ul>
 <li>Fix in 3-wires communication (disable and enable SPI)</li>
 <li>Fix timeout management inside SPI DMA xfer complete handler</li>
 <li>Fix to not assert on BaudRatePrescaler in Slave Motorola mode</li>
 </ul></li>
 <li><strong>HAL TIM</strong> driver
 <ul>
 <li>Fix DMA management when DMA requests are used for several channels of the same timer</li>
 <li>Fix HAL_TIM_IC_Stop_DMA() to stop DMA prior to disabling the channel</li>
 </ul></li>
 <li><strong>HAL UART</strong> driver
 <ul>
 <li>Add new reception services APIs, allowing user to handle reception of unknown/variable lengths and to get notified about received data upon events at reception buffer filling or IDLE event on Rx line:
 <ul>
 <li>HAL_UARTEx_ReceiveToIdle(): allow user to receive data until a given number of data are received or until IDLE event occurs on Rx Line. In case of IDLE event detected during reception, function returns HAL_OK and provides number of received data (available data stored in reception buffer)</li>
 <li>HAL_UARTEx_ReceiveToIdle_IT(): allow user to receive data in interrupt mode until a given number of data are received or until IDLE event occurs on Rx Line. When any of these 2 events occurs, a user callback HAL_UARTEx_RxEventCallback() is executed and reception is stopped. Callback provides number of received data (available data stored in reception buffer)</li>
 <li>HAL_UARTEx_ReceiveToIdle_DMA(): allow user to receive data in DMA mode until DMA buffer filling Half Transfer and Transfer Complete events occur or until IDLE event occurs on Rx Line. When any of these 3 events occurs, a user callback HAL_UARTEx_RxEventCallback() is executed and provides number of received data (available data stored in reception buffer). In DMA Normal mode, reception ends after either DMA Transfer Complete or IDLE event occurs. In DMA Circular mode, reception goes on after all occurrences of HAL_UARTEx_RxEventCallback() calls.</li>
 <li>User version of HAL_UARTEx_RxEventCallback() is to be implemented in user code (weak empty function defined in HAL code).</li>
 </ul></li>
 <li>Rework BRR register value computation in HAL_UART_Init() for ROM size gain</li>
 </ul></li>
 </ul>
 <h3 id="ll-drivers-updates"><strong>LL Drivers</strong> updates</h3>
 <ul>
 <li>Global removal of ‘register’ storage class qualifier deprecated since C++ 11</li>
 <li><strong>LL GPIO</strong> driver
 <ul>
 <li>Fix LL_GPIO_TogglePin() to manage several pins</li>
 </ul></li>
 <li><strong>LL PWR</strong> driver
 <ul>
 <li>Fix LL_PWR_IsEnabledUCPDDeadBattery() returned value</li>
 </ul></li>
 <li><strong>LL SYSTEM</strong> driver
 <ul>
 <li>Add LL_DBGMCU_EnableTraceClock(), LL_DBGMCU_DisableTraceClock() and LL_DBGMCU_IsEnabledTraceClock() APIs</li>
 <li>Remove non-applicable LL_DBGMCU_EnableDBGSleepMode() and LL_DBGMCU_DisableDBGSleepMode() APIs</li>
 </ul></li>
 <li><strong>LL TIM</strong> driver
 <ul>
 <li>Fix inverted LL_TIM_COUNTERMODE_CENTER_UP and LL_TIM_COUNTERMODE_CENTER_DOWN definitions</li>
 </ul></li>
 <li><strong>LL UCPD</strong> driver
 <ul>
 <li>Change default CFGR1 register values in LL_UCPD_StructInit()</li>
 </ul></li>
 </ul>
 <h2 id="notes">Notes</h2>
 <p>For HAL drivers usage, stm32l5xx_hal_conf_template.h file must be copied in user application as stm32l5xx_hal_conf.h with optional configuration update.</p>
 <p>For LL drivers usage, stm32_assert_template.h file must be copied in user application as stm32_assert.h with optional assert configuration update.</p>
 </div>
 </div>
 <div class="collapse">
 <input type="checkbox" id="collapse-section3" aria-hidden="true"> <label for="collapse-section3" aria-hidden="true"><strong>V1.0.2 / 12-February-2020</strong></label>
 <div>
 <h2 id="main-changes-1">Main Changes</h2>
 <p><strong>Third release</strong></p>
 <h2 id="contents-1">Contents</h2>
 <p>Third official release of <strong>HAL and Low Layer drivers</strong> for <strong>STM32L552xx/STM32L562xx</strong> devices</p>
 <p>Superset features device STM32L562xx API User Manual available (STM32L562xx_User_Manual.chm)</p>
 <h3 id="hal-drivers-updates-1"><strong>HAL Drivers</strong> updates</h3>
 <ul>
 <li><strong>HAL FLASH</strong> driver
 <ul>
 <li>Fix non-secure Flash access from secure Flash service to not update SAU status</li>
 <li>Fix HAL_FLASHEx_OBGetConfig() to return correct non-secure boot address 0 (OB_BOOTADDR_NS0) and non-secure boot address 1 (OB_BOOTADDR_NS1)</li>
 </ul></li>
 <li><strong>HAL MMC</strong> driver
 <ul>
 <li>Add support of sanitize and discard functions
 <ul>
 <li>new APIs HAL_MMC_Sanitize(), HAL_MMC_EraseSequence(), HAL_MMC_ConfigSecRemovalType() and HAL_MMC_GetSupportedSecRemovalType()</li>
 </ul></li>
 </ul></li>
 <li><strong>HAL PWR</strong> driver
 <ul>
 <li>Add HAL_PWREx_SMPS_GetMainRegulatorExtSMPSReadyStatus() API</li>
 </ul></li>
 <li><strong>HAL SPI</strong> driver
 <ul>
 <li>Fix HAL_SPI_Receive_DMA() and HAL_SPI_TransmitReceive_DMA() to only disable TX DMA interrupt at end of DMA reception in Master RX 2 lines mode</li>
 </ul></li>
 </ul>
 <h3 id="ll-drivers-updates-1"><strong>LL Drivers</strong> updates</h3>
 <ul>
 <li><strong>LL UTILS</strong> driver
 <ul>
 <li>Fix AHB prescaler value when requesting System Clock over 80Mhz in
 <ul>
 <li>LL_PLL_ConfigSystemClock_MSI(), LL_PLL_ConfigSystemClock_HSI() and LL_PLL_ConfigSystemClock_HSE()</li>
 </ul></li>
 </ul></li>
 </ul>
 <h2 id="notes-1">Notes</h2>
 <p>For HAL drivers usage, stm32l5xx_hal_conf_template.h file must be copied in user application as stm32l5xx_hal_conf.h with optional configuration update.</p>
 <p>For LL drivers usage, stm32_assert_template.h file must be copied in user application as stm32_assert.h with optional assert configuration update.</p>
 <h2 id="known-limitations">Known Limitations</h2>
 <ul>
 <li><strong>HAL SMARTCARD</strong> driver
 <ul>
 <li>Issue with NACK management</li>
 </ul></li>
 </ul>
 </div>
 </div>
 <div class="collapse">
 <input type="checkbox" id="collapse-section2" aria-hidden="true"> <label for="collapse-section2" aria-hidden="true"><strong>V1.0.1 / 22-January-2020</strong></label>
 <div>
 <h2 id="main-changes-2">Main Changes</h2>
 <p><strong>Second release</strong></p>
 <h2 id="contents-2">Contents</h2>
 <p>Second official release of <strong>HAL and Low Layer drivers</strong> for <strong>STM32L552xx/STM32L562xx</strong> devices</p>
 <p>Superset features device STM32L562xx API User Manual available (STM32L562xx_User_Manual.chm)</p>
 <h3 id="hal-drivers-updates-2"><strong>HAL Drivers</strong> updates</h3>
 <ul>
 <li><strong>HAL FLASH</strong> driver
 <ul>
 <li>Enhance non-secure Flash access from secure Flash
 <ul>
 <li>Add new macros for controlling non-secure flash interrupts and flags from secure:
 <ul>
 <li>__HAL_FLASH_ENABLE_IT_NS(), __HAL_FLASH_DISABLE_IT_NS(), __HAL_FLASH_GET_FLAG_NS() and __HAL_FLASH_CLEAR_FLAG_NS()</li>
 </ul></li>
 </ul></li>
 </ul></li>
 <li><strong>HAL GPIO</strong> driver
 <ul>
 <li>Update initialization sequence in HAL_GPIO_Init() to avoid glitch</li>
 </ul></li>
 <li><strong>HAL I2C</strong> driver
 <ul>
 <li>Fix sequential transfer of MAX_NBYTE_SIZE in:
 <ul>
 <li>HAL_I2C_Master_Seq_Transmit_IT(), HAL_I2C_Master_Seq_Transmit_DMA(), HAL_I2C_Master_Seq_Receive_IT() and HAL_I2C_Master_Seq_Receive_DMA(),</li>
 </ul></li>
 </ul></li>
 <li><strong>HAL SMBUS</strong> driver
 <ul>
 <li>Add SMBUS_FIRST_FRAME_WITH_PEC define to transfer options</li>
 </ul></li>
 <li><strong>HAL TIM</strong> driver
 <ul>
 <li>Fix when using multiple DMA request to different channels of same timer
 <ul>
 <li>Add new APIs HAL_TIM_GetActiveChannel(), HAL_TIM_GetChannelState() and HAL_TIMEx_GetChannelNState()</li>
 </ul></li>
 <li>Fix assert instance check in:
 <ul>
 <li>HAL_TIM_Encoder_Init(), HAL_TIM_Encoder_Start(), HAL_TIM_Encoder_Stop(), HAL_TIM_Encoder_Start_IT(), HAL_TIM_Encoder_Stop_IT(), HAL_TIM_Encoder_Start_DMA() and HAL_TIM_Encoder_Stop_DMA()</li>
 </ul></li>
 </ul></li>
 <li><strong>HAL USART</strong> driver
 <ul>
 <li>Fix SlaveMode field in USART handle after HAL_USARTEx_DisableSlaveMode() call</li>
 <li>Add receiver timeout interrupt management with new HAL_USART_ERROR_RTO error code in HAL_USART_IRQHandler()</li>
 </ul></li>
 </ul>
 <h3 id="ll-drivers-updates-2"><strong>LL Drivers</strong> updates</h3>
 <ul>
 <li><strong>LL GPIO</strong> driver
 <ul>
 <li>Update initialization sequence in LL_GPIO_Init() to avoid glitch</li>
 </ul></li>
 <li><strong>LL TIM</strong> driver
 <ul>
 <li>Add 32-bit Repetition Counter</li>
 </ul></li>
 <li><strong>LL UTILS</strong> driver
 <ul>
 <li>Add LL_SetFlashLatency() API</li>
 </ul></li>
 </ul>
 <h2 id="notes-2">Notes</h2>
 <p>For HAL drivers usage, stm32l5xx_hal_conf_template.h file must be copied in user application as stm32l5xx_hal_conf.h with optional configuration update.</p>
 <p>For LL drivers usage, stm32_assert_template.h file must be copied in user application as stm32_assert.h with optional assert configuration update.</p>
 </div>
 </div>
 <div class="collapse">
 <input type="checkbox" id="collapse-section1" aria-hidden="true"> <label for="collapse-section1" aria-hidden="true"><strong>V1.0.0 / 13-December-2019</strong></label>
 <div>
 <h2 id="main-changes-3">Main Changes</h2>
 <p><strong>First release</strong></p>
 <h2 id="contents-3">Contents</h2>
 <p>First official release of <strong>HAL and Low Layer drivers</strong> for <strong>STM32L552xx/STM32L562xx</strong> devices</p>
 <p>Superset features device STM32L562xx API User Manual available (STM32L562xx_User_Manual.chm)</p>
 <h3 id="hal-drivers">HAL Drivers</h3>
 <ul>
 <li>ADC, COMP, CORTEX, CRC, CRYP, DAC, DFSDM, DMA, EXTI, FDCAN, FLASH, GPIO, GTZC, HASH, I2C, ICACHE, IRDA, IWDG, LPTIM, MMC, NAND, NOR, OPAMP, OSPI, OTFDEC, PCD, PKA, PWR, RCC, RNG, RTC, SAI, SD, SMARTCARD, SMBUS, SPI, SRAM, TIM, TSC, UART, USART, WWDG</li>
 <li>Alternate TIM and RTC timebase templates (to be copied in user application)</li>
 </ul>
 <h3 id="ll-drivers">LL Drivers</h3>
 <ul>
 <li>ADC, BUS, COMP, CORTEX, CRC, CRS, CRYP, DAC, DMA, DMAMUX, EXTI, GPIO, I2C, IWDG, LPTIM, LPUART, OPAMP, PKA, PWR, RCC, RNG, RTC, SDMMC, SPI, SYSTEM, TIM, UCPD, USART, UTILS, WWDG</li>
 </ul>
 <h2 id="notes-3">Notes</h2>
 <p>For HAL drivers usage, stm32l5xx_hal_conf_template.h file must be copied in user application as stm32l5xx_hal_conf.h with optional configuration update.</p>
 <p>For LL drivers usage, stm32_assert_template.h file must be copied in user application as stm32_assert.h with optional assert configuration update.</p>
 </div>
 </div>
 </div>
 </div>
 <footer class="sticky">
 <p>For complete documentation on STM32L5xx, visit: [<a href="http://www.st.com/stm32l5">www.st.com/stm32l5</a>]</p>
 <em>This release note uses up to date web standards and, for this reason, should not be opened with Internet Explorer but preferably with popular browsers such as Google Chrome, Mozilla Firefox, Opera or Microsoft Edge.</em>
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	<h1 id="release-notes-for-stm32l5xx-hal-drivers"><small>Release Notes for</small> <strong>STM32L5xx HAL Drivers</strong></h1>
	<p>Copyright © 2019 STMicroelectronics<br />
	</p>
	<a href="https://www.st.com" class="logo"><img src="./_htmresc/st_logo.png" alt="ST logo" /></a>
	</center>
	</div>
	</div>
	<h1 id="license">License</h1>
	<p>This software component is licensed by ST under BSD 3-Clause license, the "License"; You may not use this component except in compliance with the License. You may obtain a copy of the License at:</p>
	<p><a href="https://opensource.org/licenses/BSD-3-Clause">https://opensource.org/licenses/BSD-3-Clause</a></p>
	<h1 id="purpose">Purpose</h1>
	<p>The STM32Cube HAL and LL, an STM32 abstraction layer embedded software, ensure maximized portability across STM32 portfolio.</p>
	<p>The portable APIs layer provides a generic, multi instanced and simple set of APIs to interact with the upper layer (application, libraries and stacks). It is composed of native and extended APIs set. It is directly built around a generic architecture and allows the build-upon layers, like the middleware layer, to implement its functions without knowing in-depth the used STM32 device. This improves the library code reusability and guarantees an easy portability on other devices and STM32 families.</p>
	<p>The Low Layer (LL) drivers are part of the STM32Cube firmware HAL that provides a basic set of optimized and one shot services. The Low layer drivers, contrary to the HAL ones are not fully portable across the STM32 families; the availability of some functions depends on the physical availability of the relative features on the product. The Low Layer (LL) drivers are designed to offer the following features:</p>
	<ul>
	<li>New set of inline functions for direct and atomic register access</li>
	<li>One-shot operations that can be used by the HAL drivers or from application level</li>
	<li>Full independence from HAL and standalone usage (without HAL drivers)</li>
	<li>Full features coverage of all the supported peripherals</li>
	</ul>
	</div>
	<div class="col-sm-12 col-lg-8">
	<h1 id="update-history">Update History</h1>
	<div class="collapse">
	<input type="checkbox" id="collapse-section4" checked aria-hidden="true"> <label for="collapse-section4" aria-hidden="true"><strong>V1.0.3 / 26-June-2020</strong></label>
	<div>
	<h2 id="main-changes">Main Changes</h2>
	<p><strong>Fourth release</strong></p>
	<h2 id="contents">Contents</h2>
	<p>Fourth release of <strong>HAL and Low Layer drivers</strong> for <strong>STM32L552xx/STM32L562xx</strong> devices</p>
	<p>Superset features device STM32L562xx API User Manual available (STM32L562xx_User_Manual.chm)</p>
	<h3 id="hal-drivers-updates"><strong>HAL Drivers</strong> updates</h3>
	<ul>
	<li>Global removal of ‘register’ storage class qualifier deprecated since C++ 11</li>
	<li><strong>HAL</strong> generic driver
	<ul>
	<li>Remove non-applicable HAL_DBGMCU_EnableDBGSleepMode() and HAL_DBGMCU_DisableDBGSleepMode() APIs</li>
	</ul></li>
	<li><strong>HAL CRYP</strong> driver
	<ul>
	<li>AES GSM: Support data encrypt/decrypt with length not multiple of 16 bytes</li>
	<li>AES GSM: Handling of AAD with size not multiple of 4 bytes in HAL_CRYPEx_AESGCM_GenerateAuthTAG()</li>
	</ul></li>
	<li><strong>HAL DAC</strong> driver
	<ul>
	<li>Fix timeout management for sample & hold channel 2</li>
	</ul></li>
	<li><strong>HAL FLASH</strong> driver
	<ul>
	<li>Add FLASH_NB_PAGE definition in stm32l5xx_hal_flash.h</li>
	</ul></li>
	<li><strong>HAL GPIO</strong> driver
	<ul>
	<li>Fix HAL_GPIO_TogglePin() to manage several pins</li>
	</ul></li>
	<li><strong>HAL HASH</strong> driver
	<ul>
	<li>Add comments to describe case of message made of several parts, not all with length multiple of 4 bytes.</li>
	</ul></li>
	<li><strong>HAL ICACHE</strong> driver
	<ul>
	<li>HAL_ICACHE_Enable() updated to enable the instruction cache whatever any ongoing operation.</li>
	<li>HAL_ICACHE_Disable() updated to not wait for end of invalidation procedure.</li>
	<li>Add HAL_ICACHE_WaitForInvalidateComplete() API</li>
	</ul></li>
	<li><strong>HAL IWDG</strong> driver
	<ul>
	<li>HAL_IWDG_DEFAULT_TIMEOUT updated based on LSI_VALUE</li>
	</ul></li>
	<li><strong>HAL MMC</strong> driver
	<ul>
	<li>Add MMC_LOW_VOLTAGE_RANGE and eMMC_LOW_VOLTAGE_RANGE modes</li>
	<li>Add HAL_MMC_GetCardExtCSD() API</li>
	<li>Fix in HAL_MMC_ConfigWideBusOperation() to manage power class before bus width speed</li>
	</ul></li>
	<li><strong>HAL NOR</strong> driver
	<ul>
	<li>Apply adequate commands according to the command set field value (command set 1 for Micron JS28F512P33, command set 2 for Micron M29W128G and Cypress S29GL128P)</li>
	</ul></li>
	<li><strong>HAL PCD</strong> driver
	<ul>
	<li>Fix double buffer bulk out transaction</li>
	</ul></li>
	<li><strong>HAL RNG</strong> driver
	<ul>
	<li>Apply in HAL_RNG_Init() the recommended value after NIST SP 800-90B entropy validation</li>
	<li>New API HAL_RNGEx_RecoverSeedError()</li>
	<li>Add check on seed error with internal seed recovery procedure in HAL_RNG_GenerateRandomNumber()</li>
	</ul></li>
	<li><strong>HAL RCC</strong> driver
	<ul>
	<li>Fix __HAL_RCC_APB1_FORCE_RESET() and __HAL_RCC_APB1_RELEASE_RESET() macros to manage both APB1RSTR1 and APB1RSTR2 registers</li>
	</ul></li>
	<li><strong>HAL SMARTCARD</strong> driver
	<ul>
	<li>Fix NACK management</li>
	</ul></li>
	<li><strong>HAL SPI</strong> driver
	<ul>
	<li>Fix in 3-wires communication (disable and enable SPI)</li>
	<li>Fix timeout management inside SPI DMA xfer complete handler</li>
	<li>Fix to not assert on BaudRatePrescaler in Slave Motorola mode</li>
	</ul></li>
	<li><strong>HAL TIM</strong> driver
	<ul>
	<li>Fix DMA management when DMA requests are used for several channels of the same timer</li>
	<li>Fix HAL_TIM_IC_Stop_DMA() to stop DMA prior to disabling the channel</li>
	</ul></li>
	<li><strong>HAL UART</strong> driver
	<ul>
	<li>Add new reception services APIs, allowing user to handle reception of unknown/variable lengths and to get notified about received data upon events at reception buffer filling or IDLE event on Rx line:
	<ul>
	<li>HAL_UARTEx_ReceiveToIdle(): allow user to receive data until a given number of data are received or until IDLE event occurs on Rx Line. In case of IDLE event detected during reception, function returns HAL_OK and provides number of received data (available data stored in reception buffer)</li>
	<li>HAL_UARTEx_ReceiveToIdle_IT(): allow user to receive data in interrupt mode until a given number of data are received or until IDLE event occurs on Rx Line. When any of these 2 events occurs, a user callback HAL_UARTEx_RxEventCallback() is executed and reception is stopped. Callback provides number of received data (available data stored in reception buffer)</li>
	<li>HAL_UARTEx_ReceiveToIdle_DMA(): allow user to receive data in DMA mode until DMA buffer filling Half Transfer and Transfer Complete events occur or until IDLE event occurs on Rx Line. When any of these 3 events occurs, a user callback HAL_UARTEx_RxEventCallback() is executed and provides number of received data (available data stored in reception buffer). In DMA Normal mode, reception ends after either DMA Transfer Complete or IDLE event occurs. In DMA Circular mode, reception goes on after all occurrences of HAL_UARTEx_RxEventCallback() calls.</li>
	<li>User version of HAL_UARTEx_RxEventCallback() is to be implemented in user code (weak empty function defined in HAL code).</li>
	</ul></li>
	<li>Rework BRR register value computation in HAL_UART_Init() for ROM size gain</li>
	</ul></li>
	</ul>
	<h3 id="ll-drivers-updates"><strong>LL Drivers</strong> updates</h3>
	<ul>
	<li>Global removal of ‘register’ storage class qualifier deprecated since C++ 11</li>
	<li><strong>LL GPIO</strong> driver
	<ul>
	<li>Fix LL_GPIO_TogglePin() to manage several pins</li>
	</ul></li>
	<li><strong>LL PWR</strong> driver
	<ul>
	<li>Fix LL_PWR_IsEnabledUCPDDeadBattery() returned value</li>
	</ul></li>
	<li><strong>LL SYSTEM</strong> driver
	<ul>
	<li>Add LL_DBGMCU_EnableTraceClock(), LL_DBGMCU_DisableTraceClock() and LL_DBGMCU_IsEnabledTraceClock() APIs</li>
	<li>Remove non-applicable LL_DBGMCU_EnableDBGSleepMode() and LL_DBGMCU_DisableDBGSleepMode() APIs</li>
	</ul></li>
	<li><strong>LL TIM</strong> driver
	<ul>
	<li>Fix inverted LL_TIM_COUNTERMODE_CENTER_UP and LL_TIM_COUNTERMODE_CENTER_DOWN definitions</li>
	</ul></li>
	<li><strong>LL UCPD</strong> driver
	<ul>
	<li>Change default CFGR1 register values in LL_UCPD_StructInit()</li>
	</ul></li>
	</ul>
	<h2 id="notes">Notes</h2>
	<p>For HAL drivers usage, stm32l5xx_hal_conf_template.h file must be copied in user application as stm32l5xx_hal_conf.h with optional configuration update.</p>
	<p>For LL drivers usage, stm32_assert_template.h file must be copied in user application as stm32_assert.h with optional assert configuration update.</p>
	</div>
	</div>
	<div class="collapse">
	<input type="checkbox" id="collapse-section3" aria-hidden="true"> <label for="collapse-section3" aria-hidden="true"><strong>V1.0.2 / 12-February-2020</strong></label>
	<div>
	<h2 id="main-changes-1">Main Changes</h2>
	<p><strong>Third release</strong></p>
	<h2 id="contents-1">Contents</h2>
	<p>Third official release of <strong>HAL and Low Layer drivers</strong> for <strong>STM32L552xx/STM32L562xx</strong> devices</p>
	<p>Superset features device STM32L562xx API User Manual available (STM32L562xx_User_Manual.chm)</p>
	<h3 id="hal-drivers-updates-1"><strong>HAL Drivers</strong> updates</h3>
	<ul>
	<li><strong>HAL FLASH</strong> driver
	<ul>
	<li>Fix non-secure Flash access from secure Flash service to not update SAU status</li>
	<li>Fix HAL_FLASHEx_OBGetConfig() to return correct non-secure boot address 0 (OB_BOOTADDR_NS0) and non-secure boot address 1 (OB_BOOTADDR_NS1)</li>
	</ul></li>
	<li><strong>HAL MMC</strong> driver
	<ul>
	<li>Add support of sanitize and discard functions
	<ul>
	<li>new APIs HAL_MMC_Sanitize(), HAL_MMC_EraseSequence(), HAL_MMC_ConfigSecRemovalType() and HAL_MMC_GetSupportedSecRemovalType()</li>
	</ul></li>
	</ul></li>
	<li><strong>HAL PWR</strong> driver
	<ul>
	<li>Add HAL_PWREx_SMPS_GetMainRegulatorExtSMPSReadyStatus() API</li>
	</ul></li>
	<li><strong>HAL SPI</strong> driver
	<ul>
	<li>Fix HAL_SPI_Receive_DMA() and HAL_SPI_TransmitReceive_DMA() to only disable TX DMA interrupt at end of DMA reception in Master RX 2 lines mode</li>
	</ul></li>
	</ul>
	<h3 id="ll-drivers-updates-1"><strong>LL Drivers</strong> updates</h3>
	<ul>
	<li><strong>LL UTILS</strong> driver
	<ul>
	<li>Fix AHB prescaler value when requesting System Clock over 80Mhz in
	<ul>
	<li>LL_PLL_ConfigSystemClock_MSI(), LL_PLL_ConfigSystemClock_HSI() and LL_PLL_ConfigSystemClock_HSE()</li>
	</ul></li>
	</ul></li>
	</ul>
	<h2 id="notes-1">Notes</h2>
	<p>For HAL drivers usage, stm32l5xx_hal_conf_template.h file must be copied in user application as stm32l5xx_hal_conf.h with optional configuration update.</p>
	<p>For LL drivers usage, stm32_assert_template.h file must be copied in user application as stm32_assert.h with optional assert configuration update.</p>
	<h2 id="known-limitations">Known Limitations</h2>
	<ul>
	<li><strong>HAL SMARTCARD</strong> driver
	<ul>
	<li>Issue with NACK management</li>
	</ul></li>
	</ul>
	</div>
	</div>
	<div class="collapse">
	<input type="checkbox" id="collapse-section2" aria-hidden="true"> <label for="collapse-section2" aria-hidden="true"><strong>V1.0.1 / 22-January-2020</strong></label>
	<div>
	<h2 id="main-changes-2">Main Changes</h2>
	<p><strong>Second release</strong></p>
	<h2 id="contents-2">Contents</h2>
	<p>Second official release of <strong>HAL and Low Layer drivers</strong> for <strong>STM32L552xx/STM32L562xx</strong> devices</p>
	<p>Superset features device STM32L562xx API User Manual available (STM32L562xx_User_Manual.chm)</p>
	<h3 id="hal-drivers-updates-2"><strong>HAL Drivers</strong> updates</h3>
	<ul>
	<li><strong>HAL FLASH</strong> driver
	<ul>
	<li>Enhance non-secure Flash access from secure Flash
	<ul>
	<li>Add new macros for controlling non-secure flash interrupts and flags from secure:
	<ul>
	<li>__HAL_FLASH_ENABLE_IT_NS(), __HAL_FLASH_DISABLE_IT_NS(), __HAL_FLASH_GET_FLAG_NS() and __HAL_FLASH_CLEAR_FLAG_NS()</li>
	</ul></li>
	</ul></li>
	</ul></li>
	<li><strong>HAL GPIO</strong> driver
	<ul>
	<li>Update initialization sequence in HAL_GPIO_Init() to avoid glitch</li>
	</ul></li>
	<li><strong>HAL I2C</strong> driver
	<ul>
	<li>Fix sequential transfer of MAX_NBYTE_SIZE in:
	<ul>
	<li>HAL_I2C_Master_Seq_Transmit_IT(), HAL_I2C_Master_Seq_Transmit_DMA(), HAL_I2C_Master_Seq_Receive_IT() and HAL_I2C_Master_Seq_Receive_DMA(),</li>
	</ul></li>
	</ul></li>
	<li><strong>HAL SMBUS</strong> driver
	<ul>
	<li>Add SMBUS_FIRST_FRAME_WITH_PEC define to transfer options</li>
	</ul></li>
	<li><strong>HAL TIM</strong> driver
	<ul>
	<li>Fix when using multiple DMA request to different channels of same timer
	<ul>
	<li>Add new APIs HAL_TIM_GetActiveChannel(), HAL_TIM_GetChannelState() and HAL_TIMEx_GetChannelNState()</li>
	</ul></li>
	<li>Fix assert instance check in:
	<ul>
	<li>HAL_TIM_Encoder_Init(), HAL_TIM_Encoder_Start(), HAL_TIM_Encoder_Stop(), HAL_TIM_Encoder_Start_IT(), HAL_TIM_Encoder_Stop_IT(), HAL_TIM_Encoder_Start_DMA() and HAL_TIM_Encoder_Stop_DMA()</li>
	</ul></li>
	</ul></li>
	<li><strong>HAL USART</strong> driver
	<ul>
	<li>Fix SlaveMode field in USART handle after HAL_USARTEx_DisableSlaveMode() call</li>
	<li>Add receiver timeout interrupt management with new HAL_USART_ERROR_RTO error code in HAL_USART_IRQHandler()</li>
	</ul></li>
	</ul>
	<h3 id="ll-drivers-updates-2"><strong>LL Drivers</strong> updates</h3>
	<ul>
	<li><strong>LL GPIO</strong> driver
	<ul>
	<li>Update initialization sequence in LL_GPIO_Init() to avoid glitch</li>
	</ul></li>
	<li><strong>LL TIM</strong> driver
	<ul>
	<li>Add 32-bit Repetition Counter</li>
	</ul></li>
	<li><strong>LL UTILS</strong> driver
	<ul>
	<li>Add LL_SetFlashLatency() API</li>
	</ul></li>
	</ul>
	<h2 id="notes-2">Notes</h2>
	<p>For HAL drivers usage, stm32l5xx_hal_conf_template.h file must be copied in user application as stm32l5xx_hal_conf.h with optional configuration update.</p>
	<p>For LL drivers usage, stm32_assert_template.h file must be copied in user application as stm32_assert.h with optional assert configuration update.</p>
	</div>
	</div>
	<div class="collapse">
	<input type="checkbox" id="collapse-section1" aria-hidden="true"> <label for="collapse-section1" aria-hidden="true"><strong>V1.0.0 / 13-December-2019</strong></label>
	<div>
	<h2 id="main-changes-3">Main Changes</h2>
	<p><strong>First release</strong></p>
	<h2 id="contents-3">Contents</h2>
	<p>First official release of <strong>HAL and Low Layer drivers</strong> for <strong>STM32L552xx/STM32L562xx</strong> devices</p>
	<p>Superset features device STM32L562xx API User Manual available (STM32L562xx_User_Manual.chm)</p>
	<h3 id="hal-drivers">HAL Drivers</h3>
	<ul>
	<li>ADC, COMP, CORTEX, CRC, CRYP, DAC, DFSDM, DMA, EXTI, FDCAN, FLASH, GPIO, GTZC, HASH, I2C, ICACHE, IRDA, IWDG, LPTIM, MMC, NAND, NOR, OPAMP, OSPI, OTFDEC, PCD, PKA, PWR, RCC, RNG, RTC, SAI, SD, SMARTCARD, SMBUS, SPI, SRAM, TIM, TSC, UART, USART, WWDG</li>
	<li>Alternate TIM and RTC timebase templates (to be copied in user application)</li>
	</ul>
	<h3 id="ll-drivers">LL Drivers</h3>
	<ul>
	<li>ADC, BUS, COMP, CORTEX, CRC, CRS, CRYP, DAC, DMA, DMAMUX, EXTI, GPIO, I2C, IWDG, LPTIM, LPUART, OPAMP, PKA, PWR, RCC, RNG, RTC, SDMMC, SPI, SYSTEM, TIM, UCPD, USART, UTILS, WWDG</li>
	</ul>
	<h2 id="notes-3">Notes</h2>
	<p>For HAL drivers usage, stm32l5xx_hal_conf_template.h file must be copied in user application as stm32l5xx_hal_conf.h with optional configuration update.</p>
	<p>For LL drivers usage, stm32_assert_template.h file must be copied in user application as stm32_assert.h with optional assert configuration update.</p>
	</div>
	</div>
	</div>
	</div>
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