[HAL][USART] Align prescaler value used by default in USART_GET_DIV_FACTOR macro with RM
diff --git a/Inc/stm32l5xx_hal_usart.h b/Inc/stm32l5xx_hal_usart.h index e614c81..e62a674 100644 --- a/Inc/stm32l5xx_hal_usart.h +++ b/Inc/stm32l5xx_hal_usart.h
@@ -704,8 +704,7 @@ ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV16) ? 16U : \ ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV32) ? 32U : \ ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV64) ? 64U : \ - ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV128) ? 128U : \ - ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV256) ? 256U : 1U) + ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV128) ? 128U : 256U) /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. * @param __PCLK__ USART clock.