| /* Copyright 2015, Kenneth MacKay. Licensed under the BSD 2-clause license. */ |
| |
| #ifndef _UECC_ASM_ARM_H_ |
| #define _UECC_ASM_ARM_H_ |
| |
| #include "asm_arm_mult_square.inc" |
| |
| #if (uECC_SUPPORTS_secp256r1 || uECC_SUPPORTS_secp256k1) |
| #define uECC_MIN_WORDS 8 |
| #endif |
| #if uECC_SUPPORTS_secp224r1 |
| #undef uECC_MIN_WORDS |
| #define uECC_MIN_WORDS 7 |
| #endif |
| #if uECC_SUPPORTS_secp192r1 |
| #undef uECC_MIN_WORDS |
| #define uECC_MIN_WORDS 6 |
| #endif |
| #if uECC_SUPPORTS_secp160r1 |
| #undef uECC_MIN_WORDS |
| #define uECC_MIN_WORDS 5 |
| #endif |
| |
| #if (uECC_PLATFORM == uECC_arm_thumb) |
| #define REG_RW "+l" |
| #define REG_WRITE "=l" |
| #else |
| #define REG_RW "+r" |
| #define REG_WRITE "=r" |
| #endif |
| |
| #if (uECC_PLATFORM == uECC_arm_thumb2) |
| #define RESUME_SYNTAX |
| #else |
| #define RESUME_SYNTAX ".syntax divided \n\t" |
| #endif |
| |
| #if (uECC_OPTIMIZATION_LEVEL >= 2) |
| |
| uECC_VLI_API uECC_word_t uECC_vli_add(uECC_word_t *result, |
| const uECC_word_t *left, |
| const uECC_word_t *right, |
| wordcount_t num_words) { |
| #if (uECC_PLATFORM == uECC_arm_thumb) || (uECC_PLATFORM == uECC_arm_thumb2) |
| uint32_t jump = ((uECC_MAX_WORDS - num_words) * 4 + 5) * 2 + 1; |
| #else /* ARM */ |
| uint32_t jump = ((uECC_MAX_WORDS - num_words) * 4 + 5) * 4; |
| #endif |
| uint32_t carry; |
| uint32_t left_word; |
| uint32_t right_word; |
| |
| __asm__ volatile ( |
| ".syntax unified \n\t" |
| "movs %[carry], #0 \n\t" |
| "mov %[left], pc \n\t" |
| "adds %[jump], %[left] \n\t" |
| |
| "ldmia %[lptr]!, {%[left]} \n\t" |
| "ldmia %[rptr]!, {%[right]} \n\t" |
| "adds %[left], %[right] \n\t" |
| "stmia %[dptr]!, {%[left]} \n\t" |
| |
| "bx %[jump] \n\t" |
| |
| "ldmia %[lptr]!, {%[left]} \n\t" |
| "ldmia %[rptr]!, {%[right]} \n\t" |
| "adcs %[left], %[right] \n\t" |
| "stmia %[dptr]!, {%[left]} \n\t" |
| |
| "ldmia %[lptr]!, {%[left]} \n\t" |
| "ldmia %[rptr]!, {%[right]} \n\t" |
| "adcs %[left], %[right] \n\t" |
| "stmia %[dptr]!, {%[left]} \n\t" |
| |
| "ldmia %[lptr]!, {%[left]} \n\t" |
| "ldmia %[rptr]!, {%[right]} \n\t" |
| "adcs %[left], %[right] \n\t" |
| "stmia %[dptr]!, {%[left]} \n\t" |
| |
| "ldmia %[lptr]!, {%[left]} \n\t" |
| "ldmia %[rptr]!, {%[right]} \n\t" |
| "adcs %[left], %[right] \n\t" |
| "stmia %[dptr]!, {%[left]} \n\t" |
| |
| #if (uECC_MAX_WORDS >= 6) |
| "ldmia %[lptr]!, {%[left]} \n\t" |
| "ldmia %[rptr]!, {%[right]} \n\t" |
| "adcs %[left], %[right] \n\t" |
| "stmia %[dptr]!, {%[left]} \n\t" |
| #endif |
| #if (uECC_MAX_WORDS >= 7) |
| "ldmia %[lptr]!, {%[left]} \n\t" |
| "ldmia %[rptr]!, {%[right]} \n\t" |
| "adcs %[left], %[right] \n\t" |
| "stmia %[dptr]!, {%[left]} \n\t" |
| #endif |
| #if (uECC_MAX_WORDS >= 8) |
| "ldmia %[lptr]!, {%[left]} \n\t" |
| "ldmia %[rptr]!, {%[right]} \n\t" |
| "adcs %[left], %[right] \n\t" |
| "stmia %[dptr]!, {%[left]} \n\t" |
| #endif |
| "adcs %[carry], %[carry] \n\t" |
| RESUME_SYNTAX |
| : [dptr] REG_RW (result), [lptr] REG_RW (left), [rptr] REG_RW (right), |
| [carry] REG_WRITE (carry), [left] REG_WRITE (left_word), [right] REG_WRITE (right_word), |
| [jump] REG_RW (jump) |
| : |
| : "cc", "memory" |
| ); |
| return carry; |
| } |
| #define asm_add 1 |
| |
| uECC_VLI_API uECC_word_t uECC_vli_sub(uECC_word_t *result, |
| const uECC_word_t *left, |
| const uECC_word_t *right, |
| wordcount_t num_words) { |
| #if (uECC_PLATFORM == uECC_arm_thumb) || (uECC_PLATFORM == uECC_arm_thumb2) |
| uint32_t jump = ((uECC_MAX_WORDS - num_words) * 4 + 5) * 2 + 1; |
| #else /* ARM */ |
| uint32_t jump = ((uECC_MAX_WORDS - num_words) * 4 + 5) * 4; |
| #endif |
| uint32_t carry; |
| uint32_t left_word; |
| uint32_t right_word; |
| |
| __asm__ volatile ( |
| ".syntax unified \n\t" |
| "movs %[carry], #0 \n\t" |
| "mov %[left], pc \n\t" |
| "adds %[jump], %[left] \n\t" |
| |
| "ldmia %[lptr]!, {%[left]} \n\t" |
| "ldmia %[rptr]!, {%[right]} \n\t" |
| "subs %[left], %[right] \n\t" |
| "stmia %[dptr]!, {%[left]} \n\t" |
| |
| "bx %[jump] \n\t" |
| |
| "ldmia %[lptr]!, {%[left]} \n\t" |
| "ldmia %[rptr]!, {%[right]} \n\t" |
| "sbcs %[left], %[right] \n\t" |
| "stmia %[dptr]!, {%[left]} \n\t" |
| |
| "ldmia %[lptr]!, {%[left]} \n\t" |
| "ldmia %[rptr]!, {%[right]} \n\t" |
| "sbcs %[left], %[right] \n\t" |
| "stmia %[dptr]!, {%[left]} \n\t" |
| |
| "ldmia %[lptr]!, {%[left]} \n\t" |
| "ldmia %[rptr]!, {%[right]} \n\t" |
| "sbcs %[left], %[right] \n\t" |
| "stmia %[dptr]!, {%[left]} \n\t" |
| |
| "ldmia %[lptr]!, {%[left]} \n\t" |
| "ldmia %[rptr]!, {%[right]} \n\t" |
| "sbcs %[left], %[right] \n\t" |
| "stmia %[dptr]!, {%[left]} \n\t" |
| |
| #if (uECC_MAX_WORDS >= 6) |
| "ldmia %[lptr]!, {%[left]} \n\t" |
| "ldmia %[rptr]!, {%[right]} \n\t" |
| "sbcs %[left], %[right] \n\t" |
| "stmia %[dptr]!, {%[left]} \n\t" |
| #endif |
| #if (uECC_MAX_WORDS >= 7) |
| "ldmia %[lptr]!, {%[left]} \n\t" |
| "ldmia %[rptr]!, {%[right]} \n\t" |
| "sbcs %[left], %[right] \n\t" |
| "stmia %[dptr]!, {%[left]} \n\t" |
| #endif |
| #if (uECC_MAX_WORDS >= 8) |
| "ldmia %[lptr]!, {%[left]} \n\t" |
| "ldmia %[rptr]!, {%[right]} \n\t" |
| "sbcs %[left], %[right] \n\t" |
| "stmia %[dptr]!, {%[left]} \n\t" |
| #endif |
| "adcs %[carry], %[carry] \n\t" |
| RESUME_SYNTAX |
| : [dptr] REG_RW (result), [lptr] REG_RW (left), [rptr] REG_RW (right), |
| [carry] REG_WRITE (carry), [left] REG_WRITE (left_word), [right] REG_WRITE (right_word), |
| [jump] REG_RW (jump) |
| : |
| : "cc", "memory" |
| ); |
| return !carry; /* Note that on ARM, carry flag set means "no borrow" when subtracting |
| (for some reason...) */ |
| } |
| #define asm_sub 1 |
| |
| #endif /* (uECC_OPTIMIZATION_LEVEL >= 2) */ |
| |
| #if (uECC_OPTIMIZATION_LEVEL >= 3) |
| |
| #define FAST_MULT_ASM_5_TO_6 \ |
| "cmp r3, #5 \n\t" \ |
| "beq 1f \n\t" \ |
| \ |
| /* r4 = left high, r5 = right high */ \ |
| "ldr r4, [r1] \n\t" \ |
| "ldr r5, [r2] \n\t" \ |
| \ |
| "sub r0, #20 \n\t" \ |
| "sub r1, #20 \n\t" \ |
| "sub r2, #20 \n\t" \ |
| \ |
| "ldr r6, [r0] \n\t" \ |
| "ldr r7, [r1], #4 \n\t" \ |
| "ldr r8, [r2], #4 \n\t" \ |
| "mov r14, #0 \n\t" \ |
| "umull r9, r10, r4, r8 \n\t" \ |
| "umull r11, r12, r5, r7 \n\t" \ |
| "adds r9, r6 \n\t" \ |
| "adc r10, #0 \n\t" \ |
| "adds r9, r11 \n\t" \ |
| "adcs r10, r12 \n\t" \ |
| "adc r14, #0 \n\t" \ |
| "str r9, [r0], #4 \n\t" \ |
| \ |
| "ldr r6, [r0] \n\t" \ |
| "adds r10, r6 \n\t" \ |
| "adcs r14, #0 \n\t" \ |
| "ldr r7, [r1], #4 \n\t" \ |
| "ldr r8, [r2], #4 \n\t" \ |
| "mov r9, #0 \n\t" \ |
| "umull r11, r12, r4, r8 \n\t" \ |
| "adds r10, r11 \n\t" \ |
| "adcs r14, r12 \n\t" \ |
| "adc r9, #0 \n\t" \ |
| "umull r11, r12, r5, r7 \n\t" \ |
| "adds r10, r11 \n\t" \ |
| "adcs r14, r12 \n\t" \ |
| "adc r9, #0 \n\t" \ |
| "str r10, [r0], #4 \n\t" \ |
| \ |
| "ldr r6, [r0] \n\t" \ |
| "adds r14, r6 \n\t" \ |
| "adcs r9, #0 \n\t" \ |
| "ldr r7, [r1], #4 \n\t" \ |
| "ldr r8, [r2], #4 \n\t" \ |
| "mov r10, #0 \n\t" \ |
| "umull r11, r12, r4, r8 \n\t" \ |
| "adds r14, r11 \n\t" \ |
| "adcs r9, r12 \n\t" \ |
| "adc r10, #0 \n\t" \ |
| "umull r11, r12, r5, r7 \n\t" \ |
| "adds r14, r11 \n\t" \ |
| "adcs r9, r12 \n\t" \ |
| "adc r10, #0 \n\t" \ |
| "str r14, [r0], #4 \n\t" \ |
| \ |
| "ldr r6, [r0] \n\t" \ |
| "adds r9, r6 \n\t" \ |
| "adcs r10, #0 \n\t" \ |
| "ldr r7, [r1], #4 \n\t" \ |
| "ldr r8, [r2], #4 \n\t" \ |
| "mov r14, #0 \n\t" \ |
| "umull r11, r12, r4, r8 \n\t" \ |
| "adds r9, r11 \n\t" \ |
| "adcs r10, r12 \n\t" \ |
| "adc r14, #0 \n\t" \ |
| "umull r11, r12, r5, r7 \n\t" \ |
| "adds r9, r11 \n\t" \ |
| "adcs r10, r12 \n\t" \ |
| "adc r14, #0 \n\t" \ |
| "str r9, [r0], #4 \n\t" \ |
| \ |
| "ldr r6, [r0] \n\t" \ |
| "adds r10, r6 \n\t" \ |
| "adcs r14, #0 \n\t" \ |
| /* skip past already-loaded (r4, r5) */ \ |
| "ldr r7, [r1], #8 \n\t" \ |
| "ldr r8, [r2], #8 \n\t" \ |
| "mov r9, #0 \n\t" \ |
| "umull r11, r12, r4, r8 \n\t" \ |
| "adds r10, r11 \n\t" \ |
| "adcs r14, r12 \n\t" \ |
| "adc r9, #0 \n\t" \ |
| "umull r11, r12, r5, r7 \n\t" \ |
| "adds r10, r11 \n\t" \ |
| "adcs r14, r12 \n\t" \ |
| "adc r9, #0 \n\t" \ |
| "str r10, [r0], #4 \n\t" \ |
| \ |
| "umull r11, r12, r4, r5 \n\t" \ |
| "adds r11, r14 \n\t" \ |
| "adc r12, r9 \n\t" \ |
| "stmia r0!, {r11, r12} \n\t" |
| |
| #define FAST_MULT_ASM_6_TO_7 \ |
| "cmp r3, #6 \n\t" \ |
| "beq 1f \n\t" \ |
| \ |
| /* r4 = left high, r5 = right high */ \ |
| "ldr r4, [r1] \n\t" \ |
| "ldr r5, [r2] \n\t" \ |
| \ |
| "sub r0, #24 \n\t" \ |
| "sub r1, #24 \n\t" \ |
| "sub r2, #24 \n\t" \ |
| \ |
| "ldr r6, [r0] \n\t" \ |
| "ldr r7, [r1], #4 \n\t" \ |
| "ldr r8, [r2], #4 \n\t" \ |
| "mov r14, #0 \n\t" \ |
| "umull r9, r10, r4, r8 \n\t" \ |
| "umull r11, r12, r5, r7 \n\t" \ |
| "adds r9, r6 \n\t" \ |
| "adc r10, #0 \n\t" \ |
| "adds r9, r11 \n\t" \ |
| "adcs r10, r12 \n\t" \ |
| "adc r14, #0 \n\t" \ |
| "str r9, [r0], #4 \n\t" \ |
| \ |
| "ldr r6, [r0] \n\t" \ |
| "adds r10, r6 \n\t" \ |
| "adcs r14, #0 \n\t" \ |
| "ldr r7, [r1], #4 \n\t" \ |
| "ldr r8, [r2], #4 \n\t" \ |
| "mov r9, #0 \n\t" \ |
| "umull r11, r12, r4, r8 \n\t" \ |
| "adds r10, r11 \n\t" \ |
| "adcs r14, r12 \n\t" \ |
| "adc r9, #0 \n\t" \ |
| "umull r11, r12, r5, r7 \n\t" \ |
| "adds r10, r11 \n\t" \ |
| "adcs r14, r12 \n\t" \ |
| "adc r9, #0 \n\t" \ |
| "str r10, [r0], #4 \n\t" \ |
| \ |
| "ldr r6, [r0] \n\t" \ |
| "adds r14, r6 \n\t" \ |
| "adcs r9, #0 \n\t" \ |
| "ldr r7, [r1], #4 \n\t" \ |
| "ldr r8, [r2], #4 \n\t" \ |
| "mov r10, #0 \n\t" \ |
| "umull r11, r12, r4, r8 \n\t" \ |
| "adds r14, r11 \n\t" \ |
| "adcs r9, r12 \n\t" \ |
| "adc r10, #0 \n\t" \ |
| "umull r11, r12, r5, r7 \n\t" \ |
| "adds r14, r11 \n\t" \ |
| "adcs r9, r12 \n\t" \ |
| "adc r10, #0 \n\t" \ |
| "str r14, [r0], #4 \n\t" \ |
| \ |
| "ldr r6, [r0] \n\t" \ |
| "adds r9, r6 \n\t" \ |
| "adcs r10, #0 \n\t" \ |
| "ldr r7, [r1], #4 \n\t" \ |
| "ldr r8, [r2], #4 \n\t" \ |
| "mov r14, #0 \n\t" \ |
| "umull r11, r12, r4, r8 \n\t" \ |
| "adds r9, r11 \n\t" \ |
| "adcs r10, r12 \n\t" \ |
| "adc r14, #0 \n\t" \ |
| "umull r11, r12, r5, r7 \n\t" \ |
| "adds r9, r11 \n\t" \ |
| "adcs r10, r12 \n\t" \ |
| "adc r14, #0 \n\t" \ |
| "str r9, [r0], #4 \n\t" \ |
| \ |
| "ldr r6, [r0] \n\t" \ |
| "adds r10, r6 \n\t" \ |
| "adcs r14, #0 \n\t" \ |
| "ldr r7, [r1], #4 \n\t" \ |
| "ldr r8, [r2], #4 \n\t" \ |
| "mov r9, #0 \n\t" \ |
| "umull r11, r12, r4, r8 \n\t" \ |
| "adds r10, r11 \n\t" \ |
| "adcs r14, r12 \n\t" \ |
| "adc r9, #0 \n\t" \ |
| "umull r11, r12, r5, r7 \n\t" \ |
| "adds r10, r11 \n\t" \ |
| "adcs r14, r12 \n\t" \ |
| "adc r9, #0 \n\t" \ |
| "str r10, [r0], #4 \n\t" \ |
| \ |
| "ldr r6, [r0] \n\t" \ |
| "adds r14, r6 \n\t" \ |
| "adcs r9, #0 \n\t" \ |
| /* skip past already-loaded (r4, r5) */ \ |
| "ldr r7, [r1], #8 \n\t" \ |
| "ldr r8, [r2], #8 \n\t" \ |
| "mov r10, #0 \n\t" \ |
| "umull r11, r12, r4, r8 \n\t" \ |
| "adds r14, r11 \n\t" \ |
| "adcs r9, r12 \n\t" \ |
| "adc r10, #0 \n\t" \ |
| "umull r11, r12, r5, r7 \n\t" \ |
| "adds r14, r11 \n\t" \ |
| "adcs r9, r12 \n\t" \ |
| "adc r10, #0 \n\t" \ |
| "str r14, [r0], #4 \n\t" \ |
| \ |
| "umull r11, r12, r4, r5 \n\t" \ |
| "adds r11, r9 \n\t" \ |
| "adc r12, r10 \n\t" \ |
| "stmia r0!, {r11, r12} \n\t" |
| |
| #define FAST_MULT_ASM_7_TO_8 \ |
| "cmp r3, #7 \n\t" \ |
| "beq 1f \n\t" \ |
| \ |
| /* r4 = left high, r5 = right high */ \ |
| "ldr r4, [r1] \n\t" \ |
| "ldr r5, [r2] \n\t" \ |
| \ |
| "sub r0, #28 \n\t" \ |
| "sub r1, #28 \n\t" \ |
| "sub r2, #28 \n\t" \ |
| \ |
| "ldr r6, [r0] \n\t" \ |
| "ldr r7, [r1], #4 \n\t" \ |
| "ldr r8, [r2], #4 \n\t" \ |
| "mov r14, #0 \n\t" \ |
| "umull r9, r10, r4, r8 \n\t" \ |
| "umull r11, r12, r5, r7 \n\t" \ |
| "adds r9, r6 \n\t" \ |
| "adc r10, #0 \n\t" \ |
| "adds r9, r11 \n\t" \ |
| "adcs r10, r12 \n\t" \ |
| "adc r14, #0 \n\t" \ |
| "str r9, [r0], #4 \n\t" \ |
| \ |
| "ldr r6, [r0] \n\t" \ |
| "adds r10, r6 \n\t" \ |
| "adcs r14, #0 \n\t" \ |
| "ldr r7, [r1], #4 \n\t" \ |
| "ldr r8, [r2], #4 \n\t" \ |
| "mov r9, #0 \n\t" \ |
| "umull r11, r12, r4, r8 \n\t" \ |
| "adds r10, r11 \n\t" \ |
| "adcs r14, r12 \n\t" \ |
| "adc r9, #0 \n\t" \ |
| "umull r11, r12, r5, r7 \n\t" \ |
| "adds r10, r11 \n\t" \ |
| "adcs r14, r12 \n\t" \ |
| "adc r9, #0 \n\t" \ |
| "str r10, [r0], #4 \n\t" \ |
| \ |
| "ldr r6, [r0] \n\t" \ |
| "adds r14, r6 \n\t" \ |
| "adcs r9, #0 \n\t" \ |
| "ldr r7, [r1], #4 \n\t" \ |
| "ldr r8, [r2], #4 \n\t" \ |
| "mov r10, #0 \n\t" \ |
| "umull r11, r12, r4, r8 \n\t" \ |
| "adds r14, r11 \n\t" \ |
| "adcs r9, r12 \n\t" \ |
| "adc r10, #0 \n\t" \ |
| "umull r11, r12, r5, r7 \n\t" \ |
| "adds r14, r11 \n\t" \ |
| "adcs r9, r12 \n\t" \ |
| "adc r10, #0 \n\t" \ |
| "str r14, [r0], #4 \n\t" \ |
| \ |
| "ldr r6, [r0] \n\t" \ |
| "adds r9, r6 \n\t" \ |
| "adcs r10, #0 \n\t" \ |
| "ldr r7, [r1], #4 \n\t" \ |
| "ldr r8, [r2], #4 \n\t" \ |
| "mov r14, #0 \n\t" \ |
| "umull r11, r12, r4, r8 \n\t" \ |
| "adds r9, r11 \n\t" \ |
| "adcs r10, r12 \n\t" \ |
| "adc r14, #0 \n\t" \ |
| "umull r11, r12, r5, r7 \n\t" \ |
| "adds r9, r11 \n\t" \ |
| "adcs r10, r12 \n\t" \ |
| "adc r14, #0 \n\t" \ |
| "str r9, [r0], #4 \n\t" \ |
| \ |
| "ldr r6, [r0] \n\t" \ |
| "adds r10, r6 \n\t" \ |
| "adcs r14, #0 \n\t" \ |
| "ldr r7, [r1], #4 \n\t" \ |
| "ldr r8, [r2], #4 \n\t" \ |
| "mov r9, #0 \n\t" \ |
| "umull r11, r12, r4, r8 \n\t" \ |
| "adds r10, r11 \n\t" \ |
| "adcs r14, r12 \n\t" \ |
| "adc r9, #0 \n\t" \ |
| "umull r11, r12, r5, r7 \n\t" \ |
| "adds r10, r11 \n\t" \ |
| "adcs r14, r12 \n\t" \ |
| "adc r9, #0 \n\t" \ |
| "str r10, [r0], #4 \n\t" \ |
| \ |
| "ldr r6, [r0] \n\t" \ |
| "adds r14, r6 \n\t" \ |
| "adcs r9, #0 \n\t" \ |
| "ldr r7, [r1], #4 \n\t" \ |
| "ldr r8, [r2], #4 \n\t" \ |
| "mov r10, #0 \n\t" \ |
| "umull r11, r12, r4, r8 \n\t" \ |
| "adds r14, r11 \n\t" \ |
| "adcs r9, r12 \n\t" \ |
| "adc r10, #0 \n\t" \ |
| "umull r11, r12, r5, r7 \n\t" \ |
| "adds r14, r11 \n\t" \ |
| "adcs r9, r12 \n\t" \ |
| "adc r10, #0 \n\t" \ |
| "str r14, [r0], #4 \n\t" \ |
| \ |
| "ldr r6, [r0] \n\t" \ |
| "adds r9, r6 \n\t" \ |
| "adcs r10, #0 \n\t" \ |
| /* skip past already-loaded (r4, r5) */ \ |
| "ldr r7, [r1], #8 \n\t" \ |
| "ldr r8, [r2], #8 \n\t" \ |
| "mov r14, #0 \n\t" \ |
| "umull r11, r12, r4, r8 \n\t" \ |
| "adds r9, r11 \n\t" \ |
| "adcs r10, r12 \n\t" \ |
| "adc r14, #0 \n\t" \ |
| "umull r11, r12, r5, r7 \n\t" \ |
| "adds r9, r11 \n\t" \ |
| "adcs r10, r12 \n\t" \ |
| "adc r14, #0 \n\t" \ |
| "str r9, [r0], #4 \n\t" \ |
| \ |
| "umull r11, r12, r4, r5 \n\t" \ |
| "adds r11, r10 \n\t" \ |
| "adc r12, r14 \n\t" \ |
| "stmia r0!, {r11, r12} \n\t" |
| |
| #if (uECC_PLATFORM != uECC_arm_thumb) |
| uECC_VLI_API void uECC_vli_mult(uint32_t *result, |
| const uint32_t *left, |
| const uint32_t *right, |
| wordcount_t num_words) { |
| register uint32_t *r0 __asm__("r0") = result; |
| register const uint32_t *r1 __asm__("r1") = left; |
| register const uint32_t *r2 __asm__("r2") = right; |
| register uint32_t r3 __asm__("r3") = num_words; |
| |
| __asm__ volatile ( |
| ".syntax unified \n\t" |
| "push {r3} \n\t" |
| |
| #if (uECC_MIN_WORDS == 5) |
| FAST_MULT_ASM_5 |
| "pop {r3} \n\t" |
| #if (uECC_MAX_WORDS > 5) |
| FAST_MULT_ASM_5_TO_6 |
| #endif |
| #if (uECC_MAX_WORDS > 6) |
| FAST_MULT_ASM_6_TO_7 |
| #endif |
| #if (uECC_MAX_WORDS > 7) |
| FAST_MULT_ASM_7_TO_8 |
| #endif |
| #elif (uECC_MIN_WORDS == 6) |
| FAST_MULT_ASM_6 |
| "pop {r3} \n\t" |
| #if (uECC_MAX_WORDS > 6) |
| FAST_MULT_ASM_6_TO_7 |
| #endif |
| #if (uECC_MAX_WORDS > 7) |
| FAST_MULT_ASM_7_TO_8 |
| #endif |
| #elif (uECC_MIN_WORDS == 7) |
| FAST_MULT_ASM_7 |
| "pop {r3} \n\t" |
| #if (uECC_MAX_WORDS > 7) |
| FAST_MULT_ASM_7_TO_8 |
| #endif |
| #elif (uECC_MIN_WORDS == 8) |
| FAST_MULT_ASM_8 |
| "pop {r3} \n\t" |
| #endif |
| |
| "1: \n\t" |
| RESUME_SYNTAX |
| : "+r" (r0), "+r" (r1), "+r" (r2) |
| : "r" (r3) |
| : "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "r14", "cc", "memory" |
| ); |
| } |
| #define asm_mult 1 |
| |
| #if uECC_SQUARE_FUNC |
| |
| #define FAST_SQUARE_ASM_5_TO_6 \ |
| "cmp r2, #5 \n\t" \ |
| "beq 1f \n\t" \ |
| \ |
| /* r3 = high */ \ |
| "ldr r3, [r1] \n\t" \ |
| \ |
| "sub r0, #20 \n\t" \ |
| "sub r1, #20 \n\t" \ |
| \ |
| /* Do off-center multiplication */ \ |
| "ldr r14, [r1], #4 \n\t" \ |
| "umull r4, r5, r3, r14 \n\t" \ |
| "ldr r14, [r1], #4 \n\t" \ |
| "umull r7, r6, r3, r14 \n\t" \ |
| "adds r5, r7 \n\t" \ |
| "ldr r14, [r1], #4 \n\t" \ |
| "umull r8, r7, r3, r14 \n\t" \ |
| "adcs r6, r8 \n\t" \ |
| "ldr r14, [r1], #4 \n\t" \ |
| "umull r9, r8, r3, r14 \n\t" \ |
| "adcs r7, r9 \n\t" \ |
| /* Skip already-loaded r3 */ \ |
| "ldr r14, [r1], #8 \n\t" \ |
| "umull r10, r9, r3, r14 \n\t" \ |
| "adcs r8, r10 \n\t" \ |
| "adcs r9, #0 \n\t" \ |
| \ |
| /* Multiply by 2 */ \ |
| "mov r10, #0 \n\t" \ |
| "adds r4, r4 \n\t" \ |
| "adcs r5, r5 \n\t" \ |
| "adcs r6, r6 \n\t" \ |
| "adcs r7, r7 \n\t" \ |
| "adcs r8, r8 \n\t" \ |
| "adcs r9, r9 \n\t" \ |
| "adcs r10, #0 \n\t" \ |
| \ |
| /* Add into previous */ \ |
| "ldr r14, [r0] \n\t" \ |
| "adds r4, r14 \n\t" \ |
| "str r4, [r0], #4 \n\t" \ |
| "ldr r14, [r0] \n\t" \ |
| "adcs r5, r14 \n\t" \ |
| "str r5, [r0], #4 \n\t" \ |
| "ldr r14, [r0] \n\t" \ |
| "adcs r6, r14 \n\t" \ |
| "str r6, [r0], #4 \n\t" \ |
| "ldr r14, [r0] \n\t" \ |
| "adcs r7, r14 \n\t" \ |
| "str r7, [r0], #4 \n\t" \ |
| "ldr r14, [r0] \n\t" \ |
| "adcs r8, r14 \n\t" \ |
| "str r8, [r0], #4 \n\t" \ |
| "adcs r9, #0 \n\t" \ |
| "adcs r10, #0 \n\t" \ |
| \ |
| /* Perform center multiplication */ \ |
| "umull r4, r5, r3, r3 \n\t" \ |
| "adds r4, r9 \n\t" \ |
| "adc r5, r10 \n\t" \ |
| "stmia r0!, {r4, r5} \n\t" |
| |
| #define FAST_SQUARE_ASM_6_TO_7 \ |
| "cmp r2, #6 \n\t" \ |
| "beq 1f \n\t" \ |
| \ |
| /* r3 = high */ \ |
| "ldr r3, [r1] \n\t" \ |
| \ |
| "sub r0, #24 \n\t" \ |
| "sub r1, #24 \n\t" \ |
| \ |
| /* Do off-center multiplication */ \ |
| "ldr r14, [r1], #4 \n\t" \ |
| "umull r4, r5, r3, r14 \n\t" \ |
| "ldr r14, [r1], #4 \n\t" \ |
| "umull r7, r6, r3, r14 \n\t" \ |
| "adds r5, r7 \n\t" \ |
| "ldr r14, [r1], #4 \n\t" \ |
| "umull r8, r7, r3, r14 \n\t" \ |
| "adcs r6, r8 \n\t" \ |
| "ldr r14, [r1], #4 \n\t" \ |
| "umull r9, r8, r3, r14 \n\t" \ |
| "adcs r7, r9 \n\t" \ |
| "ldr r14, [r1], #4 \n\t" \ |
| "umull r10, r9, r3, r14 \n\t" \ |
| "adcs r8, r10 \n\t" \ |
| /* Skip already-loaded r3 */ \ |
| "ldr r14, [r1], #8 \n\t" \ |
| "umull r11, r10, r3, r14 \n\t" \ |
| "adcs r9, r11 \n\t" \ |
| "adcs r10, #0 \n\t" \ |
| \ |
| /* Multiply by 2 */ \ |
| "mov r11, #0 \n\t" \ |
| "adds r4, r4 \n\t" \ |
| "adcs r5, r5 \n\t" \ |
| "adcs r6, r6 \n\t" \ |
| "adcs r7, r7 \n\t" \ |
| "adcs r8, r8 \n\t" \ |
| "adcs r9, r9 \n\t" \ |
| "adcs r10, r10 \n\t" \ |
| "adcs r11, #0 \n\t" \ |
| \ |
| /* Add into previous */ \ |
| "ldr r14, [r0] \n\t" \ |
| "adds r4, r14 \n\t" \ |
| "str r4, [r0], #4 \n\t" \ |
| "ldr r14, [r0] \n\t" \ |
| "adcs r5, r14 \n\t" \ |
| "str r5, [r0], #4 \n\t" \ |
| "ldr r14, [r0] \n\t" \ |
| "adcs r6, r14 \n\t" \ |
| "str r6, [r0], #4 \n\t" \ |
| "ldr r14, [r0] \n\t" \ |
| "adcs r7, r14 \n\t" \ |
| "str r7, [r0], #4 \n\t" \ |
| "ldr r14, [r0] \n\t" \ |
| "adcs r8, r14 \n\t" \ |
| "str r8, [r0], #4 \n\t" \ |
| "ldr r14, [r0] \n\t" \ |
| "adcs r9, r14 \n\t" \ |
| "str r9, [r0], #4 \n\t" \ |
| "adcs r10, #0 \n\t" \ |
| "adcs r11, #0 \n\t" \ |
| \ |
| /* Perform center multiplication */ \ |
| "umull r4, r5, r3, r3 \n\t" \ |
| "adds r4, r10 \n\t" \ |
| "adc r5, r11 \n\t" \ |
| "stmia r0!, {r4, r5} \n\t" |
| |
| #define FAST_SQUARE_ASM_7_TO_8 \ |
| "cmp r2, #7 \n\t" \ |
| "beq 1f \n\t" \ |
| \ |
| /* r3 = high */ \ |
| "ldr r3, [r1] \n\t" \ |
| \ |
| "sub r0, #28 \n\t" \ |
| "sub r1, #28 \n\t" \ |
| \ |
| /* Do off-center multiplication */ \ |
| "ldr r14, [r1], #4 \n\t" \ |
| "umull r4, r5, r3, r14 \n\t" \ |
| "ldr r14, [r1], #4 \n\t" \ |
| "umull r7, r6, r3, r14 \n\t" \ |
| "adds r5, r7 \n\t" \ |
| "ldr r14, [r1], #4 \n\t" \ |
| "umull r8, r7, r3, r14 \n\t" \ |
| "adcs r6, r8 \n\t" \ |
| "ldr r14, [r1], #4 \n\t" \ |
| "umull r9, r8, r3, r14 \n\t" \ |
| "adcs r7, r9 \n\t" \ |
| "ldr r14, [r1], #4 \n\t" \ |
| "umull r10, r9, r3, r14 \n\t" \ |
| "adcs r8, r10 \n\t" \ |
| "ldr r14, [r1], #4 \n\t" \ |
| "umull r11, r10, r3, r14 \n\t" \ |
| "adcs r9, r11 \n\t" \ |
| /* Skip already-loaded r3 */ \ |
| "ldr r14, [r1], #8 \n\t" \ |
| "umull r12, r11, r3, r14 \n\t" \ |
| "adcs r10, r12 \n\t" \ |
| "adcs r11, #0 \n\t" \ |
| \ |
| /* Multiply by 2 */ \ |
| "mov r12, #0 \n\t" \ |
| "adds r4, r4 \n\t" \ |
| "adcs r5, r5 \n\t" \ |
| "adcs r6, r6 \n\t" \ |
| "adcs r7, r7 \n\t" \ |
| "adcs r8, r8 \n\t" \ |
| "adcs r9, r9 \n\t" \ |
| "adcs r10, r10 \n\t" \ |
| "adcs r11, r11 \n\t" \ |
| "adcs r12, #0 \n\t" \ |
| \ |
| /* Add into previous */ \ |
| "ldr r14, [r0] \n\t" \ |
| "adds r4, r14 \n\t" \ |
| "str r4, [r0], #4 \n\t" \ |
| "ldr r14, [r0] \n\t" \ |
| "adcs r5, r14 \n\t" \ |
| "str r5, [r0], #4 \n\t" \ |
| "ldr r14, [r0] \n\t" \ |
| "adcs r6, r14 \n\t" \ |
| "str r6, [r0], #4 \n\t" \ |
| "ldr r14, [r0] \n\t" \ |
| "adcs r7, r14 \n\t" \ |
| "str r7, [r0], #4 \n\t" \ |
| "ldr r14, [r0] \n\t" \ |
| "adcs r8, r14 \n\t" \ |
| "str r8, [r0], #4 \n\t" \ |
| "ldr r14, [r0] \n\t" \ |
| "adcs r9, r14 \n\t" \ |
| "str r9, [r0], #4 \n\t" \ |
| "ldr r14, [r0] \n\t" \ |
| "adcs r10, r14 \n\t" \ |
| "str r10, [r0], #4 \n\t" \ |
| "adcs r11, #0 \n\t" \ |
| "adcs r12, #0 \n\t" \ |
| \ |
| /* Perform center multiplication */ \ |
| "umull r4, r5, r3, r3 \n\t" \ |
| "adds r4, r11 \n\t" \ |
| "adc r5, r12 \n\t" \ |
| "stmia r0!, {r4, r5} \n\t" |
| |
| uECC_VLI_API void uECC_vli_square(uECC_word_t *result, |
| const uECC_word_t *left, |
| wordcount_t num_words) { |
| register uint32_t *r0 __asm__("r0") = result; |
| register const uint32_t *r1 __asm__("r1") = left; |
| register uint32_t r2 __asm__("r2") = num_words; |
| |
| __asm__ volatile ( |
| ".syntax unified \n\t" |
| "push {r1, r2} \n\t" |
| |
| #if (uECC_MIN_WORDS == 5) |
| FAST_SQUARE_ASM_5 |
| "pop {r1, r2} \n\t" |
| #if (uECC_MAX_WORDS > 5) |
| "add r1, #20 \n\t" |
| FAST_SQUARE_ASM_5_TO_6 |
| #endif |
| #if (uECC_MAX_WORDS > 6) |
| FAST_SQUARE_ASM_6_TO_7 |
| #endif |
| #if (uECC_MAX_WORDS > 7) |
| FAST_SQUARE_ASM_7_TO_8 |
| #endif |
| #elif (uECC_MIN_WORDS == 6) |
| FAST_SQUARE_ASM_6 |
| "pop {r1, r2} \n\t" |
| #if (uECC_MAX_WORDS > 6) |
| "add r1, #24 \n\t" |
| FAST_SQUARE_ASM_6_TO_7 |
| #endif |
| #if (uECC_MAX_WORDS > 7) |
| FAST_SQUARE_ASM_7_TO_8 |
| #endif |
| #elif (uECC_MIN_WORDS == 7) |
| FAST_SQUARE_ASM_7 |
| "pop {r1, r2} \n\t" |
| #if (uECC_MAX_WORDS > 7) |
| "add r1, #28 \n\t" |
| FAST_SQUARE_ASM_7_TO_8 |
| #endif |
| #elif (uECC_MIN_WORDS == 8) |
| FAST_SQUARE_ASM_8 |
| "pop {r1, r2} \n\t" |
| #endif |
| |
| "1: \n\t" |
| RESUME_SYNTAX |
| : "+r" (r0), "+r" (r1) |
| : "r" (r2) |
| : "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "r14", "cc", "memory" |
| ); |
| } |
| #define asm_square 1 |
| #endif /* uECC_SQUARE_FUNC */ |
| |
| #endif /* uECC_PLATFORM != uECC_arm_thumb */ |
| |
| #endif /* (uECC_OPTIMIZATION_LEVEL >= 3) */ |
| |
| /* ---- "Small" implementations ---- */ |
| |
| #if !asm_add |
| uECC_VLI_API uECC_word_t uECC_vli_add(uECC_word_t *result, |
| const uECC_word_t *left, |
| const uECC_word_t *right, |
| wordcount_t num_words) { |
| uint32_t carry = 0; |
| uint32_t left_word; |
| uint32_t right_word; |
| |
| __asm__ volatile ( |
| ".syntax unified \n\t" |
| "1: \n\t" |
| "ldmia %[lptr]!, {%[left]} \n\t" /* Load left word. */ |
| "ldmia %[rptr]!, {%[right]} \n\t" /* Load right word. */ |
| "lsrs %[carry], #1 \n\t" /* Set up carry flag (carry = 0 after this). */ |
| "adcs %[left], %[right] \n\t" /* Add with carry. */ |
| "adcs %[carry], %[carry] \n\t" /* Store carry bit. */ |
| "stmia %[dptr]!, {%[left]} \n\t" /* Store result word. */ |
| "subs %[ctr], #1 \n\t" /* Decrement counter. */ |
| "bne 1b \n\t" /* Loop until counter == 0. */ |
| RESUME_SYNTAX |
| : [dptr] REG_RW (result), [lptr] REG_RW (left), [rptr] REG_RW (right), |
| [ctr] REG_RW (num_words), [carry] REG_RW (carry), |
| [left] REG_WRITE (left_word), [right] REG_WRITE (right_word) |
| : |
| : "cc", "memory" |
| ); |
| return carry; |
| } |
| #define asm_add 1 |
| #endif |
| |
| #if !asm_sub |
| uECC_VLI_API uECC_word_t uECC_vli_sub(uECC_word_t *result, |
| const uECC_word_t *left, |
| const uECC_word_t *right, |
| wordcount_t num_words) { |
| uint32_t carry = 1; /* carry = 1 initially (means don't borrow) */ |
| uint32_t left_word; |
| uint32_t right_word; |
| |
| __asm__ volatile ( |
| ".syntax unified \n\t" |
| "1: \n\t" |
| "ldmia %[lptr]!, {%[left]} \n\t" /* Load left word. */ |
| "ldmia %[rptr]!, {%[right]} \n\t" /* Load right word. */ |
| "lsrs %[carry], #1 \n\t" /* Set up carry flag (carry = 0 after this). */ |
| "sbcs %[left], %[right] \n\t" /* Subtract with borrow. */ |
| "adcs %[carry], %[carry] \n\t" /* Store carry bit. */ |
| "stmia %[dptr]!, {%[left]} \n\t" /* Store result word. */ |
| "subs %[ctr], #1 \n\t" /* Decrement counter. */ |
| "bne 1b \n\t" /* Loop until counter == 0. */ |
| RESUME_SYNTAX |
| : [dptr] REG_RW (result), [lptr] REG_RW (left), [rptr] REG_RW (right), |
| [ctr] REG_RW (num_words), [carry] REG_RW (carry), |
| [left] REG_WRITE (left_word), [right] REG_WRITE (right_word) |
| : |
| : "cc", "memory" |
| ); |
| return !carry; |
| } |
| #define asm_sub 1 |
| #endif |
| |
| #if !asm_mult |
| uECC_VLI_API void uECC_vli_mult(uECC_word_t *result, |
| const uECC_word_t *left, |
| const uECC_word_t *right, |
| wordcount_t num_words) { |
| #if (uECC_PLATFORM != uECC_arm_thumb) |
| uint32_t c0 = 0; |
| uint32_t c1 = 0; |
| uint32_t c2 = 0; |
| uint32_t k = 0; |
| uint32_t i; |
| uint32_t t0, t1; |
| |
| __asm__ volatile ( |
| ".syntax unified \n\t" |
| |
| "1: \n\t" /* outer loop (k < num_words) */ |
| "movs %[i], #0 \n\t" /* i = 0 */ |
| "b 3f \n\t" |
| |
| "2: \n\t" /* outer loop (k >= num_words) */ |
| "movs %[i], %[k] \n\t" /* i = k */ |
| "subs %[i], %[last_word] \n\t" /* i = k - (num_words - 1) (times 4) */ |
| |
| "3: \n\t" /* inner loop */ |
| "subs %[t0], %[k], %[i] \n\t" /* t0 = k-i */ |
| |
| "ldr %[t1], [%[right], %[t0]] \n\t" /* t1 = right[k - i] */ |
| "ldr %[t0], [%[left], %[i]] \n\t" /* t0 = left[i] */ |
| |
| "umull %[t0], %[t1], %[t0], %[t1] \n\t" /* (t0, t1) = left[i] * right[k - i] */ |
| |
| "adds %[c0], %[t0] \n\t" /* add low word to c0 */ |
| "adcs %[c1], %[t1] \n\t" /* add high word to c1, including carry */ |
| "adcs %[c2], #0 \n\t" /* add carry to c2 */ |
| |
| "adds %[i], #4 \n\t" /* i += 4 */ |
| "cmp %[i], %[last_word] \n\t" /* i > (num_words - 1) (times 4)? */ |
| "bgt 4f \n\t" /* if so, exit the loop */ |
| "cmp %[i], %[k] \n\t" /* i <= k? */ |
| "ble 3b \n\t" /* if so, continue looping */ |
| |
| "4: \n\t" /* end inner loop */ |
| |
| "str %[c0], [%[result], %[k]] \n\t" /* result[k] = c0 */ |
| "mov %[c0], %[c1] \n\t" /* c0 = c1 */ |
| "mov %[c1], %[c2] \n\t" /* c1 = c2 */ |
| "movs %[c2], #0 \n\t" /* c2 = 0 */ |
| "adds %[k], #4 \n\t" /* k += 4 */ |
| "cmp %[k], %[last_word] \n\t" /* k <= (num_words - 1) (times 4) ? */ |
| "ble 1b \n\t" /* if so, loop back, start with i = 0 */ |
| "cmp %[k], %[last_word], lsl #1 \n\t" /* k <= (num_words * 2 - 2) (times 4) ? */ |
| "ble 2b \n\t" /* if so, loop back, start with i = (k + 1) - num_words */ |
| /* end outer loop */ |
| |
| "str %[c0], [%[result], %[k]] \n\t" /* result[num_words * 2 - 1] = c0 */ |
| RESUME_SYNTAX |
| : [c0] "+r" (c0), [c1] "+r" (c1), [c2] "+r" (c2), |
| [k] "+r" (k), [i] "=&r" (i), [t0] "=&r" (t0), [t1] "=&r" (t1) |
| : [result] "r" (result), [left] "r" (left), [right] "r" (right), |
| [last_word] "r" ((num_words - 1) * 4) |
| : "cc", "memory" |
| ); |
| |
| #else /* Thumb-1 */ |
| |
| register uint32_t *r0 __asm__("r0") = result; |
| register const uint32_t *r1 __asm__("r1") = left; |
| register const uint32_t *r2 __asm__("r2") = right; |
| |
| __asm__ volatile ( |
| ".syntax unified \n\t" |
| "movs r3, #0 \n\t" /* c0 = 0 */ |
| "movs r4, #0 \n\t" /* c1 = 0 */ |
| "movs r5, #0 \n\t" /* c2 = 0 */ |
| "movs r6, #0 \n\t" /* k = 0 */ |
| |
| "push {r0} \n\t" /* keep result on the stack */ |
| |
| "1: \n\t" /* outer loop (k < num_words) */ |
| "movs r7, #0 \n\t" /* r7 = i = 0 */ |
| "b 3f \n\t" |
| |
| "2: \n\t" /* outer loop (k >= num_words) */ |
| "movs r7, r6 \n\t" /* r7 = k */ |
| "subs r7, %[last_word] \n\t" /* r7 = i = k - (num_words - 1) (times 4) */ |
| |
| "3: \n\t" /* inner loop */ |
| "push {r3, r4, r5, r6} \n\t" /* push things, r3 (c0) is at the top of stack. */ |
| "subs r0, r6, r7 \n\t" /* r0 = k - i */ |
| |
| "ldr r4, [r2, r0] \n\t" /* r4 = right[k - i] */ |
| "ldr r0, [r1, r7] \n\t" /* r0 = left[i] */ |
| |
| "lsrs r3, r0, #16 \n\t" /* r3 = a1 */ |
| "uxth r0, r0 \n\t" /* r0 = a0 */ |
| |
| "lsrs r5, r4, #16 \n\t" /* r5 = b1 */ |
| "uxth r4, r4 \n\t" /* r4 = b0 */ |
| |
| "movs r6, r3 \n\t" /* r6 = a1 */ |
| "muls r6, r5, r6 \n\t" /* r6 = a1 * b1 */ |
| "muls r3, r4, r3 \n\t" /* r3 = b0 * a1 */ |
| "muls r5, r0, r5 \n\t" /* r5 = a0 * b1 */ |
| "muls r0, r4, r0 \n\t" /* r0 = a0 * b0 */ |
| |
| "movs r4, #0 \n\t" /* r4 = 0 */ |
| "adds r3, r5 \n\t" /* r3 = b0 * a1 + a0 * b1 */ |
| "adcs r4, r4 \n\t" /* r4 = carry */ |
| "lsls r4, #16 \n\t" /* r4 = carry << 16 */ |
| "adds r6, r4 \n\t" /* r6 = a1 * b1 + carry */ |
| |
| "lsls r4, r3, #16 \n\t" /* r4 = (b0 * a1 + a0 * b1) << 16 */ |
| "lsrs r3, #16 \n\t" /* r3 = (b0 * a1 + a0 * b1) >> 16 */ |
| "adds r0, r4 \n\t" /* r0 = low word = a0 * b0 + ((b0 * a1 + a0 * b1) << 16) */ |
| "adcs r6, r3 \n\t" /* r6 = high word = a1 * b1 + carry + ((b0 * a1 + a0 * b1) >> 16) */ |
| |
| "pop {r3, r4, r5} \n\t" /* r3 = c0, r4 = c1, r5 = c2 */ |
| "adds r3, r0 \n\t" /* add low word to c0 */ |
| "adcs r4, r6 \n\t" /* add high word to c1, including carry */ |
| "movs r0, #0 \n\t" /* r0 = 0 (does not affect carry bit) */ |
| "adcs r5, r0 \n\t" /* add carry to c2 */ |
| |
| "pop {r6} \n\t" /* r6 = k */ |
| |
| "adds r7, #4 \n\t" /* i += 4 */ |
| "cmp r7, %[last_word] \n\t" /* i > (num_words - 1) (times 4)? */ |
| "bgt 4f \n\t" /* if so, exit the loop */ |
| "cmp r7, r6 \n\t" /* i <= k? */ |
| "ble 3b \n\t" /* if so, continue looping */ |
| |
| "4: \n\t" /* end inner loop */ |
| |
| "ldr r0, [sp, #0] \n\t" /* r0 = result */ |
| |
| "str r3, [r0, r6] \n\t" /* result[k] = c0 */ |
| "mov r3, r4 \n\t" /* c0 = c1 */ |
| "mov r4, r5 \n\t" /* c1 = c2 */ |
| "movs r5, #0 \n\t" /* c2 = 0 */ |
| "adds r6, #4 \n\t" /* k += 4 */ |
| "cmp r6, %[last_word] \n\t" /* k <= (num_words - 1) (times 4) ? */ |
| "ble 1b \n\t" /* if so, loop back, start with i = 0 */ |
| "cmp r6, %[lw2] \n\t" /* k <= (num_words * 2 - 2) (times 4) ? */ |
| "ble 2b \n\t" /* if so, loop back, start with i = (k + 1) - num_words */ |
| /* end outer loop */ |
| |
| "str r3, [r0, r6] \n\t" /* result[num_words * 2 - 1] = c0 */ |
| "pop {r0} \n\t" /* pop result off the stack */ |
| |
| ".syntax divided \n\t" |
| : |
| : [r0] "l" (r0), [r1] "l" (r1), [r2] "l" (r2), |
| [last_word] "r" ((num_words - 1) * 4), [lw2] "r" ((num_words - 1) * 4 * 2) |
| : "r3", "r4", "r5", "r6", "r7", "cc", "memory" |
| ); |
| #endif |
| } |
| #define asm_mult 1 |
| #endif |
| |
| #if uECC_SQUARE_FUNC |
| #if !asm_square |
| uECC_VLI_API void uECC_vli_square(uECC_word_t *result, |
| const uECC_word_t *left, |
| wordcount_t num_words) { |
| #if (uECC_PLATFORM != uECC_arm_thumb) |
| uint32_t c0 = 0; |
| uint32_t c1 = 0; |
| uint32_t c2 = 0; |
| uint32_t k = 0; |
| uint32_t i, tt; |
| uint32_t t0, t1; |
| |
| __asm__ volatile ( |
| ".syntax unified \n\t" |
| |
| "1: \n\t" /* outer loop (k < num_words) */ |
| "movs %[i], #0 \n\t" /* i = 0 */ |
| "b 3f \n\t" |
| |
| "2: \n\t" /* outer loop (k >= num_words) */ |
| "movs %[i], %[k] \n\t" /* i = k */ |
| "subs %[i], %[last_word] \n\t" /* i = k - (num_words - 1) (times 4) */ |
| |
| "3: \n\t" /* inner loop */ |
| "subs %[tt], %[k], %[i] \n\t" /* tt = k-i */ |
| |
| "ldr %[t1], [%[left], %[tt]] \n\t" /* t1 = left[k - i] */ |
| "ldr %[t0], [%[left], %[i]] \n\t" /* t0 = left[i] */ |
| |
| "umull %[t0], %[t1], %[t0], %[t1] \n\t" /* (t0, t1) = left[i] * right[k - i] */ |
| |
| "cmp %[i], %[tt] \n\t" /* (i < k - i) ? */ |
| "bge 4f \n\t" /* if i >= k - i, skip */ |
| "lsls %[t1], #1 \n\t" /* high word << 1 */ |
| "adc %[c2], #0 \n\t" /* add carry bit to c2 */ |
| "lsls %[t0], #1 \n\t" /* low word << 1 */ |
| "adc %[t1], #0 \n\t" /* add carry bit to high word */ |
| |
| "4: \n\t" |
| |
| "adds %[c0], %[t0] \n\t" /* add low word to c0 */ |
| "adcs %[c1], %[t1] \n\t" /* add high word to c1, including carry */ |
| "adc %[c2], #0 \n\t" /* add carry to c2 */ |
| |
| "adds %[i], #4 \n\t" /* i += 4 */ |
| "cmp %[i], %[k] \n\t" /* i >= k? */ |
| "bge 5f \n\t" /* if so, exit the loop */ |
| "subs %[tt], %[k], %[i] \n\t" /* tt = k - i */ |
| "cmp %[i], %[tt] \n\t" /* i <= k - i? */ |
| "ble 3b \n\t" /* if so, continue looping */ |
| |
| "5: \n\t" /* end inner loop */ |
| |
| "str %[c0], [%[result], %[k]] \n\t" /* result[k] = c0 */ |
| "mov %[c0], %[c1] \n\t" /* c0 = c1 */ |
| "mov %[c1], %[c2] \n\t" /* c1 = c2 */ |
| "movs %[c2], #0 \n\t" /* c2 = 0 */ |
| "adds %[k], #4 \n\t" /* k += 4 */ |
| "cmp %[k], %[last_word] \n\t" /* k <= (num_words - 1) (times 4) ? */ |
| "ble 1b \n\t" /* if so, loop back, start with i = 0 */ |
| "cmp %[k], %[last_word], lsl #1 \n\t" /* k <= (num_words * 2 - 2) (times 4) ? */ |
| "ble 2b \n\t" /* if so, loop back, start with i = (k + 1) - num_words */ |
| /* end outer loop */ |
| |
| "str %[c0], [%[result], %[k]] \n\t" /* result[num_words * 2 - 1] = c0 */ |
| RESUME_SYNTAX |
| : [c0] "+r" (c0), [c1] "+r" (c1), [c2] "+r" (c2), |
| [k] "+r" (k), [i] "=&r" (i), [tt] "=&r" (tt), [t0] "=&r" (t0), [t1] "=&r" (t1) |
| : [result] "r" (result), [left] "r" (left), [last_word] "r" ((num_words - 1) * 4) |
| : "cc", "memory" |
| ); |
| |
| #else |
| |
| register uint32_t *r0 __asm__("r0") = result; |
| register const uint32_t *r1 __asm__("r1") = left; |
| |
| __asm__ volatile ( |
| ".syntax unified \n\t" |
| "movs r2, #0 \n\t" /* c0 = 0 */ |
| "movs r3, #0 \n\t" /* c1 = 0 */ |
| "movs r4, #0 \n\t" /* c2 = 0 */ |
| "movs r5, #0 \n\t" /* k = 0 */ |
| |
| "push {r0} \n\t" /* keep result on the stack */ |
| |
| "1: \n\t" /* outer loop (k < num_words) */ |
| "movs r6, #0 \n\t" /* r6 = i = 0 */ |
| "b 3f \n\t" |
| |
| "2: \n\t" /* outer loop (k >= num_words) */ |
| "movs r6, r5 \n\t" /* r6 = k */ |
| "subs r6, %[last_word] \n\t" /* r6 = i = k - (num_words - 1) (times 4) */ |
| |
| "3: \n\t" /* inner loop */ |
| "push {r2, r3, r4, r5} \n\t" /* push things, r2 (c0) is at the top of stack. */ |
| "subs r7, r5, r6 \n\t" /* r7 = k - i */ |
| |
| "ldr r3, [r1, r7] \n\t" /* r3 = left[k - i] */ |
| "ldr r0, [r1, r6] \n\t" /* r0 = left[i] */ |
| |
| "lsrs r2, r0, #16 \n\t" /* r2 = a1 */ |
| "uxth r0, r0 \n\t" /* r0 = a0 */ |
| |
| "lsrs r4, r3, #16 \n\t" /* r4 = b1 */ |
| "uxth r3, r3 \n\t" /* r3 = b0 */ |
| |
| "movs r5, r2 \n\t" /* r5 = a1 */ |
| "muls r5, r4, r5 \n\t" /* r5 = a1 * b1 */ |
| "muls r2, r3, r2 \n\t" /* r2 = b0 * a1 */ |
| "muls r4, r0, r4 \n\t" /* r4 = a0 * b1 */ |
| "muls r0, r3, r0 \n\t" /* r0 = a0 * b0 */ |
| |
| "movs r3, #0 \n\t" /* r3 = 0 */ |
| "adds r2, r4 \n\t" /* r2 = b0 * a1 + a0 * b1 */ |
| "adcs r3, r3 \n\t" /* r3 = carry */ |
| "lsls r3, #16 \n\t" /* r3 = carry << 16 */ |
| "adds r5, r3 \n\t" /* r5 = a1 * b1 + carry */ |
| |
| "lsls r3, r2, #16 \n\t" /* r3 = (b0 * a1 + a0 * b1) << 16 */ |
| "lsrs r2, #16 \n\t" /* r2 = (b0 * a1 + a0 * b1) >> 16 */ |
| "adds r0, r3 \n\t" /* r0 = low word = a0 * b0 + ((b0 * a1 + a0 * b1) << 16) */ |
| "adcs r5, r2 \n\t" /* r5 = high word = a1 * b1 + carry + ((b0 * a1 + a0 * b1) >> 16) */ |
| |
| "movs r3, #0 \n\t" /* r3 = 0 */ |
| "cmp r6, r7 \n\t" /* (i < k - i) ? */ |
| "mov r7, r3 \n\t" /* r7 = 0 (does not affect condition)*/ |
| "bge 4f \n\t" /* if i >= k - i, skip */ |
| "lsls r5, #1 \n\t" /* high word << 1 */ |
| "adcs r7, r3 \n\t" /* r7 = carry bit for c2 */ |
| "lsls r0, #1 \n\t" /* low word << 1 */ |
| "adcs r5, r3 \n\t" /* add carry from shift to high word */ |
| |
| "4: \n\t" |
| "pop {r2, r3, r4} \n\t" /* r2 = c0, r3 = c1, r4 = c2 */ |
| "adds r2, r0 \n\t" /* add low word to c0 */ |
| "adcs r3, r5 \n\t" /* add high word to c1, including carry */ |
| "movs r0, #0 \n\t" /* r0 = 0 (does not affect carry bit) */ |
| "adcs r4, r0 \n\t" /* add carry to c2 */ |
| "adds r4, r7 \n\t" /* add carry from doubling (if any) */ |
| |
| "pop {r5} \n\t" /* r5 = k */ |
| |
| "adds r6, #4 \n\t" /* i += 4 */ |
| "cmp r6, r5 \n\t" /* i >= k? */ |
| "bge 5f \n\t" /* if so, exit the loop */ |
| "subs r7, r5, r6 \n\t" /* r7 = k - i */ |
| "cmp r6, r7 \n\t" /* i <= k - i? */ |
| "ble 3b \n\t" /* if so, continue looping */ |
| |
| "5: \n\t" /* end inner loop */ |
| |
| "ldr r0, [sp, #0] \n\t" /* r0 = result */ |
| |
| "str r2, [r0, r5] \n\t" /* result[k] = c0 */ |
| "mov r2, r3 \n\t" /* c0 = c1 */ |
| "mov r3, r4 \n\t" /* c1 = c2 */ |
| "movs r4, #0 \n\t" /* c2 = 0 */ |
| "adds r5, #4 \n\t" /* k += 4 */ |
| "cmp r5, %[last_word] \n\t" /* k <= (num_words - 1) (times 4) ? */ |
| "ble 1b \n\t" /* if so, loop back, start with i = 0 */ |
| "cmp r5, %[lw2] \n\t" /* k <= (num_words * 2 - 2) (times 4) ? */ |
| "ble 2b \n\t" /* if so, loop back, start with i = (k + 1) - num_words */ |
| /* end outer loop */ |
| |
| "str r2, [r0, r5] \n\t" /* result[num_words * 2 - 1] = c0 */ |
| "pop {r0} \n\t" /* pop result off the stack */ |
| |
| ".syntax divided \n\t" |
| : [r0] "+l" (r0), [r1] "+l" (r1) |
| : [last_word] "r" ((num_words - 1) * 4), [lw2] "r" ((num_words - 1) * 4 * 2) |
| : "r2", "r3", "r4", "r5", "r6", "r7", "cc", "memory" |
| ); |
| #endif |
| } |
| #define asm_square 1 |
| #endif |
| #endif /* uECC_SQUARE_FUNC */ |
| |
| #endif /* _UECC_ASM_ARM_H_ */ |
