blob: 0b4e414e21eaf3511e087422a939e3eb47ce8b97 [file]
name: STM32L0 Series
manufacturer:
id: 0x20
cc: 0x0
generated_from_pack: true
pack_file_release: 2.3.0
variants:
- name: STM32L010C6
package_variants:
- STM32L010C6Tx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8008000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l010x6_8_eeprom
- stm32l0xx_opt
- name: STM32L010F4
package_variants:
- STM32L010F4Px
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8004000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20000800
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l010x4_eeprom
- stm32l0xx_opt
- name: STM32L010K4
package_variants:
- STM32L010K4Tx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8004000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20000800
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l010x4_eeprom
- stm32l0xx_opt
- name: STM32L010K8
package_variants:
- STM32L010K8Tx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8010000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l010x6_8_eeprom
- stm32l0xx_opt
- name: STM32L010R8
package_variants:
- STM32L010R8Tx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8010000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l010x6_8_eeprom
- stm32l0xx_opt
- name: STM32L010RB
package_variants:
- STM32L010RBTx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8020000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l010xb_eeprom
- stm32l0xx_opt
- name: STM32L011D3
package_variants:
- STM32L011D3Px
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8002000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20000800
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l010xb_eeprom
- stm32l0xx_opt
- name: STM32L011D4
package_variants:
- STM32L011D4Px
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8004000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20000800
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l010xb_eeprom
- stm32l0xx_opt
- name: STM32L011E3
package_variants:
- STM32L011E3Yx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8002000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20000800
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l010xb_eeprom
- stm32l0xx_opt
- name: STM32L011E4
package_variants:
- STM32L011E4Yx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8004000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20000800
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l010xb_eeprom
- stm32l0xx_opt
- name: STM32L011F3
package_variants:
- STM32L011F3Ux
- STM32L011F3Px
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8002000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20000800
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l010xb_eeprom
- stm32l0xx_opt
- name: STM32L011F4
package_variants:
- STM32L011F4Px
- STM32L011F4Ux
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8004000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20000800
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l010xb_eeprom
- stm32l0xx_opt
- name: STM32L011G3
package_variants:
- STM32L011G3Ux
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8002000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20000800
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l010xb_eeprom
- stm32l0xx_opt
- name: STM32L011G4
package_variants:
- STM32L011G4Ux
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8004000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20000800
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l010xb_eeprom
- stm32l0xx_opt
- name: STM32L011K3
package_variants:
- STM32L011K3Tx
- STM32L011K3Ux
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8002000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20000800
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l010xb_eeprom
- stm32l0xx_opt
- name: STM32L011K4
package_variants:
- STM32L011K4Tx
- STM32L011K4Ux
- STM32L011K4Vx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8004000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20000800
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l010xb_eeprom
- stm32l0xx_opt
- name: STM32L021D4
package_variants:
- STM32L021D4Px
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8004000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20000800
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l010xb_eeprom
- stm32l0xx_opt
- name: STM32L021F4
package_variants:
- STM32L021F4Ux
- STM32L021F4Px
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8004000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20000800
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l010xb_eeprom
- stm32l0xx_opt
- name: STM32L021G4
package_variants:
- STM32L021G4Ux
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8004000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20000800
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l010xb_eeprom
- stm32l0xx_opt
- name: STM32L021K4
package_variants:
- STM32L021K4Tx
- STM32L021K4Ux
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8004000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20000800
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l010xb_eeprom
- stm32l0xx_opt
- name: STM32L031C4
package_variants:
- STM32L031C4Tx
- STM32L031C4Ux
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8004000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l03_4x_eeprom
- stm32l0xx_opt
- name: STM32L031C6
package_variants:
- STM32L031C6Tx
- STM32L031C6Ux
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8008000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l03_4x_eeprom
- stm32l0xx_opt
- name: STM32L031E4
package_variants:
- STM32L031E4Yx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8004000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l03_4x_eeprom
- stm32l0xx_opt
- name: STM32L031E6
package_variants:
- STM32L031E6Yx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8008000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l03_4x_eeprom
- stm32l0xx_opt
- name: STM32L031F4
package_variants:
- STM32L031F4Px
- STM32L031F4Ux
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8004000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l03_4x_eeprom
- stm32l0xx_opt
- name: STM32L031F6
package_variants:
- STM32L031F6Px
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8008000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l03_4x_eeprom
- stm32l0xx_opt
- name: STM32L031G4
package_variants:
- STM32L031G4Ux
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8004000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l03_4x_eeprom
- stm32l0xx_opt
- name: STM32L031G6
package_variants:
- STM32L031G6Ux
- STM32L031G6UxS
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8008000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l03_4x_eeprom
- stm32l0xx_opt
- name: STM32L031K4
package_variants:
- STM32L031K4Tx
- STM32L031K4Ux
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8004000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l03_4x_eeprom
- stm32l0xx_opt
- name: STM32L031K6
package_variants:
- STM32L031K6Tx
- STM32L031K6Ux
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8008000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l03_4x_eeprom
- stm32l0xx_opt
- name: STM32L041C6
package_variants:
- STM32L041C6Tx
- STM32L041C6Ux
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8008000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l03_4x_eeprom
- stm32l0xx_opt
- name: STM32L041E6
package_variants:
- STM32L041E6Ux
- STM32L041E6Yx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8008000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l03_4x_eeprom
- stm32l0xx_opt
- name: STM32L041F6
package_variants:
- STM32L041F6Px
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8008000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l03_4x_eeprom
- stm32l0xx_opt
- name: STM32L041G6
package_variants:
- STM32L041G6Ux
- STM32L041G6UxS
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8008000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l03_4x_eeprom
- stm32l0xx_opt
- name: STM32L041K6
package_variants:
- STM32L041K6Tx
- STM32L041K6Ux
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8008000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l03_4x_eeprom
- stm32l0xx_opt
- name: STM32L051C6
package_variants:
- STM32L051C6Tx
- STM32L051C6Ux
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8008000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l05_6x_eeprom
- stm32l0xx_opt
- name: STM32L051C8
package_variants:
- STM32L051C8Tx
- STM32L051C8Ux
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8010000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l05_6x_eeprom
- stm32l0xx_opt
- name: STM32L051K6
package_variants:
- STM32L051K6Tx
- STM32L051K6Ux
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8008000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l05_6x_eeprom
- stm32l0xx_opt
- name: STM32L051K8
package_variants:
- STM32L051K8Tx
- STM32L051K8Ux
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8010000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l05_6x_eeprom
- stm32l0xx_opt
- name: STM32L051R6
package_variants:
- STM32L051R6Tx
- STM32L051R6Hx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8008000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l05_6x_eeprom
- stm32l0xx_opt
- name: STM32L051R8
package_variants:
- STM32L051R8Tx
- STM32L051R8Hx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8010000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l05_6x_eeprom
- stm32l0xx_opt
- name: STM32L051T6
package_variants:
- STM32L051T6Yx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8008000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l05_6x_eeprom
- stm32l0xx_opt
- name: STM32L051T8
package_variants:
- STM32L051T8Yx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8010000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l05_6x_eeprom
- stm32l0xx_opt
- name: STM32L052C6
package_variants:
- STM32L052C6Tx
- STM32L052C6Ux
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8008000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l05_6x_eeprom
- stm32l0xx_opt
- name: STM32L052C8
package_variants:
- STM32L052C8Tx
- STM32L052C8Ux
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8010000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l05_6x_eeprom
- stm32l0xx_opt
- name: STM32L052K6
package_variants:
- STM32L052K6Tx
- STM32L052K6Ux
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8008000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l05_6x_eeprom
- stm32l0xx_opt
- name: STM32L052K8
package_variants:
- STM32L052K8Tx
- STM32L052K8Ux
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8010000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l05_6x_eeprom
- stm32l0xx_opt
- name: STM32L052R6
package_variants:
- STM32L052R6Tx
- STM32L052R6Hx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8008000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l05_6x_eeprom
- stm32l0xx_opt
- name: STM32L052R8
package_variants:
- STM32L052R8Tx
- STM32L052R8Hx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8010000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l05_6x_eeprom
- stm32l0xx_opt
- name: STM32L052T6
package_variants:
- STM32L052T6Yx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8008000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l05_6x_eeprom
- stm32l0xx_opt
- name: STM32L052T8
package_variants:
- STM32L052T8Yx
- STM32L052T8Fx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8010000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l05_6x_eeprom
- stm32l0xx_opt
- name: STM32L053C6
package_variants:
- STM32L053C6Tx
- STM32L053C6Ux
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8008000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l05_6x_eeprom
- stm32l0xx_opt
- name: STM32L053C8
package_variants:
- STM32L053C8Tx
- STM32L053C8Ux
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8010000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l05_6x_eeprom
- stm32l0xx_opt
- name: STM32L053R6
package_variants:
- STM32L053R6Tx
- STM32L053R6Hx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8008000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l05_6x_eeprom
- stm32l0xx_opt
- name: STM32L053R8
package_variants:
- STM32L053R8Tx
- STM32L053R8Hx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8010000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l05_6x_eeprom
- stm32l0xx_opt
- name: STM32L062C8
package_variants:
- STM32L062C8Ux
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8010000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l05_6x_eeprom
- stm32l0xx_opt
- name: STM32L062K8
package_variants:
- STM32L062K8Tx
- STM32L062K8Ux
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8010000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l05_6x_eeprom
- stm32l0xx_opt
- name: STM32L063C8
package_variants:
- STM32L063C8Tx
- STM32L063C8Ux
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8010000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l05_6x_eeprom
- stm32l0xx_opt
- name: STM32L063R8
package_variants:
- STM32L063R8Tx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8010000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20002000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l05_6x_eeprom
- stm32l0xx_opt
- name: STM32L071C8
package_variants:
- STM32L071C8Tx
- STM32L071C8Ux
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8010000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07x_64_eeprom
- stm32l0xx_opt
- name: STM32L071CB
package_variants:
- STM32L071CBTx
- STM32L071CBYx
- STM32L071CBUx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8020000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07_8x_eeprom
- stm32l0xx_opt
- name: STM32L071CZ
package_variants:
- STM32L071CZTx
- STM32L071CZYx
- STM32L071CZUx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8030000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07_8x_eeprom
- stm32l0xx_opt
- name: STM32L071K8
package_variants:
- STM32L071K8Ux
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8010000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07x_64_eeprom
- stm32l0xx_opt
- name: STM32L071KB
package_variants:
- STM32L071KBTx
- STM32L071KBUx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8020000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07_8x_eeprom
- stm32l0xx_opt
- name: STM32L071KZ
package_variants:
- STM32L071KZTx
- STM32L071KZUx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8030000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07_8x_eeprom
- stm32l0xx_opt
- name: STM32L071RB
package_variants:
- STM32L071RBTx
- STM32L071RBHx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8020000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07_8x_eeprom
- stm32l0xx_opt
- name: STM32L071RZ
package_variants:
- STM32L071RZTx
- STM32L071RZHx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8030000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07_8x_eeprom
- stm32l0xx_opt
- name: STM32L071V8
package_variants:
- STM32L071V8Tx
- STM32L071V8Ix
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8010000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07x_64_eeprom
- stm32l0xx_opt
- name: STM32L071VB
package_variants:
- STM32L071VBTx
- STM32L071VBIx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8020000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07_8x_eeprom
- stm32l0xx_opt
- name: STM32L071VZ
package_variants:
- STM32L071VZTx
- STM32L071VZIx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8030000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07_8x_eeprom
- stm32l0xx_opt
- name: STM32L072CB
package_variants:
- STM32L072CBTx
- STM32L072CBYx
- STM32L072CBUx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8020000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07_8x_eeprom
- stm32l0xx_opt
- name: STM32L072CZ
package_variants:
- STM32L072CZTx
- STM32L072CZYx
- STM32L072CZEx
- STM32L072CZUx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8030000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07_8x_eeprom
- stm32l0xx_opt
- name: STM32L072KB
package_variants:
- STM32L072KBTx
- STM32L072KBUx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8020000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07_8x_eeprom
- stm32l0xx_opt
- name: STM32L072KZ
package_variants:
- STM32L072KZTx
- STM32L072KZUx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8030000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07_8x_eeprom
- stm32l0xx_opt
- name: STM32L072RB
package_variants:
- STM32L072RBTx
- STM32L072RBHx
- STM32L072RBIx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8020000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07_8x_eeprom
- stm32l0xx_opt
- name: STM32L072RZ
package_variants:
- STM32L072RZTx
- STM32L072RZHx
- STM32L072RZIx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8030000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07_8x_eeprom
- stm32l0xx_opt
- name: STM32L072V8
package_variants:
- STM32L072V8Tx
- STM32L072V8Ix
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8010000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07x_64_eeprom
- stm32l0xx_opt
- name: STM32L072VB
package_variants:
- STM32L072VBTx
- STM32L072VBIx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8020000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07_8x_eeprom
- stm32l0xx_opt
- name: STM32L072VZ
package_variants:
- STM32L072VZTx
- STM32L072VZIx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8030000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07_8x_eeprom
- stm32l0xx_opt
- name: STM32L073CB
package_variants:
- STM32L073CBTx
- STM32L073CBUx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8020000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07_8x_eeprom
- stm32l0xx_opt
- name: STM32L073CZ
package_variants:
- STM32L073CZTx
- STM32L073CZYx
- STM32L073CZUx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8030000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07_8x_eeprom
- stm32l0xx_opt
- name: STM32L073RB
package_variants:
- STM32L073RBTx
- STM32L073RBHx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8020000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07_8x_eeprom
- stm32l0xx_opt
- name: STM32L073RZ
package_variants:
- STM32L073RZTx
- STM32L073RZHx
- STM32L073RZIx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8030000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07_8x_eeprom
- stm32l0xx_opt
- name: STM32L073V8
package_variants:
- STM32L073V8Tx
- STM32L073V8Ix
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8010000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07x_64_eeprom
- stm32l0xx_opt
- name: STM32L073VB
package_variants:
- STM32L073VBTx
- STM32L073VBIx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8020000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07_8x_eeprom
- stm32l0xx_opt
- name: STM32L073VZ
package_variants:
- STM32L073VZTx
- STM32L073VZIx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8030000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07_8x_eeprom
- stm32l0xx_opt
- name: STM32L081CB
package_variants:
- STM32L081CBTx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8020000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07_8x_eeprom
- stm32l0xx_opt
- name: STM32L081CZ
package_variants:
- STM32L081CZTx
- STM32L081CZUx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8030000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07_8x_eeprom
- stm32l0xx_opt
- name: STM32L081KZ
package_variants:
- STM32L081KZTx
- STM32L081KZUx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8030000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07_8x_eeprom
- stm32l0xx_opt
- name: STM32L082CZ
package_variants:
- STM32L082CZYx
- STM32L082CZUx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8030000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l0xx_opt
- stm32l07_8x_eeprom
- name: STM32L082KB
package_variants:
- STM32L082KBTx
- STM32L082KBUx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8020000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l0xx_opt
- stm32l07_8x_eeprom
- name: STM32L082KZ
package_variants:
- STM32L082KZTx
- STM32L082KZUx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8030000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l0xx_opt
- stm32l07_8x_eeprom
- name: STM32L083CB
package_variants:
- STM32L083CBTx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8020000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07_8x_eeprom
- stm32l0xx_opt
- name: STM32L083CZ
package_variants:
- STM32L083CZTx
- STM32L083CZUx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8030000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07_8x_eeprom
- stm32l0xx_opt
- name: STM32L083RB
package_variants:
- STM32L083RBTx
- STM32L083RBHx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8020000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07_8x_eeprom
- stm32l0xx_opt
- name: STM32L083RZ
package_variants:
- STM32L083RZTx
- STM32L083RZHx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8030000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07_8x_eeprom
- stm32l0xx_opt
- name: STM32L083V8
package_variants:
- STM32L083V8Tx
- STM32L083V8Ix
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8010000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07x_64_eeprom
- stm32l0xx_opt
- name: STM32L083VB
package_variants:
- STM32L083VBTx
- STM32L083VBIx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8020000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07_8x_eeprom
- stm32l0xx_opt
- name: STM32L083VZ
package_variants:
- STM32L083VZTx
- STM32L083VZIx
cores:
- name: main
type: armv6m
core_access_options: !Arm
ap: 0
memory_map:
- !Nvm
name: BANK_1
range:
start: 0x8000000
end: 0x8030000
cores:
- main
access:
write: false
boot: true
- !Ram
name: SRAM
range:
start: 0x20000000
end: 0x20005000
cores:
- main
flash_algorithms:
- stm32l0xx_192
- stm32l07_8x_eeprom
- stm32l0xx_opt
flash_algorithms:
- name: stm32l0xx_192
description: 'STM32L0 192KB Flash '
default: true
instructions: ASoB0AIqF9E7SIFpDyISAhFDgWE5ScFgOUnBYDlJAWE5SQFhwGnAAgbUOUg3SQFgBiFBYDdJgWAAIHBHASgB0AIoCNEsSEFoAiIRQ0FgQWgBIhFDQWAAIHBHMLUmSUpoTBUiQ0pgSmgIJSpDSmAAIgJgKUgmSgDgEGCLadsH+9FIaKBDSGBIaKhDSGAAIDC9ASBwR/C1GEwAIyUVCCY/MYkJjEYk4GFoKUNhYGFoMUNhYEAhgMqAwAkfACn60RZJp2n/BwLQEk85YPnnoWkJBQkPBtCgaQ8hCQIIQ6BhASDwvWFoqUNhYGFosUNhYFscnEXY2AAg8L0AIAJA782riQUEAwK/rp2MFhUUE1VVAAAAMABA/w8AAKqqAAAAAAAA
pc_init: 0x1
pc_uninit: 0x3d
pc_program_page: 0x95
pc_erase_sector: 0x5b
data_section_offset: 0x11c
flash_properties:
address_range:
start: 0x8000000
end: 0x8030000
page_size: 0x400
erased_byte_value: 0x0
program_page_timeout: 500
erase_sector_timeout: 500
sectors:
- size: 0x80
address: 0x0
- name: stm32l010x6_8_eeprom
description: STM32L010 256 Byte Data EEPROM
instructions: ASoB0AIqE9E3SIFpDyISAhFDgWE1ScFgNUnBYMBpwAIG1DVIM0kBYAYhQWAzSYFgACBwRwEoAdACKATRKkhBaAEiEUNBYAAgcEfwtf8hATElTP8wAApiaAACTQAqQ2JgYmgQJzpDYmAlSiNLACYGYADgGmCmafYH+9GmaTYFNg8G0KBpDyEJAghDoGEBIPC9AB0JH+rRYGioQ2BgYGi4Q2BgACDwvQEgcEfwtf8jATMNTv8xCQp0aAkCnEN0YBBMDU0K4BdoB2AA4Cxgt2n/B/vRAB0JHxIdGx8AKQHQACvw0QAg8L0AAAAgAkDvzauJBQQDAlVVAAAAMABA/w8AAKqqAAAAAAAA
pc_init: 0x1
pc_uninit: 0x35
pc_program_page: 0xab
pc_erase_sector: 0x4b
data_section_offset: 0x104
flash_properties:
address_range:
start: 0x8080000
end: 0x8080100
page_size: 0x100
erased_byte_value: 0x0
program_page_timeout: 500
erase_sector_timeout: 500
sectors:
- size: 0x100
address: 0x0
- name: stm32l0xx_opt
description: STM32L0xx Flash Options
instructions: ASoB0AIqF9E/SIFpDyISAhFDgWE9ScFgPUnBYD1JQWE9SUFhwGnAAgbUPUg7SQFgBiFBYDtJgWAAIHBHASgB0AIoCNEwSEFoBCIRQ0FgQWgBIhFDQWAAIHBHNEgySQFgM0lBYDNJgWCBYCdIMkksSgDgEWCDadsH+9GBaQkFCQ8G0IFpDyISAhFDgWEBIHBHACBwRwAgcEcBIHBH8LUmTR9OGUwUIQdoE2ifQgLQA2AA4DVgo2nbB/vRo2kbBRsPBtCgaQ8hCQIIQ6BhASDwvQAdCR8SHQAp5dEAIPC98LUVTA9NCE4UIQNoF2i7QgnRAOAsYLNp2wf70QAdCR8SHQAp8dHwvQAAACACQO/Nq4kFBAMCyNnq+ycmJSRVVQAAADAAQP8PAACqAFX/AAD4H3CAj38AAP//qqoAAAAAAAA=
pc_init: 0x1
pc_uninit: 0x3d
pc_program_page: 0x9d
pc_erase_sector: 0x95
pc_erase_all: 0x5b
data_section_offset: 0x13c
flash_properties:
address_range:
start: 0x1ff80000
end: 0x1ff80014
page_size: 0xc
erased_byte_value: 0xff
program_page_timeout: 3000
erase_sector_timeout: 3000
sectors:
- size: 0x14
address: 0x0
- name: stm32l010x4_eeprom
description: STM32L010 128 Byte Data EEPROM
instructions: ASoB0AIqE9E3SIFpDyISAhFDgWE1ScFgNUnBYMBpwAIG1DVIM0kBYAYhQWAzSYFgACBwRwEoAdACKATRKkhBaAEiEUNBYAAgcEfwtf8hATElTP8wAApiaAACTQAqQ2JgYmgQJzpDYmAlSiNLACYGYADgGmCmafYH+9GmaTYFNg8G0KBpDyEJAghDoGEBIPC9AB0JH+rRYGioQ2BgYGi4Q2BgACDwvQEgcEfwtf8jATMNTv8xCQp0aAkCnEN0YBBMDU0K4BdoB2AA4Cxgt2n/B/vRAB0JHxIdGx8AKQHQACvw0QAg8L0AAAAgAkDvzauJBQQDAlVVAAAAMABA/w8AAKqqAAAAAAAA
pc_init: 0x1
pc_uninit: 0x35
pc_program_page: 0xab
pc_erase_sector: 0x4b
data_section_offset: 0x104
flash_properties:
address_range:
start: 0x8080000
end: 0x8080080
page_size: 0x80
erased_byte_value: 0x0
program_page_timeout: 500
erase_sector_timeout: 500
sectors:
- size: 0x80
address: 0x0
- name: stm32l010xb_eeprom
description: STM32L010 512 Byte Data EEPROM
instructions: ASoB0AIqE9E3SIFpDyISAhFDgWE1ScFgNUnBYMBpwAIG1DVIM0kBYAYhQWAzSYFgACBwRwEoAdACKATRKkhBaAEiEUNBYAAgcEfwtf8hATElTP8wAApiaAACTQAqQ2JgYmgQJzpDYmAlSiNLACYGYADgGmCmafYH+9GmaTYFNg8G0KBpDyEJAghDoGEBIPC9AB0JH+rRYGioQ2BgYGi4Q2BgACDwvQEgcEfwtf8jATMNTv8xCQp0aAkCnEN0YBBMDU0K4BdoB2AA4Cxgt2n/B/vRAB0JHxIdGx8AKQHQACvw0QAg8L0AAAAgAkDvzauJBQQDAlVVAAAAMABA/w8AAKqqAAAAAAAA
pc_init: 0x1
pc_uninit: 0x35
pc_program_page: 0xab
pc_erase_sector: 0x4b
data_section_offset: 0x104
flash_properties:
address_range:
start: 0x8080000
end: 0x8080200
page_size: 0x100
erased_byte_value: 0x0
program_page_timeout: 500
erase_sector_timeout: 500
sectors:
- size: 0x200
address: 0x0
- name: stm32l03_4x_eeprom
description: STM32L0 1KB Data EEPROM
instructions: ASoB0AIqE9E3SIFpDyISAhFDgWE1ScFgNUnBYMBpwAIG1DVIM0kBYAYhQWAzSYFgACBwRwEoAdACKATRKkhBaAEiEUNBYAAgcEfwtf8hATElTP8wAApiaAACTQAqQ2JgYmgQJzpDYmAlSiNLACYGYADgGmCmafYH+9GmaTYFNg8G0KBpDyEJAghDoGEBIPC9AB0JH+rRYGioQ2BgYGi4Q2BgACDwvQEgcEfwtf8jATMNTv8xCQp0aAkCnEN0YBBMDU0K4BdoB2AA4Cxgt2n/B/vRAB0JHxIdGx8AKQHQACvw0QAg8L0AAAAgAkDvzauJBQQDAlVVAAAAMABA/w8AAKqqAAAAAAAA
pc_init: 0x1
pc_uninit: 0x35
pc_program_page: 0xab
pc_erase_sector: 0x4b
data_section_offset: 0x104
flash_properties:
address_range:
start: 0x8080000
end: 0x8080400
page_size: 0x100
erased_byte_value: 0x0
program_page_timeout: 500
erase_sector_timeout: 500
sectors:
- size: 0x400
address: 0x0
- name: stm32l05_6x_eeprom
description: STM32L0 2 KByte Data EEPROM
instructions: ASoB0AIqE9E3SIFpDyISAhFDgWE1ScFgNUnBYMBpwAIG1DVIM0kBYAYhQWAzSYFgACBwRwEoAdACKATRKkhBaAEiEUNBYAAgcEfwtf8hATElTP8wAApiaAACTQAqQ2JgYmgQJzpDYmAlSiNLACYGYADgGmCmafYH+9GmaTYFNg8G0KBpDyEJAghDoGEBIPC9AB0JH+rRYGioQ2BgYGi4Q2BgACDwvQEgcEfwtf8jATMNTv8xCQp0aAkCnEN0YBBMDU0K4BdoB2AA4Cxgt2n/B/vRAB0JHxIdGx8AKQHQACvw0QAg8L0AAAAgAkDvzauJBQQDAlVVAAAAMABA/w8AAKqqAAAAAAAA
pc_init: 0x1
pc_uninit: 0x35
pc_program_page: 0xab
pc_erase_sector: 0x4b
data_section_offset: 0x104
flash_properties:
address_range:
start: 0x8080000
end: 0x8080800
page_size: 0x100
erased_byte_value: 0x0
program_page_timeout: 500
erase_sector_timeout: 500
sectors:
- size: 0x800
address: 0x0
- name: stm32l07x_64_eeprom
description: STM32L0 2 KByte Data EEPROM
instructions: ASoB0AIqE9E3SIFpDyISAhFDgWE1ScFgNUnBYMBpwAIG1DVIM0kBYAYhQWAzSYFgACBwRwEoAdACKATRKkhBaAEiEUNBYAAgcEfwtf8hATElTP8wAApiaAACTQAqQ2JgYmgQJzpDYmAlSiNLACYGYADgGmCmafYH+9GmaTYFNg8G0KBpDyEJAghDoGEBIPC9AB0JH+rRYGioQ2BgYGi4Q2BgACDwvQEgcEfwtf8jATMNTv8xCQp0aAkCnEN0YBBMDU0K4BdoB2AA4Cxgt2n/B/vRAB0JHxIdGx8AKQHQACvw0QAg8L0AAAAgAkDvzauJBQQDAlVVAAAAMABA/w8AAKqqAAAAAAAA
pc_init: 0x1
pc_uninit: 0x35
pc_program_page: 0xab
pc_erase_sector: 0x4b
data_section_offset: 0x104
flash_properties:
address_range:
start: 0x8080c00
end: 0x8081800
page_size: 0x100
erased_byte_value: 0x0
program_page_timeout: 500
erase_sector_timeout: 500
sectors:
- size: 0xc00
address: 0x0
- name: stm32l07_8x_eeprom
description: STM32L0 2 KByte Data EEPROM
instructions: ASoB0AIqE9E3SIFpDyISAhFDgWE1ScFgNUnBYMBpwAIG1DVIM0kBYAYhQWAzSYFgACBwRwEoAdACKATRKkhBaAEiEUNBYAAgcEfwtf8hATElTP8wAApiaAACTQAqQ2JgYmgQJzpDYmAlSiNLACYGYADgGmCmafYH+9GmaTYFNg8G0KBpDyEJAghDoGEBIPC9AB0JH+rRYGioQ2BgYGi4Q2BgACDwvQEgcEfwtf8jATMNTv8xCQp0aAkCnEN0YBBMDU0K4BdoB2AA4Cxgt2n/B/vRAB0JHxIdGx8AKQHQACvw0QAg8L0AAAAgAkDvzauJBQQDAlVVAAAAMABA/w8AAKqqAAAAAAAA
pc_init: 0x1
pc_uninit: 0x35
pc_program_page: 0xab
pc_erase_sector: 0x4b
data_section_offset: 0x104
flash_properties:
address_range:
start: 0x8080000
end: 0x8081800
page_size: 0x100
erased_byte_value: 0x0
program_page_timeout: 500
erase_sector_timeout: 500
sectors:
- size: 0xc00
address: 0x0
- size: 0xc00
address: 0xc00