--- a/Eeprom_MX25R8035F.c | |
+++ b//Eeprom_MX25R8035F.c | |
@@ -146,7 +146,7 @@ static uint32_t EEPROM_ReadStatusReq(void); | |
static uint32_t EEPROM_ReadIDReq(void); | |
static uint32_t EEPROM_ReadResReq(void); | |
- | |
+static uint8_t EEPROM_isBusyPrivate(void); | |
#define MX25_SR_WIP_POS 0 /* Write In Progress */ | |
#define MX25_SR_WEL_POS 1 /* Write Enable Latch */ | |
@@ -316,7 +316,7 @@ ee_err_t EEPROM_Init(void) | |
{ | |
initialized = 1; | |
} | |
- while (EEPROM_isBusy()); | |
+ while (EEPROM_isBusyPrivate()); | |
} | |
return status; | |
@@ -366,7 +366,7 @@ ee_err_t EEPROM_ChipErase(void) | |
/* Wait for idle state : check before operation in order to let previous | |
* operation terminate rather than blocking */ | |
- while (EEPROM_isBusy()); | |
+ while (EEPROM_isBusyPrivate()); | |
/* Enable write */ | |
EEPROM_WriteEnable(); | |
@@ -410,7 +410,7 @@ ee_err_t EEPROM_EraseBlock(uint32_t Addr, uint32_t block_size) | |
OSA_SemaphoreWait(mExtEepromSemaphoreId, osaWaitForever_c); | |
- while (EEPROM_isBusy()); | |
+ while (EEPROM_isBusyPrivate()); | |
EEPROM_WriteEnable(); | |
@@ -485,7 +485,7 @@ ee_err_t EEPROM_EraseArea(uint32_t *Addr, int32_t *size, bool non_blocking) | |
{ | |
OSA_SemaphoreWait(mExtEepromSemaphoreId, osaWaitForever_c); | |
- if (non_blocking && EEPROM_isBusy()) | |
+ if (non_blocking && EEPROM_isBusyPrivate()) | |
{ | |
status = ee_busy; | |
OSA_SemaphorePost(mExtEepromSemaphoreId); | |
@@ -679,7 +679,7 @@ void EEPROM_SetRead(void) | |
OSA_SemaphoreWait(mExtEepromSemaphoreId, osaWaitForever_c); | |
- while (EEPROM_isBusy()); | |
+ while (EEPROM_isBusyPrivate()); | |
/* Set start address */ | |
SPIFI_SetCommandAddress(SPIFI, FSL_FEATURE_SPIFI_START_ADDR ); | |
@@ -714,7 +714,7 @@ ee_err_t EEPROM_ReadData(uint16_t NoOfBytes, uint32_t Addr, uint8_t *inbuf) | |
OSA_SemaphoreWait(mExtEepromSemaphoreId, osaWaitForever_c); | |
- while (EEPROM_isBusy()); | |
+ while (EEPROM_isBusyPrivate()); | |
/* Set start address */ | |
SPIFI_SetCommandAddress(SPIFI, FSL_FEATURE_SPIFI_START_ADDR + Addr); | |
@@ -750,7 +750,12 @@ ee_err_t EEPROM_ReadData(uint16_t NoOfBytes, uint32_t Addr, uint8_t *inbuf) | |
********************************************************************************** */ | |
uint8_t EEPROM_isBusy(void) | |
{ | |
- return (EEPROM_ReadStatusReq() & EEPROM_BUSY_FLAG_MASK) == EEPROM_BUSY_FLAG_MASK; | |
+ uint8_t res = 0; | |
+ | |
+ OSA_SemaphoreWait(mExtEepromSemaphoreId, osaWaitForever_c); | |
+ res = EEPROM_isBusyPrivate(); | |
+ OSA_SemaphorePost(mExtEepromSemaphoreId); | |
+ return res; | |
} | |
/*! ********************************************************************************* | |
@@ -759,6 +764,11 @@ uint8_t EEPROM_isBusy(void) | |
************************************************************************************* | |
********************************************************************************** */ | |
+static uint8_t EEPROM_isBusyPrivate(void) | |
+{ | |
+ return (EEPROM_ReadStatusReq() & EEPROM_BUSY_FLAG_MASK) == EEPROM_BUSY_FLAG_MASK; | |
+} | |
+ | |
/*! ********************************************************************************* | |
* \brief Read the memory controller status register | |
* | |
@@ -882,6 +892,7 @@ void EepromWritePage(uint32_t NoOfBytes, uint32_t Addr, uint8_t *Outbuf) | |
#endif /* gFlashBlockBitmap_d */ | |
OSA_SemaphoreWait(mExtEepromSemaphoreId, osaWaitForever_c); | |
+ while (EEPROM_isBusyPrivate()); | |
EEPROM_WriteEnable(); | |
SPIFI_SetCommandAddress(SPIFI, Addr + FSL_FEATURE_SPIFI_START_ADDR); | |
@@ -917,12 +928,6 @@ static ee_err_t EEPROM_WritePage(uint32_t NoOfBytes, uint32_t Addr, uint8_t *Out | |
if (NoOfBytes > 0) | |
{ | |
- OSA_SemaphoreWait(mExtEepromSemaphoreId, osaWaitForever_c); | |
- | |
- while (EEPROM_isBusy()); | |
- | |
- OSA_SemaphorePost(mExtEepromSemaphoreId); | |
- | |
EepromWritePage(NoOfBytes, Addr, Outbuf); | |
} | |