Added changes to cpuinfo.h, isa.c and isa-info.c
detect AVX10.1 ISA

include/cpuinfo.h

diff --git a/include/cpuinfo.h b/include/cpuinfo.h
index 9ed5d92..6eb4b8c 100644
--- a/include/cpuinfo.h
+++ b/include/cpuinfo.h
@@ -820,6 +820,7 @@
 	bool avx512vp2intersect;
 	bool avx512_4vnniw;
 	bool avx512_4fmaps;
+	bool avx10_1;
 	bool amx_bf16;
 	bool amx_tile;
 	bool amx_int8;
@@ -1435,6 +1436,14 @@
 #endif
 }
 
+static inline bool cpuinfo_has_x86_avx10_1(void) {
+#if CPUINFO_ARCH_X86 || CPUINFO_ARCH_X86_64
+	return cpuinfo_isa.avx10_1;
+#else
+	return false;
+#endif
+}
+
 static inline bool cpuinfo_has_x86_hle(void) {
 #if CPUINFO_ARCH_X86 || CPUINFO_ARCH_X86_64
 	return cpuinfo_isa.hle;

src/x86/isa.c

diff --git a/src/x86/isa.c b/src/x86/isa.c
index bfd5e77..10da3dc 100644
--- a/src/x86/isa.c
+++ b/src/x86/isa.c
@@ -429,6 +429,11 @@
 	 */
 	isa.avx512f = avx512_regs && !!(structured_feature_info0.ebx & UINT32_C(0x00010000));
 
+    /*
+	 * AVX 10.1 instructions:
+	 */
+    isa.avx10_1 = (structured_feature_info1.edx & UINT32_C(1 << 19));
+	
 	/*
 	 * AVX512PF instructions:
 	 * - Intel: ebx[bit 26] in structured feature info (ecx = 0).

tools/isa-info.c

diff --git a/tools/isa-info.c b/tools/isa-info.c
index 2c40a5e..afb82a0 100644
--- a/tools/isa-info.c
+++ b/tools/isa-info.c
@@ -70,6 +70,10 @@
 	printf("\tAVX512VP2INTERSECT: %s\n", cpuinfo_has_x86_avx512vp2intersect() ? "yes" : "no");
 	printf("\tAVX512_4VNNIW: %s\n", cpuinfo_has_x86_avx512_4vnniw() ? "yes" : "no");
 	printf("\tAVX512_4FMAPS: %s\n", cpuinfo_has_x86_avx512_4fmaps() ? "yes" : "no");
+	
+	//avx10.1 (in future will add other avx10 version)
+	printf("\tAVX10_1: %s\n", cpuinfo_has_x86_avx10_1() ? "yes" : "no");
+
 	printf("\tAMX_BF16: %s\n", cpuinfo_has_x86_amx_bf16() ? "yes" : "no");
 	printf("\tAMX_TILE: %s\n", cpuinfo_has_x86_amx_tile() ? "yes" : "no");
 	printf("\tAMX_INT8: %s\n", cpuinfo_has_x86_amx_int8() ? "yes" : "no");