| commit | a56504a4344cbdb971615252e6433a89ddf9f182 | [log] [tgz] |
|---|---|---|
| author | Ruibin Chang <Ruibin.Chang@ite.com.tw> | Wed Nov 30 10:21:16 2022 +0800 |
| committer | Carles Cufí <carles.cufi@nordicsemi.no> | Thu Dec 01 15:49:37 2022 +0100 |
| tree | f1aa9f0bb29cbd5b67d3aa8e13b272d407b52ee1 | |
| parent | 1d235189d5c85a8de35f25754078d85c2871d025 [diff] |
ITE drivers/pwm/it8xxx2: don't gate pwm clock when set cycle When pwm_it8xxx2_set_cycles() is called, we disable the pwm clock at the beginning and enable it at the end, so there is a more than 1ms pwm low pulse when every time changing the cycle. The low pulse would let some fans go to idle mode, so we don't gate the pwm clock. Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>