commit 0325a3d972afddc1907ca9bafa590d7018d0e788
author Charles E. Youse <charles.youse@intel.com> Fri Jun 28 13:06:37 2019 -0700
committer Anas Nashif <anas.nashif@intel.com> Tue Jul 02 19:30:00 2019 -0400
tree 9f847c7bf81265d7366344ec22185c215cce0d74
parent 15dac5b6ab26ae311d3540f30284e57e29fd2814

arch/x86: eliminate include/arch/x86/irq_controller.h

The MVIC is no longer supported, and only the APIC-based interrupt
subsystem remains. Thus this layer of indirection is unnecessary.

This also corrects an oversight left over from the Jailhouse x2APIC
implementation affecting EOI delivery for direct ISRs only.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>

drivers/interrupt_controller/system_apic.c

diff --git a/drivers/interrupt_controller/system_apic.c b/drivers/interrupt_controller/system_apic.c
index c854fab..2a68ec6 100644
--- a/drivers/interrupt_controller/system_apic.c
+++ b/drivers/interrupt_controller/system_apic.c
@@ -43,7 +43,7 @@
  * @param flags interrupt flags
  *
  */
-void __irq_controller_irq_config(unsigned int vector, unsigned int irq,
+void z_irq_controller_irq_config(unsigned int vector, unsigned int irq,
 				 u32_t flags)
 {
 	__ASSERT(irq <= HARDWARE_IRQ_LIMIT, "invalid irq line");