commit 06a4cd6b2a22b8f320f0744ade786db7237574e4
author Fabrice DJIATSA <fabrice.djiatsa-ext@st.com> Mon Jul 08 13:47:50 2024 +0200
committer Anas Nashif <anas.nashif@intel.com> Fri Jul 12 06:21:09 2024 -0400
tree 99dc175cb45bb67caea5539c6898accb048a4c18
parent 9c516db69c4d1313f19e1405991353dfe9e0127e

Boards: st: nucleo_f303k8: fix documentation information

Fix Flash size and SPI1 MISO pins for nucleo_f303k8 board

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>

boards/st/nucleo_f303k8/doc/index.rst

diff --git a/boards/st/nucleo_f303k8/doc/index.rst b/boards/st/nucleo_f303k8/doc/index.rst
index 1f8ff4a..28d9e27 100644
--- a/boards/st/nucleo_f303k8/doc/index.rst
+++ b/boards/st/nucleo_f303k8/doc/index.rst
@@ -40,7 +40,7 @@
 - ARM |reg| 32-bit Cortex |reg| -M4 CPU with FPU
 - 72 MHz max CPU frequency
 - VDD from 2.0 V to 3.6 V
-- 64 MB Flash
+- 64 KB Flash
 - 12 KB SRAM
 - RTC
 - Advanced-control Timer
@@ -118,7 +118,7 @@
 
 - UART_2 TX/RX : PA2/PA15 (ST-Link Virtual Port Com)
 - I2C1 SCL/SDA : PB7/PB6
-- SPI1 CS/SCK/MISO/MOSI : PA_4/PA_5/PB_4/PA_7
+- SPI1 CS/SCK/MISO/MOSI : PA_4/PA_5/PA_6/PA_7
 - LD2       : PB3
 
 System Clock