driver: clock_control: mspm0: Allow setting SYSOSC clk and restrict MDIV

According to the TI MSPM0 reference manual MDIV must not be set if
SYSOSC is not configured to 4MHz. To make use of this setting, it is
necessary to enable configuring the SYSOSC clock of either 32MHz
(default) or 4MHz with the clock-frequency parameter of the
sysosc node.
If the SYSOSC is configured to run at 4MHz, then the MCLK divider
setting is applied.

Signed-off-by: Philipp Miedl <phmi@bang-olufsen.dk>