| commit | 084c810820f1d0e7862cbc7966b7b037eeefed3f | [log] [tgz] |
|---|---|---|
| author | Gerard Marull-Paretas <gerard@teslabs.com> | Sat Dec 19 11:24:43 2020 +0100 |
| committer | Anas Nashif <anas.nashif@intel.com> | Tue Jan 12 06:49:10 2021 -0500 |
| tree | c45e4d11f7175b240917fc2ef3adf0b545b58dde | |
| parent | 3c1ef8852edebb89ea9122dcb6c783b0c36c7038 [diff] |
drivers: clock_control: add support for PLL3 on STM32 H7 Add support for enabling and configuring PLL3 on STM32 H7 series. PLL3 is used as a clock source by certain peripherals, e.g. LTDC. Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>