drivers: video: stm32_venc: fix coding style
Fix coding style issues in venc video driver.
Signed-off-by: Hugues Fruchet <hugues.fruchet@foss.st.com>
diff --git a/drivers/video/video_stm32_venc.c b/drivers/video/video_stm32_venc.c
index 5b585ea..082ee0b 100644
--- a/drivers/video/video_stm32_venc.c
+++ b/drivers/video/video_stm32_venc.c
@@ -322,26 +322,26 @@
return memcmp(s1, s2, n);
}
-i32 EWLWaitHwRdy(const void *instance, uint32_t *slicesReady)
+i32 EWLWaitHwRdy(const void *instance, uint32_t *slices_ready)
{
struct stm32_venc_ewl *inst = (struct stm32_venc_ewl *)instance;
const struct stm32_venc_config *config = inst->config;
int32_t ret = EWL_HW_WAIT_TIMEOUT;
volatile uint32_t irq_stats;
- uint32_t prevSlicesReady = 0;
+ uint32_t prev_slices_ready = 0;
k_timepoint_t timeout = sys_timepoint_calc(K_MSEC(EWL_TIMEOUT));
uint32_t start = sys_clock_tick_get_32();
__ASSERT_NO_MSG(inst != NULL);
/* check how to clear IRQ flags for VENC */
- uint32_t clrByWrite1 = EWLReadReg(inst, BASE_HWFuse2) & HWCFGIrqClearSupport;
+ uint32_t clr_by_write_1 = EWLReadReg(inst, BASE_HWFuse2) & HWCFGIrqClearSupport;
do {
irq_stats = sys_read32(config->reg + BASE_HEncIRQ);
/* get the number of completed slices from ASIC registers. */
- if (slicesReady != NULL && *slicesReady > prevSlicesReady) {
- *slicesReady = FIELD_GET(NUM_SLICES_READY_MASK,
+ if (slices_ready != NULL && *slices_ready > prev_slices_ready) {
+ *slices_ready = FIELD_GET(NUM_SLICES_READY_MASK,
sys_read32(config->reg + BASE_HEncControl7));
}
@@ -362,7 +362,7 @@
irq_stats &= ~(ASIC_STATUS_SLICE_READY | ASIC_IRQ_LINE);
- if (clrByWrite1 != 0UL) {
+ if (clr_by_write_1 != 0UL) {
clr_stats = ASIC_STATUS_SLICE_READY | ASIC_IRQ_LINE;
} else {
clr_stats = irq_stats;
@@ -373,7 +373,7 @@
break;
}
- if (slicesReady != NULL && *slicesReady > prevSlicesReady) {
+ if (slices_ready != NULL && *slices_ready > prev_slices_ready) {
ret = EWL_OK;
break;
}
@@ -387,8 +387,8 @@
LOG_DBG("encoding = %d ms", k_ticks_to_ms_ceil32(sys_clock_tick_get_32() - start));
- if (slicesReady != NULL) {
- LOG_DBG("slicesReady = %d", *slicesReady);
+ if (slices_ready != NULL) {
+ LOG_DBG("slices_ready = %d", *slices_ready);
}
return EWL_OK;
@@ -554,21 +554,21 @@
static int encoder_start(struct stm32_venc_data *data, struct video_buffer *output)
{
H264EncRet h264ret;
- H264EncIn encIn = {0};
- H264EncOut encOut = {0};
+ H264EncIn enc_in = {0};
+ H264EncOut enc_out = {0};
- encIn.pOutBuf = (uint32_t *)output->buffer;
- encIn.busOutBuf = (uint32_t)encIn.pOutBuf;
- encIn.outBufSize = output->size;
+ enc_in.pOutBuf = (uint32_t *)output->buffer;
+ enc_in.busOutBuf = (uint32_t)enc_in.pOutBuf;
+ enc_in.outBufSize = output->size;
/* create stream */
- h264ret = H264EncStrmStart(data->encoder, &encIn, &encOut);
+ h264ret = H264EncStrmStart(data->encoder, &enc_in, &enc_out);
if (h264ret != H264ENC_OK) {
LOG_ERR("H264EncStrmStart error=%d", h264ret);
return -EIO;
}
- output->bytesused = encOut.streamSize;
+ output->bytesused = enc_out.streamSize;
LOG_DBG("SPS/PPS generated, size= %d", output->bytesused);
data->resync = true;
@@ -578,11 +578,11 @@
static int encoder_end(struct stm32_venc_data *data)
{
- H264EncIn encIn = {0};
- H264EncOut encOut = {0};
+ H264EncIn enc_in = {0};
+ H264EncOut enc_out = {0};
if (data->encoder != NULL) {
- H264EncStrmEnd(data->encoder, &encIn, &encOut);
+ H264EncStrmEnd(data->encoder, &enc_in, &enc_out);
data->encoder = NULL;
}
@@ -595,8 +595,8 @@
H264EncRet h264ret = H264ENC_FRAME_READY;
struct video_buffer *input;
struct video_buffer *output;
- H264EncIn encIn = {0};
- H264EncOut encOut = {0};
+ H264EncIn enc_in = {0};
+ H264EncOut enc_out = {0};
if (k_fifo_is_empty(&data->in_fifo_in) || k_fifo_is_empty(&data->out_fifo_in)) {
/* Encoding deferred to next buffer queueing */
@@ -624,38 +624,38 @@
/* one key frame every seconds */
if ((data->frame_nb % VENC_DEFAULT_FRAMERATE) == 0 || data->resync) {
/* if frame is the first or resync needed: set as intra coded */
- encIn.codingType = H264ENC_INTRA_FRAME;
+ enc_in.codingType = H264ENC_INTRA_FRAME;
} else {
/* if there was a frame previously, set as predicted */
- encIn.timeIncrement = 1;
- encIn.codingType = H264ENC_PREDICTED_FRAME;
+ enc_in.timeIncrement = 1;
+ enc_in.codingType = H264ENC_PREDICTED_FRAME;
}
- encIn.ipf = H264ENC_REFERENCE_AND_REFRESH;
- encIn.ltrf = H264ENC_REFERENCE;
+ enc_in.ipf = H264ENC_REFERENCE_AND_REFRESH;
+ enc_in.ltrf = H264ENC_REFERENCE;
/* set input buffers to structures */
- encIn.busLuma = (ptr_t)input->buffer;
- encIn.busChromaU = (ptr_t)encIn.busLuma + data->in_fmt.width * data->in_fmt.height;
+ enc_in.busLuma = (ptr_t)input->buffer;
+ enc_in.busChromaU = (ptr_t)enc_in.busLuma + data->in_fmt.width * data->in_fmt.height;
- encIn.pOutBuf = (uint32_t *)output->buffer;
- encIn.busOutBuf = (uint32_t)encIn.pOutBuf;
- encIn.outBufSize = output->size;
- encOut.streamSize = 0;
+ enc_in.pOutBuf = (uint32_t *)output->buffer;
+ enc_in.busOutBuf = (uint32_t)enc_in.pOutBuf;
+ enc_in.outBufSize = output->size;
+ enc_out.streamSize = 0;
- h264ret = H264EncStrmEncode(data->encoder, &encIn, &encOut, NULL, NULL, NULL);
- output->bytesused = encOut.streamSize;
- LOG_DBG("output=%p, encOut.streamSize=%d", output, encOut.streamSize);
+ h264ret = H264EncStrmEncode(data->encoder, &enc_in, &enc_out, NULL, NULL, NULL);
+ output->bytesused = enc_out.streamSize;
+ LOG_DBG("output=%p, enc_out.streamSize=%d", output, enc_out.streamSize);
switch (h264ret) {
case H264ENC_FRAME_READY:
/* save stream */
- if (encOut.streamSize == 0) {
+ if (enc_out.streamSize == 0) {
/* Nothing encoded */
data->resync = true;
goto out;
}
- output->bytesused = encOut.streamSize;
+ output->bytesused = enc_out.streamSize;
break;
case H264ENC_FUSE_ERROR:
LOG_ERR("H264EncStrmEncode error=%d", h264ret);
@@ -841,19 +841,19 @@
.irq_config = stm32_venc_irq_config_func,
};
-static void RISAF_Config(void)
+static void risaf_config(void)
{
/* Define and initialize the master configuration structure */
- RIMC_MasterConfig_t RIMC_master = {0};
+ RIMC_MasterConfig_t rimc_master = {0};
/* Enable the clock for the RIFSC (RIF Security Controller) */
__HAL_RCC_RIFSC_CLK_ENABLE();
- RIMC_master.MasterCID = RIF_CID_1;
- RIMC_master.SecPriv = RIF_ATTRIBUTE_SEC | RIF_ATTRIBUTE_PRIV;
+ rimc_master.MasterCID = RIF_CID_1;
+ rimc_master.SecPriv = RIF_ATTRIBUTE_SEC | RIF_ATTRIBUTE_PRIV;
/* Configure the master attributes for the video encoder peripheral (VENC) */
- HAL_RIF_RIMC_ConfigMasterAttributes(RIF_MASTER_INDEX_VENC, &RIMC_master);
+ HAL_RIF_RIMC_ConfigMasterAttributes(RIF_MASTER_INDEX_VENC, &rimc_master);
/* Set the secure and privileged attributes for the VENC as a slave */
HAL_RIF_RISC_SetSlaveSecureAttributes(RIF_RISC_PERIPH_INDEX_VENC,
@@ -890,7 +890,7 @@
/* Run IRQ init */
config->irq_config(dev);
- RISAF_Config();
+ risaf_config();
LOG_DBG("CPU frequency : %d", HAL_RCC_GetCpuClockFreq() / 1000000);
LOG_DBG("sysclk frequency : %d", HAL_RCC_GetSysClockFreq() / 1000000);
