| commit | 0d7bdbc87602f08b042dcd7124ba28f9ae4c9541 | [log] [tgz] |
|---|---|---|
| author | Daniel Leung <daniel.leung@intel.com> | Fri Dec 11 13:55:00 2020 -0800 |
| committer | Andrew Boie <andrewboie@gmail.com> | Tue Jan 05 10:31:45 2021 -0800 |
| tree | 892290d93d9f5a25d363b94c68b33f7d1a75ce6a | |
| parent | e36ef3e302ab267b0c8a94b1ec7300d8786ba75a [diff] |
xtensa: use highest available EPC/EPS regs in restore context There may be Xtensa SoCs which don't have high enough interrupt levels for EPC6/EPS6 to exist in _restore_context. So changes these to those which should be available according to the ISA config file. Fixes #30126 Signed-off-by: Daniel Leung <daniel.leung@intel.com>