drivers: interrupt_controller: Refactor GIC configurations
The current GIC configuration scheme is designed to support only one
specific type and version of GIC (i.e. GIC-400 that implements the
GICv2 interface).
This commit adds a set of GIC version configuration symbols that can
be selected by the SoC configuration to specify which version of GIC
interface is implemented in the SoC.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
diff --git a/drivers/interrupt_controller/Kconfig b/drivers/interrupt_controller/Kconfig
index eae6f63..b07c68f 100644
--- a/drivers/interrupt_controller/Kconfig
+++ b/drivers/interrupt_controller/Kconfig
@@ -39,13 +39,6 @@
help
IRQ implementation for LiteX VexRiscv
-config GIC
- bool "ARM Generic Interrupt Controller (GIC)"
- depends on CPU_CORTEX_R
- help
- The ARM Generic Interrupt Controller works with Cortex-A and
- Cortex-R processors.
-
source "drivers/interrupt_controller/Kconfig.multilevel"
source "drivers/interrupt_controller/Kconfig.loapic"
@@ -60,4 +53,6 @@
source "drivers/interrupt_controller/Kconfig.sam0"
+source "drivers/interrupt_controller/Kconfig.gic"
+
endmenu
diff --git a/drivers/interrupt_controller/Kconfig.gic b/drivers/interrupt_controller/Kconfig.gic
new file mode 100644
index 0000000..bff602d
--- /dev/null
+++ b/drivers/interrupt_controller/Kconfig.gic
@@ -0,0 +1,39 @@
+# ARM Generic Interrupt Controller (GIC) configuration
+
+# Copyright (c) 2019 Stephanos Ioannidis <root@stephanos.io>
+# SPDX-License-Identifier: Apache-2.0
+
+if CPU_CORTEX
+
+config GIC
+ bool
+
+config GIC_V1
+ bool
+ select GIC
+ help
+ The ARM Generic Interrupt Controller v1 (e.g. PL390) works with the
+ ARM Cortex-family processors.
+
+config GIC_V2
+ bool
+ select GIC
+ help
+ The ARM Generic Interrupt Controller v2 (e.g. GIC-400) works with the
+ ARM Cortex-family processors.
+
+config GIC_V3
+ bool
+ select GIC
+ help
+ The ARM Generic Interrupt Controller v3 (e.g. GIC-500 and GIC-600)
+ works with the ARM Cortex-family processors.
+
+config GIC_VER
+ int
+ depends on GIC
+ default 1 if GIC_V1
+ default 2 if GIC_V2
+ default 3 if GIC_V3
+
+endif # CPU_CORTEX
diff --git a/soc/arm/xilinx_zynqmp/Kconfig.soc b/soc/arm/xilinx_zynqmp/Kconfig.soc
index cb0a41a..9ce2180 100644
--- a/soc/arm/xilinx_zynqmp/Kconfig.soc
+++ b/soc/arm/xilinx_zynqmp/Kconfig.soc
@@ -4,6 +4,6 @@
config SOC_XILINX_ZYNQMP
bool "Xilinx ZynqMP"
select CPU_CORTEX_R5
- select GIC
+ select GIC_V1
select MULTI_LEVEL_INTERRUPTS
select 2ND_LEVEL_INTERRUPTS
