commit 132ab922a88bd160177edf8fb28ea36a59d39050
author Felipe Neves <ryukokki.felipe@gmail.com> Mon Jun 14 11:19:33 2021 -0300
committer Anas Nashif <anas.nashif@intel.com> Wed Jul 07 20:58:50 2021 -0400
tree 6d44b1df1dd197a4b59695ebc5064cef54e22d35
parent c23b46a78a0a3917e7583ae6fbc0d4e545f2beac

drivers: timer: esp32c3: add esp32c3 systimer driver to CODEOWNERS

Also added maintainer to the entry

Signed-off-by: Felipe Neves <ryukokki.felipe@gmail.com>
Signed-off-by: Felipe Neves <felipe.neves@espressif.com>

drivers/timer/esp32c3_sys_timer.c

diff --git a/drivers/timer/esp32c3_sys_timer.c b/drivers/timer/esp32c3_sys_timer.c
index 59bc2e8..b4ab627 100644
--- a/drivers/timer/esp32c3_sys_timer.c
+++ b/drivers/timer/esp32c3_sys_timer.c
@@ -21,44 +21,46 @@
 
 static void sys_timer_isr(const void *arg)
 {
-    ARG_UNUSED(arg);
-    systimer_ll_clear_alarm_int(SYSTIMER_ALARM_0);
-    sys_clock_announce(1);
+	ARG_UNUSED(arg);
+	systimer_ll_clear_alarm_int(SYSTIMER_ALARM_0);
+	sys_clock_announce(1);
 }
 
 int sys_clock_driver_init(const struct device *dev)
 {
-    ARG_UNUSED(dev);
+	ARG_UNUSED(dev);
 
-    esp32c3_rom_intr_matrix_set(0, ETS_SYSTIMER_TARGET0_EDGE_INTR_SOURCE, SYS_TIMER_CPU_IRQ);
-    IRQ_CONNECT(SYS_TIMER_CPU_IRQ, 0, sys_timer_isr, NULL, 0);
-    irq_enable(SYS_TIMER_CPU_IRQ);
+	esp32c3_rom_intr_matrix_set(0,
+		ETS_SYSTIMER_TARGET0_EDGE_INTR_SOURCE,
+		SYS_TIMER_CPU_IRQ);
+	IRQ_CONNECT(SYS_TIMER_CPU_IRQ, 0, sys_timer_isr, NULL, 0);
+	irq_enable(SYS_TIMER_CPU_IRQ);
 
-    systimer_hal_init();
-    systimer_hal_connect_alarm_counter(SYSTIMER_ALARM_0, SYSTIMER_COUNTER_1);
-    systimer_hal_enable_counter(SYSTIMER_COUNTER_1);
-    systimer_hal_counter_can_stall_by_cpu(SYSTIMER_COUNTER_1, 0, true);
-    systimer_hal_set_alarm_period(SYSTIMER_ALARM_0, 
-        CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC / CONFIG_SYS_CLOCK_TICKS_PER_SEC);
-    systimer_hal_select_alarm_mode(SYSTIMER_ALARM_0, SYSTIMER_ALARM_MODE_PERIOD);
-    systimer_hal_enable_alarm_int(SYSTIMER_ALARM_0);
+	systimer_hal_init();
+	systimer_hal_connect_alarm_counter(SYSTIMER_ALARM_0, SYSTIMER_COUNTER_1);
+	systimer_hal_enable_counter(SYSTIMER_COUNTER_1);
+	systimer_hal_counter_can_stall_by_cpu(SYSTIMER_COUNTER_1, 0, true);
+	systimer_hal_set_alarm_period(SYSTIMER_ALARM_0,
+		CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC / CONFIG_SYS_CLOCK_TICKS_PER_SEC);
+	systimer_hal_select_alarm_mode(SYSTIMER_ALARM_0, SYSTIMER_ALARM_MODE_PERIOD);
+	systimer_hal_enable_alarm_int(SYSTIMER_ALARM_0);
 
-    return 0;
+	return 0;
 }
 
 void sys_clock_set_timeout(int32_t ticks, bool idle)
 {
-    ARG_UNUSED(idle);
-    ARG_UNUSED(ticks);
+	ARG_UNUSED(idle);
+	ARG_UNUSED(ticks);
 }
 
 uint32_t sys_clock_elapsed(void)
 {
-    /* Tickless is not supported yet */
-    return 0;
+	/* Tickless is not supported yet */
+	return 0;
 }
 
 uint32_t sys_clock_cycle_get_32(void)
 {
-    return systimer_ll_get_counter_value_low(SYSTIMER_COUNTER_1);
+	return systimer_ll_get_counter_value_low(SYSTIMER_COUNTER_1);
 }