| commit | 2a8cfca4cf70dcf68dc297dd95d824d64a47c755 | [log] [tgz] |
|---|---|---|
| author | Jean-Paul Etienne <fractalclone@gmail.com> | Wed Jan 11 00:24:30 2017 +0100 |
| committer | Andrew Boie <andrew.p.boie@intel.com> | Fri Jan 13 19:55:05 2017 +0000 |
| tree | effdc9c005b945af1b18a10d8c0ea7134b3c7e88 | |
| parent | c76abeeae515b92ffcca477604199289a4c4704f [diff] |
riscv32: added support for the pulpino soc pulpino soc has custom-extended riscv ISA that is accounted for if CONFIG_RISCV_GENERIC_TOOLCHAIN is not set. (ex: bit manipulation asm opcodes) Change-Id: I4dafc4ebc2fedcc4eb6a3dedd0412816afea6004 Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>