dts: arm: rpi_pico: add dt bindings for pwm
Add devicetree bindings for pwm peripheral using pinctrl
Signed-off-by: Joep Buruma <burumaj50@gmail.com>
diff --git a/dts/arm/rpi_pico/rp2040.dtsi b/dts/arm/rpi_pico/rp2040.dtsi
index 639fb3d..6f33d67 100644
--- a/dts/arm/rpi_pico/rp2040.dtsi
+++ b/dts/arm/rpi_pico/rp2040.dtsi
@@ -143,6 +143,18 @@
label = "USBD";
status = "disabled";
};
+
+ pwm: pwm@40050000 {
+ compatible = "raspberrypi,pico-pwm";
+ reg = <0x40050000 DT_SIZE_K(4)>;
+ resets = <&reset RPI_PICO_RESETS_RESET_PWM>;
+ clocks = <&system_clk>;
+ interrupts = <4 RPI_PICO_DEFAULT_IRQ_PRIORITY>;
+ interrupt-names = "PWM_IRQ_WRAP";
+ label = "PWM_CTRL_0";
+ status = "disabled";
+ #pwm-cells = <3>;
+ };
};
};
diff --git a/dts/bindings/pwm/raspberrypi,pico-pwm.yaml b/dts/bindings/pwm/raspberrypi,pico-pwm.yaml
new file mode 100644
index 0000000..7011124
--- /dev/null
+++ b/dts/bindings/pwm/raspberrypi,pico-pwm.yaml
@@ -0,0 +1,129 @@
+# Copyright (c) 2022, Joep Buruma
+# SPDX-License-Identifier: Apache-2.0
+
+description: Raspberry Pi Pico PWM
+
+compatible: "raspberrypi,pico-pwm"
+
+include: [pwm-controller.yaml, pinctrl-device.yaml, reset-device.yaml, base.yaml]
+
+properties:
+ reg:
+ required: true
+
+ interrupts:
+ required: true
+
+ divider-int-0:
+ type: int
+ required: false
+ default: 1
+ description: |
+ The integral part of the divider for pwm slice 0.
+ This number should be in the range 1 - 255. Defaults
+ to 1, the same as the RESET value.
+
+ divider-frac-0:
+ type: int
+ required: false
+ default: 0
+ description: |
+ The fractional part of the divider for pwm slice 0.
+ This number should be in the range 0 - 15. Defaults
+ to 0, the same as the RESET value.
+
+ divider-int-1:
+ type: int
+ required: false
+ default: 1
+ description: See divider-int-0 for help
+
+ divider-frac-1:
+ type: int
+ required: false
+ default: 0
+ description: See divider-frac-0 for help
+
+ divider-int-2:
+ type: int
+ required: false
+ default: 1
+ description: See divider-int-0 for help
+
+ divider-frac-2:
+ type: int
+ required: false
+ default: 0
+ description: See divider-frac-0 for help
+
+ divider-int-3:
+ type: int
+ required: false
+ default: 1
+ description: See divider-int-0 for help
+
+ divider-frac-3:
+ type: int
+ required: false
+ default: 0
+ description: See divider-frac-0 for help
+
+ divider-int-4:
+ type: int
+ required: false
+ default: 1
+ description: See divider-int-0 for help
+
+ divider-frac-4:
+ type: int
+ required: false
+ default: 0
+ description: See divider-frac-0 for help
+
+ divider-int-5:
+ type: int
+ required: false
+ default: 1
+ description: See divider-int-0 for help
+
+ divider-frac-5:
+ type: int
+ required: false
+ default: 0
+ description: See divider-frac-0 for help
+
+ divider-int-6:
+ type: int
+ required: false
+ default: 1
+ description: See divider-int-0 for help
+
+ divider-frac-6:
+ type: int
+ required: false
+ default: 0
+ description: See divider-frac-0 for help
+
+ divider-int-7:
+ type: int
+ required: false
+ default: 1
+ description: See divider-int-0 for help
+
+ divider-frac-7:
+ type: int
+ required: false
+ default: 0
+ description: See divider-frac-0 for help
+
+ "#pwm-cells":
+ const: 3
+
+pwm-cells:
+# The rpi pico pwm peripheral is divided in 8 slices with an individual
+# clock setting and two output channels. The pwm channels are mapped the
+# following way PWM_CH0_A is addressed as <&pwm 0 PWM_FLAGS>, PWM_CH0B
+# is <&pwm 1 PMW_FLAGS>, PWM_CH1_A si <&pwm 2 PWM_FLAGS> and so on.
+ - channel
+ - period
+ - flags
diff --git a/include/zephyr/dt-bindings/pinctrl/rpi-pico-rp2040-pinctrl.h b/include/zephyr/dt-bindings/pinctrl/rpi-pico-rp2040-pinctrl.h
index f07bbd9..29633cf 100644
--- a/include/zephyr/dt-bindings/pinctrl/rpi-pico-rp2040-pinctrl.h
+++ b/include/zephyr/dt-bindings/pinctrl/rpi-pico-rp2040-pinctrl.h
@@ -90,4 +90,35 @@
#define I2C0_SDA_P28 RP2040_PINMUX(28, RP2_PINCTRL_GPIO_FUNC_I2C)
#define I2C0_SCL_P29 RP2040_PINMUX(29, RP2_PINCTRL_GPIO_FUNC_I2C)
+#define PWM_0A_P0 RP2040_PINMUX(0, RP2_PINCTRL_GPIO_FUNC_PWM)
+#define PWM_0B_P1 RP2040_PINMUX(1, RP2_PINCTRL_GPIO_FUNC_PWM)
+#define PWM_1A_P2 RP2040_PINMUX(2, RP2_PINCTRL_GPIO_FUNC_PWM)
+#define PWM_1B_P3 RP2040_PINMUX(3, RP2_PINCTRL_GPIO_FUNC_PWM)
+#define PWM_2A_P4 RP2040_PINMUX(4, RP2_PINCTRL_GPIO_FUNC_PWM)
+#define PWM_2B_P5 RP2040_PINMUX(5, RP2_PINCTRL_GPIO_FUNC_PWM)
+#define PWM_3A_P6 RP2040_PINMUX(6, RP2_PINCTRL_GPIO_FUNC_PWM)
+#define PWM_3B_P7 RP2040_PINMUX(7, RP2_PINCTRL_GPIO_FUNC_PWM)
+#define PWM_4A_P8 RP2040_PINMUX(8, RP2_PINCTRL_GPIO_FUNC_PWM)
+#define PWM_4B_P9 RP2040_PINMUX(9, RP2_PINCTRL_GPIO_FUNC_PWM)
+#define PWM_5A_P10 RP2040_PINMUX(10, RP2_PINCTRL_GPIO_FUNC_PWM)
+#define PWM_5B_P11 RP2040_PINMUX(11, RP2_PINCTRL_GPIO_FUNC_PWM)
+#define PWM_6A_P12 RP2040_PINMUX(12, RP2_PINCTRL_GPIO_FUNC_PWM)
+#define PWM_6B_P13 RP2040_PINMUX(13, RP2_PINCTRL_GPIO_FUNC_PWM)
+#define PWM_7A_P14 RP2040_PINMUX(14, RP2_PINCTRL_GPIO_FUNC_PWM)
+#define PWM_7B_P15 RP2040_PINMUX(15, RP2_PINCTRL_GPIO_FUNC_PWM)
+#define PWM_0A_P16 RP2040_PINMUX(16, RP2_PINCTRL_GPIO_FUNC_PWM)
+#define PWM_0B_P17 RP2040_PINMUX(17, RP2_PINCTRL_GPIO_FUNC_PWM)
+#define PWM_1A_P18 RP2040_PINMUX(18, RP2_PINCTRL_GPIO_FUNC_PWM)
+#define PWM_1B_P19 RP2040_PINMUX(19, RP2_PINCTRL_GPIO_FUNC_PWM)
+#define PWM_2A_P20 RP2040_PINMUX(20, RP2_PINCTRL_GPIO_FUNC_PWM)
+#define PWM_2B_P21 RP2040_PINMUX(21, RP2_PINCTRL_GPIO_FUNC_PWM)
+#define PWM_3A_P22 RP2040_PINMUX(22, RP2_PINCTRL_GPIO_FUNC_PWM)
+#define PWM_3B_P22 RP2040_PINMUX(23, RP2_PINCTRL_GPIO_FUNC_PWM)
+#define PWM_4A_P24 RP2040_PINMUX(24, RP2_PINCTRL_GPIO_FUNC_PWM)
+#define PWM_4B_P25 RP2040_PINMUX(25, RP2_PINCTRL_GPIO_FUNC_PWM)
+#define PWM_5A_P26 RP2040_PINMUX(26, RP2_PINCTRL_GPIO_FUNC_PWM)
+#define PWM_5B_P27 RP2040_PINMUX(27, RP2_PINCTRL_GPIO_FUNC_PWM)
+#define PWM_6A_P28 RP2040_PINMUX(28, RP2_PINCTRL_GPIO_FUNC_PWM)
+#define PWM_6B_P29 RP2040_PINMUX(29, RP2_PINCTRL_GPIO_FUNC_PWM)
+
#endif /* __RP2040_PINCTRL_H__ */
