| commit | 2e7831562ac69831f63b9d5d0b72f35b0d38c801 | [log] [tgz] |
|---|---|---|
| author | Daniel Leung <daniel.leung@intel.com> | Thu Apr 09 17:39:10 2020 -0700 |
| committer | Anas Nashif <anas.nashif@intel.com> | Fri Apr 10 07:48:33 2020 -0400 |
| tree | 00272536354040a04752b903a6a99fb3b09fcb13 | |
| parent | fd1d93e552df23006b50ba2d0ddae6337f505c3e [diff] |
samples: mec15xxevb_assy6853/pm: shorten wait after deep sleep The origin for sleeping for 3ms after coming out of deep sleep was to wait for PLL to lock so that UART would not send garbage characters due to incorrect clock. In the deep sleep code, it spins to wait for the PLL to lock so there is no need to wait for 3ms in the app. So shorten it like other busy wait. Signed-off-by: Daniel Leung <daniel.leung@intel.com>