samples: mec15xxevb_assy6853/pm: shorten wait after deep sleep
The origin for sleeping for 3ms after coming out of deep sleep
was to wait for PLL to lock so that UART would not send
garbage characters due to incorrect clock. In the deep sleep
code, it spins to wait for the PLL to lock so there is no need
to wait for 3ms in the app. So shorten it like other busy wait.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
diff --git a/samples/boards/mec15xxevb_assy6853/power_management/src/power_mgmt.c b/samples/boards/mec15xxevb_assy6853/power_management/src/power_mgmt.c
index 4d11198..056250a 100644
--- a/samples/boards/mec15xxevb_assy6853/power_management/src/power_mgmt.c
+++ b/samples/boards/mec15xxevb_assy6853/power_management/src/power_mgmt.c
@@ -187,7 +187,7 @@
k_msleep(CONFIG_SYS_PM_MIN_RESIDENCY_DEEP_SLEEP_1 + 500);
- k_busy_wait(3000);
+ k_busy_wait(100);
if (use_logging) {
LOG_INF("Wake from Deep Sleep\n");
@@ -233,7 +233,7 @@
k_msleep(CONFIG_SYS_PM_MIN_RESIDENCY_DEEP_SLEEP_1 + 1000);
- k_busy_wait(3000);
+ k_busy_wait(100);
if (use_logging) {
LOG_INF("Wake from Deep Sleep\n");
