dts: arm: st: stm32c0: remove U suffix from "resets" in DTSI

STM32 reset controller position argument provided to STM32_RESET()
macro sometime uses an unnecessary U suffix. Remove these useless
suffixes for this series for consistency among STM32 SoCs DTSI files.

No functional change.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
diff --git a/dts/arm/st/c0/stm32c0.dtsi b/dts/arm/st/c0/stm32c0.dtsi
index c2c90b1..71adc9e 100644
--- a/dts/arm/st/c0/stm32c0.dtsi
+++ b/dts/arm/st/c0/stm32c0.dtsi
@@ -303,7 +303,7 @@
 			compatible = "st,stm32-usart", "st,stm32-uart";
 			reg = <0x40013800 0x400>;
 			clocks = <&rcc STM32_CLOCK(APB1_2, 14)>;
-			resets = <&rctl STM32_RESET(APB1H, 14U)>;
+			resets = <&rctl STM32_RESET(APB1H, 14)>;
 			interrupts = <27 0>;
 			status = "disabled";
 		};
@@ -312,7 +312,7 @@
 			compatible = "st,stm32-usart", "st,stm32-uart";
 			reg = <0x40004400 0x400>;
 			clocks = <&rcc STM32_CLOCK(APB1, 17)>;
-			resets = <&rctl STM32_RESET(APB1L, 17U)>;
+			resets = <&rctl STM32_RESET(APB1L, 17)>;
 			interrupts = <28 0>;
 			status = "disabled";
 		};
@@ -322,7 +322,7 @@
 			reg = <0x40012C00 0x400>;
 			clocks = <&rcc STM32_CLOCK(APB1_2, 11)>,
 				 <&rcc STM32_SRC_TIMPCLK1 NO_SEL>;
-			resets = <&rctl STM32_RESET(APB1H, 11U)>;
+			resets = <&rctl STM32_RESET(APB1H, 11)>;
 			interrupts = <13 0>, <14 0>;
 			interrupt-names = "brk_up_trg_com", "cc";
 			st,prescaler = <0>;
@@ -345,7 +345,7 @@
 			reg = <0x40000400 0x400>;
 			clocks = <&rcc STM32_CLOCK(APB1, 1)>,
 				 <&rcc STM32_SRC_TIMPCLK1 NO_SEL>;
-			resets = <&rctl STM32_RESET(APB1L, 1U)>;
+			resets = <&rctl STM32_RESET(APB1L, 1)>;
 			interrupts = <16 0>;
 			interrupt-names = "global";
 			st,prescaler = <0>;
@@ -368,7 +368,7 @@
 			reg = <0x40002000 0x400>;
 			clocks = <&rcc STM32_CLOCK(APB1_2, 15)>,
 				 <&rcc STM32_SRC_TIMPCLK1 NO_SEL>;
-			resets = <&rctl STM32_RESET(APB1H, 15U)>;
+			resets = <&rctl STM32_RESET(APB1H, 15)>;
 			interrupts = <19 0>;
 			interrupt-names = "global";
 			st,prescaler = <0>;
@@ -391,7 +391,7 @@
 			reg = <0x40014400 0x400>;
 			clocks = <&rcc STM32_CLOCK(APB1_2, 17)>,
 				 <&rcc STM32_SRC_TIMPCLK1 NO_SEL>;
-			resets = <&rctl STM32_RESET(APB1H, 17U)>;
+			resets = <&rctl STM32_RESET(APB1H, 17)>;
 			interrupts = <21 0>;
 			interrupt-names = "global";
 			st,prescaler = <0>;
@@ -414,7 +414,7 @@
 			reg = <0x40014800 0x400>;
 			clocks = <&rcc STM32_CLOCK(APB1_2, 18)>,
 				 <&rcc STM32_SRC_TIMPCLK1 NO_SEL>;
-			resets = <&rctl STM32_RESET(APB1H, 18U)>;
+			resets = <&rctl STM32_RESET(APB1H, 18)>;
 			interrupts = <22 0>;
 			interrupt-names = "global";
 			st,prescaler = <0>;