dts: add devicetree support for ifx edge devices
- add devicetree support for pse84 devices
Signed-off-by: McAtee Maxwell <maxwell.mcatee@infineon.com>
diff --git a/dts/arm/infineon/edge/mpns/pse812gms2dfnc4b.dtsi b/dts/arm/infineon/edge/mpns/pse812gms2dfnc4b.dtsi
new file mode 100644
index 0000000..4174f68
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse812gms2dfnc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.wlb-154.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse812gms2dfnc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse812gms2dfnc4b_s.dtsi
new file mode 100644
index 0000000..cabfe97
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse812gms2dfnc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.wlb-154_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse812gms4dfnc4b.dtsi b/dts/arm/infineon/edge/mpns/pse812gms4dfnc4b.dtsi
new file mode 100644
index 0000000..4174f68
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse812gms4dfnc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.wlb-154.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse812gms4dfnc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse812gms4dfnc4b_s.dtsi
new file mode 100644
index 0000000..cabfe97
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse812gms4dfnc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.wlb-154_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse812gos2dfnc4b.dtsi b/dts/arm/infineon/edge/mpns/pse812gos2dfnc4b.dtsi
new file mode 100644
index 0000000..4174f68
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse812gos2dfnc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.wlb-154.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse812gos2dfnc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse812gos2dfnc4b_s.dtsi
new file mode 100644
index 0000000..cabfe97
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse812gos2dfnc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.wlb-154_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse812gos4dfnc4b.dtsi b/dts/arm/infineon/edge/mpns/pse812gos4dfnc4b.dtsi
new file mode 100644
index 0000000..4174f68
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse812gos4dfnc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.wlb-154.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse812gos4dfnc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse812gos4dfnc4b_s.dtsi
new file mode 100644
index 0000000..cabfe97
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse812gos4dfnc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.wlb-154_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse813gms2dbzc4b.dtsi b/dts/arm/infineon/edge/mpns/pse813gms2dbzc4b.dtsi
new file mode 100644
index 0000000..364b43c
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse813gms2dbzc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse813gms2dbzc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse813gms2dbzc4b_s.dtsi
new file mode 100644
index 0000000..1d4dbfb
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse813gms2dbzc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse813gms2dbzq3b.dtsi b/dts/arm/infineon/edge/mpns/pse813gms2dbzq3b.dtsi
new file mode 100644
index 0000000..a7b4f86
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse813gms2dbzq3b.dtsi
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
+
+/ {
+ cpu@0 {
+ clock-frequency = <320000000>;
+ };
+};
diff --git a/dts/arm/infineon/edge/mpns/pse813gms2dbzq3b_s.dtsi b/dts/arm/infineon/edge/mpns/pse813gms2dbzq3b_s.dtsi
new file mode 100644
index 0000000..5dfe547
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse813gms2dbzq3b_s.dtsi
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
+
+/ {
+ cpu@0 {
+ clock-frequency = <320000000>;
+ };
+};
diff --git a/dts/arm/infineon/edge/mpns/pse813gms4dbzc4b.dtsi b/dts/arm/infineon/edge/mpns/pse813gms4dbzc4b.dtsi
new file mode 100644
index 0000000..364b43c
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse813gms4dbzc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse813gms4dbzc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse813gms4dbzc4b_s.dtsi
new file mode 100644
index 0000000..1d4dbfb
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse813gms4dbzc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse813gms4dbzq3b.dtsi b/dts/arm/infineon/edge/mpns/pse813gms4dbzq3b.dtsi
new file mode 100644
index 0000000..a7b4f86
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse813gms4dbzq3b.dtsi
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
+
+/ {
+ cpu@0 {
+ clock-frequency = <320000000>;
+ };
+};
diff --git a/dts/arm/infineon/edge/mpns/pse813gms4dbzq3b_s.dtsi b/dts/arm/infineon/edge/mpns/pse813gms4dbzq3b_s.dtsi
new file mode 100644
index 0000000..5dfe547
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse813gms4dbzq3b_s.dtsi
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
+
+/ {
+ cpu@0 {
+ clock-frequency = <320000000>;
+ };
+};
diff --git a/dts/arm/infineon/edge/mpns/pse813gos2dbzc4b.dtsi b/dts/arm/infineon/edge/mpns/pse813gos2dbzc4b.dtsi
new file mode 100644
index 0000000..364b43c
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse813gos2dbzc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse813gos2dbzc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse813gos2dbzc4b_s.dtsi
new file mode 100644
index 0000000..1d4dbfb
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse813gos2dbzc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse813gos2dbzq3b.dtsi b/dts/arm/infineon/edge/mpns/pse813gos2dbzq3b.dtsi
new file mode 100644
index 0000000..a7b4f86
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse813gos2dbzq3b.dtsi
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
+
+/ {
+ cpu@0 {
+ clock-frequency = <320000000>;
+ };
+};
diff --git a/dts/arm/infineon/edge/mpns/pse813gos2dbzq3b_s.dtsi b/dts/arm/infineon/edge/mpns/pse813gos2dbzq3b_s.dtsi
new file mode 100644
index 0000000..5dfe547
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse813gos2dbzq3b_s.dtsi
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
+
+/ {
+ cpu@0 {
+ clock-frequency = <320000000>;
+ };
+};
diff --git a/dts/arm/infineon/edge/mpns/pse813gos4dbzc4a.dtsi b/dts/arm/infineon/edge/mpns/pse813gos4dbzc4a.dtsi
new file mode 100644
index 0000000..364b43c
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse813gos4dbzc4a.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse813gos4dbzc4a_s.dtsi b/dts/arm/infineon/edge/mpns/pse813gos4dbzc4a_s.dtsi
new file mode 100644
index 0000000..1d4dbfb
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse813gos4dbzc4a_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse813gos4dbzc4b.dtsi b/dts/arm/infineon/edge/mpns/pse813gos4dbzc4b.dtsi
new file mode 100644
index 0000000..364b43c
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse813gos4dbzc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse813gos4dbzc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse813gos4dbzc4b_s.dtsi
new file mode 100644
index 0000000..1d4dbfb
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse813gos4dbzc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse813gos4dbzq3b.dtsi b/dts/arm/infineon/edge/mpns/pse813gos4dbzq3b.dtsi
new file mode 100644
index 0000000..a7b4f86
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse813gos4dbzq3b.dtsi
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
+
+/ {
+ cpu@0 {
+ clock-frequency = <320000000>;
+ };
+};
diff --git a/dts/arm/infineon/edge/mpns/pse813gos4dbzq3b_s.dtsi b/dts/arm/infineon/edge/mpns/pse813gos4dbzq3b_s.dtsi
new file mode 100644
index 0000000..5dfe547
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse813gos4dbzq3b_s.dtsi
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
+
+/ {
+ cpu@0 {
+ clock-frequency = <320000000>;
+ };
+};
diff --git a/dts/arm/infineon/edge/mpns/pse822gms2dfnc4b.dtsi b/dts/arm/infineon/edge/mpns/pse822gms2dfnc4b.dtsi
new file mode 100644
index 0000000..4174f68
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse822gms2dfnc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.wlb-154.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse822gms2dfnc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse822gms2dfnc4b_s.dtsi
new file mode 100644
index 0000000..cabfe97
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse822gms2dfnc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.wlb-154_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse822gms4dfnc4b.dtsi b/dts/arm/infineon/edge/mpns/pse822gms4dfnc4b.dtsi
new file mode 100644
index 0000000..4174f68
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse822gms4dfnc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.wlb-154.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse822gms4dfnc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse822gms4dfnc4b_s.dtsi
new file mode 100644
index 0000000..cabfe97
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse822gms4dfnc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.wlb-154_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse822gos2dfnc4b.dtsi b/dts/arm/infineon/edge/mpns/pse822gos2dfnc4b.dtsi
new file mode 100644
index 0000000..4174f68
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse822gos2dfnc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.wlb-154.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse822gos2dfnc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse822gos2dfnc4b_s.dtsi
new file mode 100644
index 0000000..cabfe97
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse822gos2dfnc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.wlb-154_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse822gos4dfnc4b.dtsi b/dts/arm/infineon/edge/mpns/pse822gos4dfnc4b.dtsi
new file mode 100644
index 0000000..4174f68
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse822gos4dfnc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.wlb-154.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse822gos4dfnc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse822gos4dfnc4b_s.dtsi
new file mode 100644
index 0000000..cabfe97
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse822gos4dfnc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.wlb-154_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse823gms2dbzc4b.dtsi b/dts/arm/infineon/edge/mpns/pse823gms2dbzc4b.dtsi
new file mode 100644
index 0000000..364b43c
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse823gms2dbzc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse823gms2dbzc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse823gms2dbzc4b_s.dtsi
new file mode 100644
index 0000000..1d4dbfb
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse823gms2dbzc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse823gms2dbzq3b.dtsi b/dts/arm/infineon/edge/mpns/pse823gms2dbzq3b.dtsi
new file mode 100644
index 0000000..a7b4f86
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse823gms2dbzq3b.dtsi
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
+
+/ {
+ cpu@0 {
+ clock-frequency = <320000000>;
+ };
+};
diff --git a/dts/arm/infineon/edge/mpns/pse823gms2dbzq3b_s.dtsi b/dts/arm/infineon/edge/mpns/pse823gms2dbzq3b_s.dtsi
new file mode 100644
index 0000000..5dfe547
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse823gms2dbzq3b_s.dtsi
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
+
+/ {
+ cpu@0 {
+ clock-frequency = <320000000>;
+ };
+};
diff --git a/dts/arm/infineon/edge/mpns/pse823gms4dbzc4b.dtsi b/dts/arm/infineon/edge/mpns/pse823gms4dbzc4b.dtsi
new file mode 100644
index 0000000..364b43c
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse823gms4dbzc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse823gms4dbzc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse823gms4dbzc4b_s.dtsi
new file mode 100644
index 0000000..1d4dbfb
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse823gms4dbzc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse823gms4dbzq3b.dtsi b/dts/arm/infineon/edge/mpns/pse823gms4dbzq3b.dtsi
new file mode 100644
index 0000000..a7b4f86
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse823gms4dbzq3b.dtsi
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
+
+/ {
+ cpu@0 {
+ clock-frequency = <320000000>;
+ };
+};
diff --git a/dts/arm/infineon/edge/mpns/pse823gms4dbzq3b_s.dtsi b/dts/arm/infineon/edge/mpns/pse823gms4dbzq3b_s.dtsi
new file mode 100644
index 0000000..5dfe547
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse823gms4dbzq3b_s.dtsi
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
+
+/ {
+ cpu@0 {
+ clock-frequency = <320000000>;
+ };
+};
diff --git a/dts/arm/infineon/edge/mpns/pse823gos2dbzc4b.dtsi b/dts/arm/infineon/edge/mpns/pse823gos2dbzc4b.dtsi
new file mode 100644
index 0000000..364b43c
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse823gos2dbzc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse823gos2dbzc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse823gos2dbzc4b_s.dtsi
new file mode 100644
index 0000000..1d4dbfb
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse823gos2dbzc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse823gos2dbzq3b.dtsi b/dts/arm/infineon/edge/mpns/pse823gos2dbzq3b.dtsi
new file mode 100644
index 0000000..a7b4f86
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse823gos2dbzq3b.dtsi
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
+
+/ {
+ cpu@0 {
+ clock-frequency = <320000000>;
+ };
+};
diff --git a/dts/arm/infineon/edge/mpns/pse823gos2dbzq3b_s.dtsi b/dts/arm/infineon/edge/mpns/pse823gos2dbzq3b_s.dtsi
new file mode 100644
index 0000000..5dfe547
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse823gos2dbzq3b_s.dtsi
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
+
+/ {
+ cpu@0 {
+ clock-frequency = <320000000>;
+ };
+};
diff --git a/dts/arm/infineon/edge/mpns/pse823gos4dbzc4b.dtsi b/dts/arm/infineon/edge/mpns/pse823gos4dbzc4b.dtsi
new file mode 100644
index 0000000..364b43c
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse823gos4dbzc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse823gos4dbzc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse823gos4dbzc4b_s.dtsi
new file mode 100644
index 0000000..1d4dbfb
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse823gos4dbzc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse823gos4dbzq3b.dtsi b/dts/arm/infineon/edge/mpns/pse823gos4dbzq3b.dtsi
new file mode 100644
index 0000000..a7b4f86
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse823gos4dbzq3b.dtsi
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
+
+/ {
+ cpu@0 {
+ clock-frequency = <320000000>;
+ };
+};
diff --git a/dts/arm/infineon/edge/mpns/pse823gos4dbzq3b_s.dtsi b/dts/arm/infineon/edge/mpns/pse823gos4dbzq3b_s.dtsi
new file mode 100644
index 0000000..5dfe547
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse823gos4dbzq3b_s.dtsi
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
+
+/ {
+ cpu@0 {
+ clock-frequency = <320000000>;
+ };
+};
diff --git a/dts/arm/infineon/edge/mpns/pse832gms2dfnc4b.dtsi b/dts/arm/infineon/edge/mpns/pse832gms2dfnc4b.dtsi
new file mode 100644
index 0000000..4174f68
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse832gms2dfnc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.wlb-154.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse832gms2dfnc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse832gms2dfnc4b_s.dtsi
new file mode 100644
index 0000000..cabfe97
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse832gms2dfnc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.wlb-154_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse832gms4dfnc4b.dtsi b/dts/arm/infineon/edge/mpns/pse832gms4dfnc4b.dtsi
new file mode 100644
index 0000000..4174f68
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse832gms4dfnc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.wlb-154.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse832gms4dfnc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse832gms4dfnc4b_s.dtsi
new file mode 100644
index 0000000..cabfe97
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse832gms4dfnc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.wlb-154_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse832gos2dfnc4b.dtsi b/dts/arm/infineon/edge/mpns/pse832gos2dfnc4b.dtsi
new file mode 100644
index 0000000..4174f68
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse832gos2dfnc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.wlb-154.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse832gos2dfnc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse832gos2dfnc4b_s.dtsi
new file mode 100644
index 0000000..cabfe97
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse832gos2dfnc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.wlb-154_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse832gos4dfnc4b.dtsi b/dts/arm/infineon/edge/mpns/pse832gos4dfnc4b.dtsi
new file mode 100644
index 0000000..4174f68
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse832gos4dfnc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.wlb-154.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse832gos4dfnc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse832gos4dfnc4b_s.dtsi
new file mode 100644
index 0000000..cabfe97
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse832gos4dfnc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.wlb-154_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse833gms2dbzc4b.dtsi b/dts/arm/infineon/edge/mpns/pse833gms2dbzc4b.dtsi
new file mode 100644
index 0000000..364b43c
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse833gms2dbzc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse833gms2dbzc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse833gms2dbzc4b_s.dtsi
new file mode 100644
index 0000000..1d4dbfb
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse833gms2dbzc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse833gms2dbzq3b.dtsi b/dts/arm/infineon/edge/mpns/pse833gms2dbzq3b.dtsi
new file mode 100644
index 0000000..a7b4f86
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse833gms2dbzq3b.dtsi
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
+
+/ {
+ cpu@0 {
+ clock-frequency = <320000000>;
+ };
+};
diff --git a/dts/arm/infineon/edge/mpns/pse833gms2dbzq3b_s.dtsi b/dts/arm/infineon/edge/mpns/pse833gms2dbzq3b_s.dtsi
new file mode 100644
index 0000000..5dfe547
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse833gms2dbzq3b_s.dtsi
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
+
+/ {
+ cpu@0 {
+ clock-frequency = <320000000>;
+ };
+};
diff --git a/dts/arm/infineon/edge/mpns/pse833gms4dbzc4b.dtsi b/dts/arm/infineon/edge/mpns/pse833gms4dbzc4b.dtsi
new file mode 100644
index 0000000..364b43c
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse833gms4dbzc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse833gms4dbzc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse833gms4dbzc4b_s.dtsi
new file mode 100644
index 0000000..1d4dbfb
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse833gms4dbzc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse833gms4dbzq3b.dtsi b/dts/arm/infineon/edge/mpns/pse833gms4dbzq3b.dtsi
new file mode 100644
index 0000000..a7b4f86
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse833gms4dbzq3b.dtsi
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
+
+/ {
+ cpu@0 {
+ clock-frequency = <320000000>;
+ };
+};
diff --git a/dts/arm/infineon/edge/mpns/pse833gms4dbzq3b_s.dtsi b/dts/arm/infineon/edge/mpns/pse833gms4dbzq3b_s.dtsi
new file mode 100644
index 0000000..5dfe547
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse833gms4dbzq3b_s.dtsi
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
+
+/ {
+ cpu@0 {
+ clock-frequency = <320000000>;
+ };
+};
diff --git a/dts/arm/infineon/edge/mpns/pse833gos2dbzc4a.dtsi b/dts/arm/infineon/edge/mpns/pse833gos2dbzc4a.dtsi
new file mode 100644
index 0000000..364b43c
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse833gos2dbzc4a.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse833gos2dbzc4a_s.dtsi b/dts/arm/infineon/edge/mpns/pse833gos2dbzc4a_s.dtsi
new file mode 100644
index 0000000..1d4dbfb
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse833gos2dbzc4a_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse833gos2dbzc4b.dtsi b/dts/arm/infineon/edge/mpns/pse833gos2dbzc4b.dtsi
new file mode 100644
index 0000000..364b43c
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse833gos2dbzc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse833gos2dbzc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse833gos2dbzc4b_s.dtsi
new file mode 100644
index 0000000..1d4dbfb
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse833gos2dbzc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse833gos2dbzq3b.dtsi b/dts/arm/infineon/edge/mpns/pse833gos2dbzq3b.dtsi
new file mode 100644
index 0000000..a7b4f86
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse833gos2dbzq3b.dtsi
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
+
+/ {
+ cpu@0 {
+ clock-frequency = <320000000>;
+ };
+};
diff --git a/dts/arm/infineon/edge/mpns/pse833gos2dbzq3b_s.dtsi b/dts/arm/infineon/edge/mpns/pse833gos2dbzq3b_s.dtsi
new file mode 100644
index 0000000..5dfe547
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse833gos2dbzq3b_s.dtsi
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
+
+/ {
+ cpu@0 {
+ clock-frequency = <320000000>;
+ };
+};
diff --git a/dts/arm/infineon/edge/mpns/pse833gos4dbzc4b.dtsi b/dts/arm/infineon/edge/mpns/pse833gos4dbzc4b.dtsi
new file mode 100644
index 0000000..364b43c
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse833gos4dbzc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse833gos4dbzc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse833gos4dbzc4b_s.dtsi
new file mode 100644
index 0000000..1d4dbfb
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse833gos4dbzc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse833gos4dbzq3b.dtsi b/dts/arm/infineon/edge/mpns/pse833gos4dbzq3b.dtsi
new file mode 100644
index 0000000..a7b4f86
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse833gos4dbzq3b.dtsi
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
+
+/ {
+ cpu@0 {
+ clock-frequency = <320000000>;
+ };
+};
diff --git a/dts/arm/infineon/edge/mpns/pse833gos4dbzq3b_s.dtsi b/dts/arm/infineon/edge/mpns/pse833gos4dbzq3b_s.dtsi
new file mode 100644
index 0000000..5dfe547
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse833gos4dbzq3b_s.dtsi
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
+
+/ {
+ cpu@0 {
+ clock-frequency = <320000000>;
+ };
+};
diff --git a/dts/arm/infineon/edge/mpns/pse845gos2dfmc4b.dtsi b/dts/arm/infineon/edge/mpns/pse845gos2dfmc4b.dtsi
new file mode 100644
index 0000000..a5e5ee7
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse845gos2dfmc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.ewlb-235.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse845gos2dfmc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse845gos2dfmc4b_s.dtsi
new file mode 100644
index 0000000..fa66bba
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse845gos2dfmc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.ewlb-235_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse845gos2dfnc4b.dtsi b/dts/arm/infineon/edge/mpns/pse845gos2dfnc4b.dtsi
new file mode 100644
index 0000000..4174f68
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse845gos2dfnc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.wlb-154.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse845gos2dfnc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse845gos2dfnc4b_s.dtsi
new file mode 100644
index 0000000..cabfe97
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse845gos2dfnc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.wlb-154_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse845gos4dfmc4b.dtsi b/dts/arm/infineon/edge/mpns/pse845gos4dfmc4b.dtsi
new file mode 100644
index 0000000..a5e5ee7
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse845gos4dfmc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.ewlb-235.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse845gos4dfmc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse845gos4dfmc4b_s.dtsi
new file mode 100644
index 0000000..fa66bba
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse845gos4dfmc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.ewlb-235_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse845gos4dfnc4b.dtsi b/dts/arm/infineon/edge/mpns/pse845gos4dfnc4b.dtsi
new file mode 100644
index 0000000..4174f68
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse845gos4dfnc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.wlb-154.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse845gos4dfnc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse845gos4dfnc4b_s.dtsi
new file mode 100644
index 0000000..cabfe97
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse845gos4dfnc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.wlb-154_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse845gps2dfmc4a.dtsi b/dts/arm/infineon/edge/mpns/pse845gps2dfmc4a.dtsi
new file mode 100644
index 0000000..a5e5ee7
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse845gps2dfmc4a.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.ewlb-235.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse845gps2dfmc4a_s.dtsi b/dts/arm/infineon/edge/mpns/pse845gps2dfmc4a_s.dtsi
new file mode 100644
index 0000000..fa66bba
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse845gps2dfmc4a_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.ewlb-235_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse845gps2dfmc4b.dtsi b/dts/arm/infineon/edge/mpns/pse845gps2dfmc4b.dtsi
new file mode 100644
index 0000000..a5e5ee7
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse845gps2dfmc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.ewlb-235.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse845gps2dfmc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse845gps2dfmc4b_s.dtsi
new file mode 100644
index 0000000..fa66bba
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse845gps2dfmc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.ewlb-235_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse845gps2dfnc4a.dtsi b/dts/arm/infineon/edge/mpns/pse845gps2dfnc4a.dtsi
new file mode 100644
index 0000000..4174f68
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse845gps2dfnc4a.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.wlb-154.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse845gps2dfnc4a_s.dtsi b/dts/arm/infineon/edge/mpns/pse845gps2dfnc4a_s.dtsi
new file mode 100644
index 0000000..cabfe97
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse845gps2dfnc4a_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.wlb-154_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse845gps2dfnc4b.dtsi b/dts/arm/infineon/edge/mpns/pse845gps2dfnc4b.dtsi
new file mode 100644
index 0000000..4174f68
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse845gps2dfnc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.wlb-154.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse845gps2dfnc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse845gps2dfnc4b_s.dtsi
new file mode 100644
index 0000000..cabfe97
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse845gps2dfnc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.wlb-154_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse845gps4dfmc4b.dtsi b/dts/arm/infineon/edge/mpns/pse845gps4dfmc4b.dtsi
new file mode 100644
index 0000000..a5e5ee7
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse845gps4dfmc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.ewlb-235.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse845gps4dfmc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse845gps4dfmc4b_s.dtsi
new file mode 100644
index 0000000..fa66bba
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse845gps4dfmc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.ewlb-235_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse845gps4dfnc4b.dtsi b/dts/arm/infineon/edge/mpns/pse845gps4dfnc4b.dtsi
new file mode 100644
index 0000000..4174f68
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse845gps4dfnc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.wlb-154.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse845gps4dfnc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse845gps4dfnc4b_s.dtsi
new file mode 100644
index 0000000..cabfe97
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse845gps4dfnc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.wlb-154_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse846gos2dbzc4b.dtsi b/dts/arm/infineon/edge/mpns/pse846gos2dbzc4b.dtsi
new file mode 100644
index 0000000..364b43c
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse846gos2dbzc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse846gos2dbzc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse846gos2dbzc4b_s.dtsi
new file mode 100644
index 0000000..1d4dbfb
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse846gos2dbzc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse846gos2dbzq3b.dtsi b/dts/arm/infineon/edge/mpns/pse846gos2dbzq3b.dtsi
new file mode 100644
index 0000000..a7b4f86
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse846gos2dbzq3b.dtsi
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
+
+/ {
+ cpu@0 {
+ clock-frequency = <320000000>;
+ };
+};
diff --git a/dts/arm/infineon/edge/mpns/pse846gos2dbzq3b_s.dtsi b/dts/arm/infineon/edge/mpns/pse846gos2dbzq3b_s.dtsi
new file mode 100644
index 0000000..5dfe547
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse846gos2dbzq3b_s.dtsi
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
+
+/ {
+ cpu@0 {
+ clock-frequency = <320000000>;
+ };
+};
diff --git a/dts/arm/infineon/edge/mpns/pse846gos4dbzc4b.dtsi b/dts/arm/infineon/edge/mpns/pse846gos4dbzc4b.dtsi
new file mode 100644
index 0000000..364b43c
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse846gos4dbzc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse846gos4dbzc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse846gos4dbzc4b_s.dtsi
new file mode 100644
index 0000000..1d4dbfb
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse846gos4dbzc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse846gos4dbzq3b.dtsi b/dts/arm/infineon/edge/mpns/pse846gos4dbzq3b.dtsi
new file mode 100644
index 0000000..a7b4f86
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse846gos4dbzq3b.dtsi
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
+
+/ {
+ cpu@0 {
+ clock-frequency = <320000000>;
+ };
+};
diff --git a/dts/arm/infineon/edge/mpns/pse846gos4dbzq3b_s.dtsi b/dts/arm/infineon/edge/mpns/pse846gos4dbzq3b_s.dtsi
new file mode 100644
index 0000000..5dfe547
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse846gos4dbzq3b_s.dtsi
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
+
+/ {
+ cpu@0 {
+ clock-frequency = <320000000>;
+ };
+};
diff --git a/dts/arm/infineon/edge/mpns/pse846gps2dbzc4a.dtsi b/dts/arm/infineon/edge/mpns/pse846gps2dbzc4a.dtsi
new file mode 100644
index 0000000..364b43c
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse846gps2dbzc4a.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse846gps2dbzc4a_s.dtsi b/dts/arm/infineon/edge/mpns/pse846gps2dbzc4a_s.dtsi
new file mode 100644
index 0000000..1d4dbfb
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse846gps2dbzc4a_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse846gps2dbzc4b.dtsi b/dts/arm/infineon/edge/mpns/pse846gps2dbzc4b.dtsi
new file mode 100644
index 0000000..364b43c
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse846gps2dbzc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse846gps2dbzc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse846gps2dbzc4b_s.dtsi
new file mode 100644
index 0000000..1d4dbfb
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse846gps2dbzc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse846gps2dbzq3a.dtsi b/dts/arm/infineon/edge/mpns/pse846gps2dbzq3a.dtsi
new file mode 100644
index 0000000..a7b4f86
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse846gps2dbzq3a.dtsi
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
+
+/ {
+ cpu@0 {
+ clock-frequency = <320000000>;
+ };
+};
diff --git a/dts/arm/infineon/edge/mpns/pse846gps2dbzq3a_s.dtsi b/dts/arm/infineon/edge/mpns/pse846gps2dbzq3a_s.dtsi
new file mode 100644
index 0000000..5dfe547
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse846gps2dbzq3a_s.dtsi
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
+
+/ {
+ cpu@0 {
+ clock-frequency = <320000000>;
+ };
+};
diff --git a/dts/arm/infineon/edge/mpns/pse846gps2dbzq3b.dtsi b/dts/arm/infineon/edge/mpns/pse846gps2dbzq3b.dtsi
new file mode 100644
index 0000000..a7b4f86
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse846gps2dbzq3b.dtsi
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
+
+/ {
+ cpu@0 {
+ clock-frequency = <320000000>;
+ };
+};
diff --git a/dts/arm/infineon/edge/mpns/pse846gps2dbzq3b_s.dtsi b/dts/arm/infineon/edge/mpns/pse846gps2dbzq3b_s.dtsi
new file mode 100644
index 0000000..5dfe547
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse846gps2dbzq3b_s.dtsi
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
+
+/ {
+ cpu@0 {
+ clock-frequency = <320000000>;
+ };
+};
diff --git a/dts/arm/infineon/edge/mpns/pse846gps4dbzc4a.dtsi b/dts/arm/infineon/edge/mpns/pse846gps4dbzc4a.dtsi
new file mode 100644
index 0000000..364b43c
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse846gps4dbzc4a.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse846gps4dbzc4a_s.dtsi b/dts/arm/infineon/edge/mpns/pse846gps4dbzc4a_s.dtsi
new file mode 100644
index 0000000..1d4dbfb
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse846gps4dbzc4a_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse846gps4dbzc4b.dtsi b/dts/arm/infineon/edge/mpns/pse846gps4dbzc4b.dtsi
new file mode 100644
index 0000000..364b43c
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse846gps4dbzc4b.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse846gps4dbzc4b_s.dtsi b/dts/arm/infineon/edge/mpns/pse846gps4dbzc4b_s.dtsi
new file mode 100644
index 0000000..1d4dbfb
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse846gps4dbzc4b_s.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
diff --git a/dts/arm/infineon/edge/mpns/pse846gps4dbzq3b.dtsi b/dts/arm/infineon/edge/mpns/pse846gps4dbzq3b.dtsi
new file mode 100644
index 0000000..a7b4f86
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse846gps4dbzq3b.dtsi
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220.dtsi"
+
+/ {
+ cpu@0 {
+ clock-frequency = <320000000>;
+ };
+};
diff --git a/dts/arm/infineon/edge/mpns/pse846gps4dbzq3b_s.dtsi b/dts/arm/infineon/edge/mpns/pse846gps4dbzq3b_s.dtsi
new file mode 100644
index 0000000..5dfe547
--- /dev/null
+++ b/dts/arm/infineon/edge/mpns/pse846gps4dbzq3b_s.dtsi
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../pse84/pse84.bga-220_s.dtsi"
+
+/ {
+ cpu@0 {
+ clock-frequency = <320000000>;
+ };
+};
diff --git a/dts/arm/infineon/edge/pse84/clock_source_def.h b/dts/arm/infineon/edge/pse84/clock_source_def.h
new file mode 100644
index 0000000..13cf1c4
--- /dev/null
+++ b/dts/arm/infineon/edge/pse84/clock_source_def.h
@@ -0,0 +1,9 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#define CLK_SOURCE_IHO 0U
+#define CLK_SOURCE_PILO 0x113U
diff --git a/dts/arm/infineon/edge/pse84/pse84.bga-220.dtsi b/dts/arm/infineon/edge/pse84/pse84.bga-220.dtsi
new file mode 100644
index 0000000..20c7dd1
--- /dev/null
+++ b/dts/arm/infineon/edge/pse84/pse84.bga-220.dtsi
@@ -0,0 +1,1910 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/dt-bindings/gpio/gpio.h>
+#include <zephyr/dt-bindings/pinctrl/ifx_cat1-pinctrl.h>
+#include "pse84.dtsi"
+
+/ {
+ soc {
+ pinctrl: pinctrl@42800000 {
+ /* i3c_i3c_scl */
+ /omit-if-no-ref/ p3_0_i3c0_i3c_scl: p3_0_i3c0_i3c_scl {
+ pinmux = <DT_CAT1_PINMUX(3, 0, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* i3c_i3c_sda */
+ /omit-if-no-ref/ p3_1_i3c0_i3c_sda: p3_1_i3c0_i3c_sda {
+ pinmux = <DT_CAT1_PINMUX(3, 1, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* scb_i2c_scl */
+ /omit-if-no-ref/ p6_5_scb2_i2c_scl: p6_5_scb2_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p8_0_scb0_i2c_scl: p8_0_scb0_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(8, 0, HSIOM_SEL_DS_3)>;
+ };
+
+ /omit-if-no-ref/ p9_3_scb1_i2c_scl: p9_3_scb1_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p10_0_scb4_i2c_scl: p10_0_scb4_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(10, 0, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p11_0_scb6_i2c_scl: p11_0_scb6_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(11, 0, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p13_1_scb7_i2c_scl: p13_1_scb7_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p14_4_scb8_i2c_scl: p14_4_scb8_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p15_0_scb9_i2c_scl: p15_0_scb9_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p16_0_scb10_i2c_scl: p16_0_scb10_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p17_0_scb5_i2c_scl: p17_0_scb5_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p17_2_scb11_i2c_scl: p17_2_scb11_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p21_6_scb3_i2c_scl: p21_6_scb3_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(21, 6, HSIOM_SEL_ACT_5)>;
+ };
+
+ /* scb_i2c_sda */
+ /omit-if-no-ref/ p6_7_scb2_i2c_sda: p6_7_scb2_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p8_1_scb0_i2c_sda: p8_1_scb0_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(8, 1, HSIOM_SEL_DS_3)>;
+ };
+
+ /omit-if-no-ref/ p9_2_scb1_i2c_sda: p9_2_scb1_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p10_1_scb4_i2c_sda: p10_1_scb4_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(10, 1, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p11_1_scb6_i2c_sda: p11_1_scb6_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(11, 1, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p13_2_scb7_i2c_sda: p13_2_scb7_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p14_3_scb8_i2c_sda: p14_3_scb8_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p15_1_scb9_i2c_sda: p15_1_scb9_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p16_1_scb10_i2c_sda: p16_1_scb10_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p17_1_scb5_i2c_sda: p17_1_scb5_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p17_3_scb11_i2c_sda: p17_3_scb11_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p21_5_scb3_i2c_sda: p21_5_scb3_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(21, 5, HSIOM_SEL_ACT_5)>;
+ };
+
+ /* scb_spi_m_clk */
+ /omit-if-no-ref/ p6_5_scb2_spi_m_clk: p6_5_scb2_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_0_scb0_spi_m_clk: p8_0_scb0_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(8, 0, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_3_scb1_spi_m_clk: p9_3_scb1_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p10_1_scb4_spi_m_clk: p10_1_scb4_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(10, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_0_scb6_spi_m_clk: p11_0_scb6_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(11, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_1_scb7_spi_m_clk: p13_1_scb7_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_4_scb8_spi_m_clk: p14_4_scb8_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_0_scb9_spi_m_clk: p15_0_scb9_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_0_scb10_spi_m_clk: p16_0_scb10_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_0_scb5_spi_m_clk: p17_0_scb5_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_2_scb11_spi_m_clk: p17_2_scb11_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_6_scb3_spi_m_clk: p21_6_scb3_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(21, 6, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_spi_m_miso */
+ /omit-if-no-ref/ p6_4_scb2_spi_m_miso: p6_4_scb2_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_4_scb0_spi_m_miso: p8_4_scb0_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(8, 4, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_1_scb1_spi_m_miso: p9_1_scb1_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(9, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p10_3_scb4_spi_m_miso: p10_3_scb4_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(10, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_2_scb6_spi_m_miso: p11_2_scb6_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(11, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_3_scb7_spi_m_miso: p13_3_scb7_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(13, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_7_scb8_spi_m_miso: p13_7_scb8_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(13, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_2_scb9_spi_m_miso: p15_2_scb9_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(15, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_2_scb10_spi_m_miso: p16_2_scb10_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(16, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_5_scb5_spi_m_miso: p16_5_scb5_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(16, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_5_scb11_spi_m_miso: p17_5_scb11_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(17, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_4_scb3_spi_m_miso: p21_4_scb3_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(21, 4, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_spi_m_mosi */
+ /omit-if-no-ref/ p6_7_scb2_spi_m_mosi: p6_7_scb2_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_1_scb0_spi_m_mosi: p8_1_scb0_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(8, 1, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_2_scb1_spi_m_mosi: p9_2_scb1_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p10_2_scb4_spi_m_mosi: p10_2_scb4_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(10, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_1_scb6_spi_m_mosi: p11_1_scb6_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(11, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_2_scb7_spi_m_mosi: p13_2_scb7_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_3_scb8_spi_m_mosi: p14_3_scb8_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_1_scb9_spi_m_mosi: p15_1_scb9_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_1_scb10_spi_m_mosi: p16_1_scb10_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_1_scb5_spi_m_mosi: p17_1_scb5_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_3_scb11_spi_m_mosi: p17_3_scb11_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_5_scb3_spi_m_mosi: p21_5_scb3_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(21, 5, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_spi_m_select0 */
+ /omit-if-no-ref/ p0_0_scb3_spi_m_select0: p0_0_scb3_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(0, 0, HSIOM_SEL_ACT_4)>;
+ };
+
+ /omit-if-no-ref/ p6_6_scb2_spi_m_select0: p6_6_scb2_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_2_scb0_spi_m_select0: p8_2_scb0_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(8, 2, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_0_scb1_spi_m_select0: p9_0_scb1_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(9, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p10_4_scb4_spi_m_select0: p10_4_scb4_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(10, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_3_scb6_spi_m_select0: p11_3_scb6_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(11, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_4_scb7_spi_m_select0: p13_4_scb7_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(13, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_7_scb8_spi_m_select0: p14_7_scb8_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(14, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_3_scb9_spi_m_select0: p15_3_scb9_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(15, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_3_scb10_spi_m_select0: p16_3_scb10_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(16, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_6_scb5_spi_m_select0: p16_6_scb5_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(16, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_6_scb11_spi_m_select0: p17_6_scb11_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(17, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_spi_m_select1 */
+ /omit-if-no-ref/ p6_3_scb2_spi_m_select1: p6_3_scb2_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(6, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_3_scb0_spi_m_select1: p8_3_scb0_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(8, 3, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p10_5_scb4_spi_m_select1: p10_5_scb4_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(10, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_4_scb6_spi_m_select1: p11_4_scb6_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(11, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_6_scb7_spi_m_select1: p13_6_scb7_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(13, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_6_scb8_spi_m_select1: p14_6_scb8_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(14, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_4_scb9_spi_m_select1: p15_4_scb9_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(15, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_4_scb10_spi_m_select1: p16_4_scb10_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(16, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_7_scb5_spi_m_select1: p16_7_scb5_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(16, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_7_scb11_spi_m_select1: p17_7_scb11_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(17, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p20_0_scb1_spi_m_select1: p20_0_scb1_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(20, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_7_scb3_spi_m_select1: p21_7_scb3_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(21, 7, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_spi_s_clk */
+ /omit-if-no-ref/ p6_5_scb2_spi_s_clk: p6_5_scb2_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_0_scb0_spi_s_clk: p8_0_scb0_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(8, 0, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_3_scb1_spi_s_clk: p9_3_scb1_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p10_1_scb4_spi_s_clk: p10_1_scb4_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(10, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_0_scb6_spi_s_clk: p11_0_scb6_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(11, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_1_scb7_spi_s_clk: p13_1_scb7_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_4_scb8_spi_s_clk: p14_4_scb8_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_0_scb9_spi_s_clk: p15_0_scb9_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_0_scb10_spi_s_clk: p16_0_scb10_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_0_scb5_spi_s_clk: p17_0_scb5_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_2_scb11_spi_s_clk: p17_2_scb11_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_6_scb3_spi_s_clk: p21_6_scb3_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(21, 6, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_spi_s_miso */
+ /omit-if-no-ref/ p6_4_scb2_spi_s_miso: p6_4_scb2_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_4_scb0_spi_s_miso: p8_4_scb0_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(8, 4, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_1_scb1_spi_s_miso: p9_1_scb1_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(9, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p10_3_scb4_spi_s_miso: p10_3_scb4_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(10, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_2_scb6_spi_s_miso: p11_2_scb6_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(11, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_3_scb7_spi_s_miso: p13_3_scb7_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(13, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_7_scb8_spi_s_miso: p13_7_scb8_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(13, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_2_scb9_spi_s_miso: p15_2_scb9_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(15, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_2_scb10_spi_s_miso: p16_2_scb10_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(16, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_5_scb5_spi_s_miso: p16_5_scb5_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(16, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_5_scb11_spi_s_miso: p17_5_scb11_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(17, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_4_scb3_spi_s_miso: p21_4_scb3_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(21, 4, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_spi_s_mosi */
+ /omit-if-no-ref/ p6_7_scb2_spi_s_mosi: p6_7_scb2_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_1_scb0_spi_s_mosi: p8_1_scb0_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(8, 1, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_2_scb1_spi_s_mosi: p9_2_scb1_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p10_2_scb4_spi_s_mosi: p10_2_scb4_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(10, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_1_scb6_spi_s_mosi: p11_1_scb6_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(11, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_2_scb7_spi_s_mosi: p13_2_scb7_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_3_scb8_spi_s_mosi: p14_3_scb8_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_1_scb9_spi_s_mosi: p15_1_scb9_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_1_scb10_spi_s_mosi: p16_1_scb10_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_1_scb5_spi_s_mosi: p17_1_scb5_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_3_scb11_spi_s_mosi: p17_3_scb11_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_5_scb3_spi_s_mosi: p21_5_scb3_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(21, 5, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_spi_s_select0 */
+ /omit-if-no-ref/ p0_0_scb3_spi_s_select0: p0_0_scb3_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(0, 0, HSIOM_SEL_ACT_4)>;
+ };
+
+ /omit-if-no-ref/ p6_6_scb2_spi_s_select0: p6_6_scb2_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_2_scb0_spi_s_select0: p8_2_scb0_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(8, 2, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_0_scb1_spi_s_select0: p9_0_scb1_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(9, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p10_4_scb4_spi_s_select0: p10_4_scb4_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(10, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_3_scb6_spi_s_select0: p11_3_scb6_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(11, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_4_scb7_spi_s_select0: p13_4_scb7_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(13, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_7_scb8_spi_s_select0: p14_7_scb8_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(14, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_3_scb9_spi_s_select0: p15_3_scb9_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(15, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_3_scb10_spi_s_select0: p16_3_scb10_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(16, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_6_scb5_spi_s_select0: p16_6_scb5_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(16, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_6_scb11_spi_s_select0: p17_6_scb11_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(17, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_spi_s_select1 */
+ /omit-if-no-ref/ p6_3_scb2_spi_s_select1: p6_3_scb2_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(6, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_3_scb0_spi_s_select1: p8_3_scb0_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(8, 3, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p10_5_scb4_spi_s_select1: p10_5_scb4_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(10, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_4_scb6_spi_s_select1: p11_4_scb6_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(11, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_6_scb7_spi_s_select1: p13_6_scb7_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(13, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_6_scb8_spi_s_select1: p14_6_scb8_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(14, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_4_scb9_spi_s_select1: p15_4_scb9_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(15, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_4_scb10_spi_s_select1: p16_4_scb10_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(16, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_7_scb5_spi_s_select1: p16_7_scb5_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(16, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_7_scb11_spi_s_select1: p17_7_scb11_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(17, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p20_0_scb1_spi_s_select1: p20_0_scb1_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(20, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_7_scb3_spi_s_select1: p21_7_scb3_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(21, 7, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_uart_cts */
+ /omit-if-no-ref/ p6_4_scb2_uart_cts: p6_4_scb2_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p9_1_scb1_uart_cts: p9_1_scb1_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(9, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p10_2_scb4_uart_cts: p10_2_scb4_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(10, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p11_2_scb6_uart_cts: p11_2_scb6_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(11, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p13_3_scb7_uart_cts: p13_3_scb7_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(13, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p13_7_scb8_uart_cts: p13_7_scb8_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(13, 7, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p15_2_scb9_uart_cts: p15_2_scb9_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(15, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_2_scb10_uart_cts: p16_2_scb10_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(16, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_5_scb5_uart_cts: p16_5_scb5_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(16, 5, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_5_scb11_uart_cts: p17_5_scb11_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(17, 5, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p21_4_scb3_uart_cts: p21_4_scb3_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(21, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_uart_rts */
+ /omit-if-no-ref/ p6_6_scb2_uart_rts: p6_6_scb2_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p9_0_scb1_uart_rts: p9_0_scb1_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(9, 0, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p10_3_scb4_uart_rts: p10_3_scb4_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(10, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p11_3_scb6_uart_rts: p11_3_scb6_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(11, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p13_4_scb7_uart_rts: p13_4_scb7_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(13, 4, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p14_7_scb8_uart_rts: p14_7_scb8_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(14, 7, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p15_3_scb9_uart_rts: p15_3_scb9_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(15, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_3_scb10_uart_rts: p16_3_scb10_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(16, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_6_scb5_uart_rts: p16_6_scb5_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(16, 6, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_6_scb11_uart_rts: p17_6_scb11_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(17, 6, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p21_7_scb3_uart_rts: p21_7_scb3_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(21, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_uart_rx */
+ /omit-if-no-ref/ p6_5_scb2_uart_rx: p6_5_scb2_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p9_3_scb1_uart_rx: p9_3_scb1_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p10_0_scb4_uart_rx: p10_0_scb4_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(10, 0, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p11_0_scb6_uart_rx: p11_0_scb6_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(11, 0, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p13_1_scb7_uart_rx: p13_1_scb7_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p14_4_scb8_uart_rx: p14_4_scb8_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p15_0_scb9_uart_rx: p15_0_scb9_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_0_scb10_uart_rx: p16_0_scb10_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_0_scb5_uart_rx: p17_0_scb5_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_2_scb11_uart_rx: p17_2_scb11_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p21_6_scb3_uart_rx: p21_6_scb3_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(21, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_uart_tx */
+ /omit-if-no-ref/ p6_7_scb2_uart_tx: p6_7_scb2_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p9_2_scb1_uart_tx: p9_2_scb1_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p10_1_scb4_uart_tx: p10_1_scb4_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(10, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p11_1_scb6_uart_tx: p11_1_scb6_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(11, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p13_2_scb7_uart_tx: p13_2_scb7_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p14_3_scb8_uart_tx: p14_3_scb8_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p15_1_scb9_uart_tx: p15_1_scb9_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_1_scb10_uart_tx: p16_1_scb10_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_1_scb5_uart_tx: p17_1_scb5_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_3_scb11_uart_tx: p17_3_scb11_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p21_5_scb3_uart_tx: p21_5_scb3_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(21, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* sdhc_card_cmd */
+ /omit-if-no-ref/ p7_0_sdhc1_card_cmd: p7_0_sdhc1_card_cmd {
+ pinmux = <DT_CAT1_PINMUX(7, 0, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p21_0_sdhc0_card_cmd: p21_0_sdhc0_card_cmd {
+ pinmux = <DT_CAT1_PINMUX(21, 0, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_dat_3to0 */
+ /omit-if-no-ref/ p7_3_sdhc1_card_dat_3to0: p7_3_sdhc1_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(7, 3, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p7_5_sdhc1_card_dat_3to0: p7_5_sdhc1_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(7, 5, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p7_6_sdhc1_card_dat_3to0: p7_6_sdhc1_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(7, 6, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p7_7_sdhc1_card_dat_3to0: p7_7_sdhc1_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(7, 7, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p12_1_sdhc0_card_dat_3to0: p12_1_sdhc0_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(12, 1, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p12_2_sdhc0_card_dat_3to0: p12_2_sdhc0_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(12, 2, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p12_4_sdhc0_card_dat_3to0: p12_4_sdhc0_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(12, 4, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p12_5_sdhc0_card_dat_3to0: p12_5_sdhc0_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(12, 5, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_dat_7to4 */
+ /omit-if-no-ref/ p6_4_sdhc1_card_dat_7to4: p6_4_sdhc1_card_dat_7to4 {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p6_5_sdhc1_card_dat_7to4: p6_5_sdhc1_card_dat_7to4 {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p6_6_sdhc1_card_dat_7to4: p6_6_sdhc1_card_dat_7to4 {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p6_7_sdhc1_card_dat_7to4: p6_7_sdhc1_card_dat_7to4 {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_detect_n */
+ /omit-if-no-ref/ p7_4_sdhc1_card_detect_n: p7_4_sdhc1_card_detect_n {
+ pinmux = <DT_CAT1_PINMUX(7, 4, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p21_1_sdhc0_card_detect_n: p21_1_sdhc0_card_detect_n {
+ pinmux = <DT_CAT1_PINMUX(21, 1, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_emmc_reset_n */
+ /omit-if-no-ref/
+ p7_2_sdhc1_card_emmc_reset_n: p7_2_sdhc1_card_emmc_reset_n {
+ pinmux = <DT_CAT1_PINMUX(7, 2, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_if_pwr_en */
+ /omit-if-no-ref/ p6_2_sdhc1_card_if_pwr_en: p6_2_sdhc1_card_if_pwr_en {
+ pinmux = <DT_CAT1_PINMUX(6, 2, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p21_4_sdhc0_card_if_pwr_en: p21_4_sdhc0_card_if_pwr_en {
+ pinmux = <DT_CAT1_PINMUX(21, 4, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_mech_write_prot */
+ /omit-if-no-ref/
+ p3_0_sdhc1_card_mech_write_prot: p3_0_sdhc1_card_mech_write_prot {
+ pinmux = <DT_CAT1_PINMUX(3, 0, HSIOM_SEL_ACT_14)>;
+ };
+
+ /omit-if-no-ref/
+ p6_0_sdhc1_card_mech_write_prot: p6_0_sdhc1_card_mech_write_prot {
+ pinmux = <DT_CAT1_PINMUX(6, 0, HSIOM_SEL_ACT_14)>;
+ };
+
+ /omit-if-no-ref/
+ p21_2_sdhc0_card_mech_write_prot: p21_2_sdhc0_card_mech_write_prot {
+ pinmux = <DT_CAT1_PINMUX(21, 2, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_clk_card */
+ /omit-if-no-ref/ p7_1_sdhc1_clk_card: p7_1_sdhc1_clk_card {
+ pinmux = <DT_CAT1_PINMUX(7, 1, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p12_0_sdhc0_clk_card: p12_0_sdhc0_clk_card {
+ pinmux = <DT_CAT1_PINMUX(12, 0, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_io_volt_sel */
+ /omit-if-no-ref/ p6_3_sdhc1_io_volt_sel: p6_3_sdhc1_io_volt_sel {
+ pinmux = <DT_CAT1_PINMUX(6, 3, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p21_3_sdhc0_io_volt_sel: p21_3_sdhc0_io_volt_sel {
+ pinmux = <DT_CAT1_PINMUX(21, 3, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_led_ctrl */
+ /omit-if-no-ref/ p6_1_sdhc1_led_ctrl: p6_1_sdhc1_led_ctrl {
+ pinmux = <DT_CAT1_PINMUX(6, 1, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* PWM tcpwm_line*/
+ /omit-if-no-ref/ p0_0_pwm0_0: p0_0_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(0, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_0_pwm0_1: p1_0_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(1, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_2_pwm0_2: p1_2_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(1, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_4_pwm0_3: p1_4_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(1, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_6_pwm0_4: p1_6_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(1, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p2_0_pwm0_5: p2_0_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(2, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p3_1_pwm0_6: p3_1_pwm0_6 {
+ pinmux = <DT_CAT1_PINMUX(3, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_1_pwm0_7: p4_1_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(4, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_3_pwm0_0: p4_3_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(4, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_5_pwm0_1: p4_5_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(4, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_7_pwm0_2: p4_7_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(4, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_0_pwm0_3: p6_0_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(6, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_2_pwm0_4: p6_2_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(6, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_4_pwm0_5: p6_4_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_6_pwm0_6: p6_6_pwm0_6 {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_0_pwm0_7: p7_0_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(7, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_2_pwm0_0: p7_2_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(7, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_4_pwm0_1: p7_4_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(7, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_6_pwm0_2: p7_6_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(7, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_0_pwm0_3: p8_0_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(8, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_2_pwm0_4: p8_2_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(8, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_4_pwm0_5: p8_4_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(8, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_6_pwm0_6: p8_6_pwm0_6 {
+ pinmux = <DT_CAT1_PINMUX(8, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p9_0_pwm0_7: p9_0_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(9, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p9_1_pwm0_0: p9_1_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(9, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p10_0_pwm0_1: p10_0_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(10, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p10_2_pwm0_2: p10_2_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(10, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p10_4_pwm0_3: p10_4_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(10, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p10_6_pwm0_4: p10_6_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(10, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p11_0_pwm0_5: p11_0_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(11, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p11_2_pwm0_6: p11_2_pwm0_6 {
+ pinmux = <DT_CAT1_PINMUX(11, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p11_4_pwm0_7: p11_4_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(11, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p11_6_pwm0_0: p11_6_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(11, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_0_pwm0_1: p12_0_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(12, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_2_pwm0_2: p12_2_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(12, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_4_pwm0_3: p12_4_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(12, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p13_1_pwm0_4: p13_1_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p13_3_pwm0_5: p13_3_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(13, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p13_6_pwm0_6: p13_6_pwm0_6 {
+ pinmux = <DT_CAT1_PINMUX(13, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p14_1_pwm0_7: p14_1_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(14, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p14_3_pwm0_0: p14_3_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p14_6_pwm0_1: p14_6_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(14, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_0_pwm0_2: p15_0_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_2_pwm0_3: p15_2_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(15, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_4_pwm0_4: p15_4_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(15, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_6_pwm0_5: p15_6_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(15, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_0_pwm0_0: p16_0_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_1_pwm0_1: p16_1_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_2_pwm0_2: p16_2_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(16, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_3_pwm0_3: p16_3_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(16, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_4_pwm0_4: p16_4_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(16, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_5_pwm0_5: p16_5_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(16, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_6_pwm0_6: p16_6_pwm0_6 {
+ pinmux = <DT_CAT1_PINMUX(16, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_7_pwm0_7: p16_7_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(16, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p20_0_pwm0_7: p20_0_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(20, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p20_1_pwm0_0: p20_1_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(20, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p20_2_pwm0_1: p20_2_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(20, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p20_3_pwm0_2: p20_3_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(20, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_0_pwm0_3: p21_0_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(21, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_2_pwm0_4: p21_2_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(21, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_4_pwm0_5: p21_4_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(21, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_6_pwm0_6: p21_6_pwm0_6 {
+ pinmux = <DT_CAT1_PINMUX(21, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p0_0_pwm1_0: p0_0_pwm1_0 {
+ pinmux = <DT_CAT1_PINMUX(0, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_0_pwm1_1: p1_0_pwm1_1 {
+ pinmux = <DT_CAT1_PINMUX(1, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_2_pwm1_2: p1_2_pwm1_2 {
+ pinmux = <DT_CAT1_PINMUX(1, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_4_pwm1_3: p1_4_pwm1_3 {
+ pinmux = <DT_CAT1_PINMUX(1, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_6_pwm1_4: p1_6_pwm1_4 {
+ pinmux = <DT_CAT1_PINMUX(1, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p2_0_pwm1_5: p2_0_pwm1_5 {
+ pinmux = <DT_CAT1_PINMUX(2, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p3_1_pwm1_6: p3_1_pwm1_6 {
+ pinmux = <DT_CAT1_PINMUX(3, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_1_pwm1_7: p4_1_pwm1_7 {
+ pinmux = <DT_CAT1_PINMUX(4, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_3_pwm1_8: p4_3_pwm1_8 {
+ pinmux = <DT_CAT1_PINMUX(4, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_5_pwm1_9: p4_5_pwm1_9 {
+ pinmux = <DT_CAT1_PINMUX(4, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_7_pwm1_10: p4_7_pwm1_10 {
+ pinmux = <DT_CAT1_PINMUX(4, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_0_pwm1_11: p6_0_pwm1_11 {
+ pinmux = <DT_CAT1_PINMUX(6, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_2_pwm1_12: p6_2_pwm1_12 {
+ pinmux = <DT_CAT1_PINMUX(6, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_4_pwm1_13: p6_4_pwm1_13 {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_6_pwm1_14: p6_6_pwm1_14 {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_0_pwm1_15: p7_0_pwm1_15 {
+ pinmux = <DT_CAT1_PINMUX(7, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_2_pwm1_16: p7_2_pwm1_16 {
+ pinmux = <DT_CAT1_PINMUX(7, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_4_pwm1_17: p7_4_pwm1_17 {
+ pinmux = <DT_CAT1_PINMUX(7, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_6_pwm1_18: p7_6_pwm1_18 {
+ pinmux = <DT_CAT1_PINMUX(7, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_0_pwm1_19: p8_0_pwm1_19 {
+ pinmux = <DT_CAT1_PINMUX(8, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_2_pwm1_20: p8_2_pwm1_20 {
+ pinmux = <DT_CAT1_PINMUX(8, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_4_pwm1_21: p8_4_pwm1_21 {
+ pinmux = <DT_CAT1_PINMUX(8, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_6_pwm1_22: p8_6_pwm1_22 {
+ pinmux = <DT_CAT1_PINMUX(8, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p9_2_pwm1_23: p9_2_pwm1_23 {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p9_3_pwm1_0: p9_3_pwm1_0 {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p10_0_pwm1_1: p10_0_pwm1_1 {
+ pinmux = <DT_CAT1_PINMUX(10, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p10_2_pwm1_2: p10_2_pwm1_2 {
+ pinmux = <DT_CAT1_PINMUX(10, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p10_4_pwm1_3: p10_4_pwm1_3 {
+ pinmux = <DT_CAT1_PINMUX(10, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p10_6_pwm1_4: p10_6_pwm1_4 {
+ pinmux = <DT_CAT1_PINMUX(10, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p11_0_pwm1_5: p11_0_pwm1_5 {
+ pinmux = <DT_CAT1_PINMUX(11, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p11_2_pwm1_6: p11_2_pwm1_6 {
+ pinmux = <DT_CAT1_PINMUX(11, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p11_4_pwm1_7: p11_4_pwm1_7 {
+ pinmux = <DT_CAT1_PINMUX(11, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p11_6_pwm1_8: p11_6_pwm1_8 {
+ pinmux = <DT_CAT1_PINMUX(11, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_0_pwm1_9: p12_0_pwm1_9 {
+ pinmux = <DT_CAT1_PINMUX(12, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_2_pwm1_10: p12_2_pwm1_10 {
+ pinmux = <DT_CAT1_PINMUX(12, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_4_pwm1_11: p12_4_pwm1_11 {
+ pinmux = <DT_CAT1_PINMUX(12, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p13_1_pwm1_12: p13_1_pwm1_12 {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p13_3_pwm1_13: p13_3_pwm1_13 {
+ pinmux = <DT_CAT1_PINMUX(13, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p13_6_pwm1_14: p13_6_pwm1_14 {
+ pinmux = <DT_CAT1_PINMUX(13, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p14_1_pwm1_15: p14_1_pwm1_15 {
+ pinmux = <DT_CAT1_PINMUX(14, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p14_3_pwm1_16: p14_3_pwm1_16 {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p14_6_pwm1_17: p14_6_pwm1_17 {
+ pinmux = <DT_CAT1_PINMUX(14, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_0_pwm1_18: p15_0_pwm1_18 {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_2_pwm1_19: p15_2_pwm1_19 {
+ pinmux = <DT_CAT1_PINMUX(15, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_4_pwm1_20: p15_4_pwm1_20 {
+ pinmux = <DT_CAT1_PINMUX(15, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_6_pwm1_21: p15_6_pwm1_21 {
+ pinmux = <DT_CAT1_PINMUX(15, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_0_pwm1_0: p16_0_pwm1_0 {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_1_pwm1_1: p16_1_pwm1_1 {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_2_pwm1_2: p16_2_pwm1_2 {
+ pinmux = <DT_CAT1_PINMUX(16, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_3_pwm1_3: p16_3_pwm1_3 {
+ pinmux = <DT_CAT1_PINMUX(16, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_4_pwm1_4: p16_4_pwm1_4 {
+ pinmux = <DT_CAT1_PINMUX(16, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_5_pwm1_5: p16_5_pwm1_5 {
+ pinmux = <DT_CAT1_PINMUX(16, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_6_pwm1_22: p16_6_pwm1_22 {
+ pinmux = <DT_CAT1_PINMUX(16, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_7_pwm1_23: p16_7_pwm1_23 {
+ pinmux = <DT_CAT1_PINMUX(16, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p20_4_pwm1_7: p20_4_pwm1_7 {
+ pinmux = <DT_CAT1_PINMUX(20, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p20_5_pwm1_8: p20_5_pwm1_8 {
+ pinmux = <DT_CAT1_PINMUX(20, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p20_6_pwm1_9: p20_6_pwm1_9 {
+ pinmux = <DT_CAT1_PINMUX(20, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p20_7_pwm1_10: p20_7_pwm1_10 {
+ pinmux = <DT_CAT1_PINMUX(20, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_0_pwm1_11: p21_0_pwm1_11 {
+ pinmux = <DT_CAT1_PINMUX(21, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_2_pwm1_12: p21_2_pwm1_12 {
+ pinmux = <DT_CAT1_PINMUX(21, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_4_pwm1_13: p21_4_pwm1_13 {
+ pinmux = <DT_CAT1_PINMUX(21, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_6_pwm1_14: p21_6_pwm1_14 {
+ pinmux = <DT_CAT1_PINMUX(21, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /* PWM tcpwm_line_compl*/
+ /omit-if-no-ref/ p0_1_pwm0_0: p0_1_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(0, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_1_pwm0_1: p1_1_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_3_pwm0_2: p1_3_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_5_pwm0_3: p1_5_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_7_pwm0_4: p1_7_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p3_0_pwm0_5: p3_0_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(3, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_0_pwm0_6: p4_0_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_2_pwm0_7: p4_2_pwm0_7_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_4_pwm0_0: p4_4_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_6_pwm0_1: p4_6_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p5_0_pwm0_2: p5_0_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(5, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_1_pwm0_3: p6_1_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_3_pwm0_4: p6_3_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_5_pwm0_5: p6_5_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_7_pwm0_6: p6_7_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_1_pwm0_7: p7_1_pwm0_7_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_3_pwm0_0: p7_3_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_5_pwm0_1: p7_5_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_7_pwm0_2: p7_7_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_1_pwm0_3: p8_1_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_3_pwm0_4: p8_3_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_5_pwm0_5: p8_5_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_7_pwm0_6: p8_7_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p9_2_pwm0_7: p9_2_pwm0_7_compl {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p9_3_pwm0_0: p9_3_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p10_1_pwm0_1: p10_1_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(10, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p10_3_pwm0_2: p10_3_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(10, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p10_5_pwm0_3: p10_5_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(10, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p10_7_pwm0_4: p10_7_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(10, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p11_1_pwm0_5: p11_1_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(11, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p11_3_pwm0_6: p11_3_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(11, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p11_5_pwm0_7: p11_5_pwm0_7_compl {
+ pinmux = <DT_CAT1_PINMUX(11, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p11_7_pwm0_0: p11_7_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(11, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_1_pwm0_1: p12_1_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_3_pwm0_2: p12_3_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_5_pwm0_3: p12_5_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p13_2_pwm0_4: p13_2_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p13_4_pwm0_5: p13_4_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(13, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p13_7_pwm0_6: p13_7_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(13, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p14_2_pwm0_7: p14_2_pwm0_7_compl {
+ pinmux = <DT_CAT1_PINMUX(14, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p14_4_pwm0_0: p14_4_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p14_7_pwm0_1: p14_7_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(14, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_1_pwm0_2: p15_1_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_3_pwm0_3: p15_3_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_5_pwm0_4: p15_5_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_7_pwm0_5: p15_7_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_0_pwm0_0: p17_0_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_1_pwm0_1: p17_1_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_2_pwm0_2: p17_2_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_3_pwm0_3: p17_3_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_4_pwm0_4: p17_4_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_5_pwm0_5: p17_5_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_6_pwm0_6: p17_6_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_7_pwm0_7: p17_7_pwm0_7_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p20_4_pwm0_7: p20_4_pwm0_7_compl {
+ pinmux = <DT_CAT1_PINMUX(20, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p20_5_pwm0_0: p20_5_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(20, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p20_6_pwm0_1: p20_6_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(20, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p20_7_pwm0_2: p20_7_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(20, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_1_pwm0_3: p21_1_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_3_pwm0_4: p21_3_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_5_pwm0_5: p21_5_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_7_pwm0_6: p21_7_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p0_1_pwm1_0: p0_1_pwm1_0_compl {
+ pinmux = <DT_CAT1_PINMUX(0, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_1_pwm1_1: p1_1_pwm1_1_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_3_pwm1_2: p1_3_pwm1_2_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_5_pwm1_3: p1_5_pwm1_3_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_7_pwm1_4: p1_7_pwm1_4_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p3_0_pwm1_5: p3_0_pwm1_5_compl {
+ pinmux = <DT_CAT1_PINMUX(3, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_0_pwm1_6: p4_0_pwm1_6_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_2_pwm1_7: p4_2_pwm1_7_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_4_pwm1_8: p4_4_pwm1_8_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_6_pwm1_9: p4_6_pwm1_9_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p5_0_pwm1_10: p5_0_pwm1_10_compl {
+ pinmux = <DT_CAT1_PINMUX(5, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_1_pwm1_11: p6_1_pwm1_11_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_3_pwm1_12: p6_3_pwm1_12_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_5_pwm1_13: p6_5_pwm1_13_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_7_pwm1_14: p6_7_pwm1_14_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_1_pwm1_15: p7_1_pwm1_15_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_3_pwm1_16: p7_3_pwm1_16_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_5_pwm1_17: p7_5_pwm1_17_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_7_pwm1_18: p7_7_pwm1_18_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_1_pwm1_19: p8_1_pwm1_19_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_3_pwm1_20: p8_3_pwm1_20_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_5_pwm1_21: p8_5_pwm1_21_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_7_pwm1_22: p8_7_pwm1_22_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p9_0_pwm1_23: p9_0_pwm1_23_compl {
+ pinmux = <DT_CAT1_PINMUX(9, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p9_1_pwm1_0: p9_1_pwm1_0_compl {
+ pinmux = <DT_CAT1_PINMUX(9, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p10_1_pwm1_1: p10_1_pwm1_1_compl {
+ pinmux = <DT_CAT1_PINMUX(10, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p10_3_pwm1_2: p10_3_pwm1_2_compl {
+ pinmux = <DT_CAT1_PINMUX(10, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p10_5_pwm1_3: p10_5_pwm1_3_compl {
+ pinmux = <DT_CAT1_PINMUX(10, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p10_7_pwm1_4: p10_7_pwm1_4_compl {
+ pinmux = <DT_CAT1_PINMUX(10, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p11_1_pwm1_5: p11_1_pwm1_5_compl {
+ pinmux = <DT_CAT1_PINMUX(11, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p11_3_pwm1_6: p11_3_pwm1_6_compl {
+ pinmux = <DT_CAT1_PINMUX(11, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p11_5_pwm1_7: p11_5_pwm1_7_compl {
+ pinmux = <DT_CAT1_PINMUX(11, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p11_7_pwm1_8: p11_7_pwm1_8_compl {
+ pinmux = <DT_CAT1_PINMUX(11, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_1_pwm1_9: p12_1_pwm1_9_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_3_pwm1_10: p12_3_pwm1_10_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_5_pwm1_11: p12_5_pwm1_11_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p13_2_pwm1_12: p13_2_pwm1_12_compl {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p13_4_pwm1_13: p13_4_pwm1_13_compl {
+ pinmux = <DT_CAT1_PINMUX(13, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p13_7_pwm1_14: p13_7_pwm1_14_compl {
+ pinmux = <DT_CAT1_PINMUX(13, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p14_2_pwm1_15: p14_2_pwm1_15_compl {
+ pinmux = <DT_CAT1_PINMUX(14, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p14_4_pwm1_16: p14_4_pwm1_16_compl {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p14_7_pwm1_17: p14_7_pwm1_17_compl {
+ pinmux = <DT_CAT1_PINMUX(14, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_1_pwm1_18: p15_1_pwm1_18_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_3_pwm1_19: p15_3_pwm1_19_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_5_pwm1_20: p15_5_pwm1_20_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_7_pwm1_21: p15_7_pwm1_21_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_0_pwm1_0: p17_0_pwm1_0_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_1_pwm1_1: p17_1_pwm1_1_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_2_pwm1_2: p17_2_pwm1_2_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_3_pwm1_3: p17_3_pwm1_3_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_4_pwm1_4: p17_4_pwm1_4_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_5_pwm1_5: p17_5_pwm1_5_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_6_pwm1_22: p17_6_pwm1_22_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_7_pwm1_23: p17_7_pwm1_23_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p20_0_pwm1_7: p20_0_pwm1_7_compl {
+ pinmux = <DT_CAT1_PINMUX(20, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p20_1_pwm1_8: p20_1_pwm1_8_compl {
+ pinmux = <DT_CAT1_PINMUX(20, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p20_2_pwm1_9: p20_2_pwm1_9_compl {
+ pinmux = <DT_CAT1_PINMUX(20, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p20_3_pwm1_10: p20_3_pwm1_10_compl {
+ pinmux = <DT_CAT1_PINMUX(20, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_1_pwm1_11: p21_1_pwm1_11_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_3_pwm1_12: p21_3_pwm1_12_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_5_pwm1_13: p21_5_pwm1_13_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_7_pwm1_14: p21_7_pwm1_14_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 7, HSIOM_SEL_ACT_2)>;
+ };
+ };
+ };
+};
diff --git a/dts/arm/infineon/edge/pse84/pse84.bga-220_s.dtsi b/dts/arm/infineon/edge/pse84/pse84.bga-220_s.dtsi
new file mode 100644
index 0000000..7022a83
--- /dev/null
+++ b/dts/arm/infineon/edge/pse84/pse84.bga-220_s.dtsi
@@ -0,0 +1,1910 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/dt-bindings/gpio/gpio.h>
+#include <zephyr/dt-bindings/pinctrl/ifx_cat1-pinctrl.h>
+#include "pse84_s.dtsi"
+
+/ {
+ soc {
+ pinctrl: pinctrl@52800000 {
+ /* i3c_i3c_scl */
+ /omit-if-no-ref/ p3_0_i3c0_i3c_scl: p3_0_i3c0_i3c_scl {
+ pinmux = <DT_CAT1_PINMUX(3, 0, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* i3c_i3c_sda */
+ /omit-if-no-ref/ p3_1_i3c0_i3c_sda: p3_1_i3c0_i3c_sda {
+ pinmux = <DT_CAT1_PINMUX(3, 1, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* scb_i2c_scl */
+ /omit-if-no-ref/ p6_5_scb2_i2c_scl: p6_5_scb2_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p8_0_scb0_i2c_scl: p8_0_scb0_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(8, 0, HSIOM_SEL_DS_3)>;
+ };
+
+ /omit-if-no-ref/ p9_3_scb1_i2c_scl: p9_3_scb1_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p10_0_scb4_i2c_scl: p10_0_scb4_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(10, 0, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p11_0_scb6_i2c_scl: p11_0_scb6_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(11, 0, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p13_1_scb7_i2c_scl: p13_1_scb7_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p14_4_scb8_i2c_scl: p14_4_scb8_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p15_0_scb9_i2c_scl: p15_0_scb9_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p16_0_scb10_i2c_scl: p16_0_scb10_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p17_0_scb5_i2c_scl: p17_0_scb5_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p17_2_scb11_i2c_scl: p17_2_scb11_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p21_6_scb3_i2c_scl: p21_6_scb3_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(21, 6, HSIOM_SEL_ACT_5)>;
+ };
+
+ /* scb_i2c_sda */
+ /omit-if-no-ref/ p6_7_scb2_i2c_sda: p6_7_scb2_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p8_1_scb0_i2c_sda: p8_1_scb0_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(8, 1, HSIOM_SEL_DS_3)>;
+ };
+
+ /omit-if-no-ref/ p9_2_scb1_i2c_sda: p9_2_scb1_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p10_1_scb4_i2c_sda: p10_1_scb4_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(10, 1, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p11_1_scb6_i2c_sda: p11_1_scb6_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(11, 1, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p13_2_scb7_i2c_sda: p13_2_scb7_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p14_3_scb8_i2c_sda: p14_3_scb8_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p15_1_scb9_i2c_sda: p15_1_scb9_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p16_1_scb10_i2c_sda: p16_1_scb10_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p17_1_scb5_i2c_sda: p17_1_scb5_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p17_3_scb11_i2c_sda: p17_3_scb11_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p21_5_scb3_i2c_sda: p21_5_scb3_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(21, 5, HSIOM_SEL_ACT_5)>;
+ };
+
+ /* scb_spi_m_clk */
+ /omit-if-no-ref/ p6_5_scb2_spi_m_clk: p6_5_scb2_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_0_scb0_spi_m_clk: p8_0_scb0_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(8, 0, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_3_scb1_spi_m_clk: p9_3_scb1_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p10_1_scb4_spi_m_clk: p10_1_scb4_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(10, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_0_scb6_spi_m_clk: p11_0_scb6_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(11, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_1_scb7_spi_m_clk: p13_1_scb7_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_4_scb8_spi_m_clk: p14_4_scb8_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_0_scb9_spi_m_clk: p15_0_scb9_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_0_scb10_spi_m_clk: p16_0_scb10_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_0_scb5_spi_m_clk: p17_0_scb5_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_2_scb11_spi_m_clk: p17_2_scb11_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_6_scb3_spi_m_clk: p21_6_scb3_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(21, 6, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_spi_m_miso */
+ /omit-if-no-ref/ p6_4_scb2_spi_m_miso: p6_4_scb2_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_4_scb0_spi_m_miso: p8_4_scb0_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(8, 4, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_1_scb1_spi_m_miso: p9_1_scb1_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(9, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p10_3_scb4_spi_m_miso: p10_3_scb4_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(10, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_2_scb6_spi_m_miso: p11_2_scb6_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(11, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_3_scb7_spi_m_miso: p13_3_scb7_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(13, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_7_scb8_spi_m_miso: p13_7_scb8_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(13, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_2_scb9_spi_m_miso: p15_2_scb9_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(15, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_2_scb10_spi_m_miso: p16_2_scb10_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(16, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_5_scb5_spi_m_miso: p16_5_scb5_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(16, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_5_scb11_spi_m_miso: p17_5_scb11_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(17, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_4_scb3_spi_m_miso: p21_4_scb3_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(21, 4, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_spi_m_mosi */
+ /omit-if-no-ref/ p6_7_scb2_spi_m_mosi: p6_7_scb2_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_1_scb0_spi_m_mosi: p8_1_scb0_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(8, 1, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_2_scb1_spi_m_mosi: p9_2_scb1_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p10_2_scb4_spi_m_mosi: p10_2_scb4_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(10, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_1_scb6_spi_m_mosi: p11_1_scb6_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(11, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_2_scb7_spi_m_mosi: p13_2_scb7_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_3_scb8_spi_m_mosi: p14_3_scb8_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_1_scb9_spi_m_mosi: p15_1_scb9_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_1_scb10_spi_m_mosi: p16_1_scb10_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_1_scb5_spi_m_mosi: p17_1_scb5_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_3_scb11_spi_m_mosi: p17_3_scb11_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_5_scb3_spi_m_mosi: p21_5_scb3_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(21, 5, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_spi_m_select0 */
+ /omit-if-no-ref/ p0_0_scb3_spi_m_select0: p0_0_scb3_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(0, 0, HSIOM_SEL_ACT_4)>;
+ };
+
+ /omit-if-no-ref/ p6_6_scb2_spi_m_select0: p6_6_scb2_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_2_scb0_spi_m_select0: p8_2_scb0_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(8, 2, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_0_scb1_spi_m_select0: p9_0_scb1_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(9, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p10_4_scb4_spi_m_select0: p10_4_scb4_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(10, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_3_scb6_spi_m_select0: p11_3_scb6_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(11, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_4_scb7_spi_m_select0: p13_4_scb7_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(13, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_7_scb8_spi_m_select0: p14_7_scb8_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(14, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_3_scb9_spi_m_select0: p15_3_scb9_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(15, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_3_scb10_spi_m_select0: p16_3_scb10_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(16, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_6_scb5_spi_m_select0: p16_6_scb5_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(16, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_6_scb11_spi_m_select0: p17_6_scb11_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(17, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_spi_m_select1 */
+ /omit-if-no-ref/ p6_3_scb2_spi_m_select1: p6_3_scb2_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(6, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_3_scb0_spi_m_select1: p8_3_scb0_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(8, 3, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p10_5_scb4_spi_m_select1: p10_5_scb4_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(10, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_4_scb6_spi_m_select1: p11_4_scb6_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(11, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_6_scb7_spi_m_select1: p13_6_scb7_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(13, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_6_scb8_spi_m_select1: p14_6_scb8_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(14, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_4_scb9_spi_m_select1: p15_4_scb9_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(15, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_4_scb10_spi_m_select1: p16_4_scb10_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(16, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_7_scb5_spi_m_select1: p16_7_scb5_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(16, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_7_scb11_spi_m_select1: p17_7_scb11_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(17, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p20_0_scb1_spi_m_select1: p20_0_scb1_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(20, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_7_scb3_spi_m_select1: p21_7_scb3_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(21, 7, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_spi_s_clk */
+ /omit-if-no-ref/ p6_5_scb2_spi_s_clk: p6_5_scb2_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_0_scb0_spi_s_clk: p8_0_scb0_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(8, 0, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_3_scb1_spi_s_clk: p9_3_scb1_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p10_1_scb4_spi_s_clk: p10_1_scb4_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(10, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_0_scb6_spi_s_clk: p11_0_scb6_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(11, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_1_scb7_spi_s_clk: p13_1_scb7_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_4_scb8_spi_s_clk: p14_4_scb8_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_0_scb9_spi_s_clk: p15_0_scb9_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_0_scb10_spi_s_clk: p16_0_scb10_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_0_scb5_spi_s_clk: p17_0_scb5_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_2_scb11_spi_s_clk: p17_2_scb11_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_6_scb3_spi_s_clk: p21_6_scb3_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(21, 6, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_spi_s_miso */
+ /omit-if-no-ref/ p6_4_scb2_spi_s_miso: p6_4_scb2_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_4_scb0_spi_s_miso: p8_4_scb0_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(8, 4, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_1_scb1_spi_s_miso: p9_1_scb1_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(9, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p10_3_scb4_spi_s_miso: p10_3_scb4_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(10, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_2_scb6_spi_s_miso: p11_2_scb6_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(11, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_3_scb7_spi_s_miso: p13_3_scb7_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(13, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_7_scb8_spi_s_miso: p13_7_scb8_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(13, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_2_scb9_spi_s_miso: p15_2_scb9_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(15, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_2_scb10_spi_s_miso: p16_2_scb10_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(16, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_5_scb5_spi_s_miso: p16_5_scb5_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(16, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_5_scb11_spi_s_miso: p17_5_scb11_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(17, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_4_scb3_spi_s_miso: p21_4_scb3_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(21, 4, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_spi_s_mosi */
+ /omit-if-no-ref/ p6_7_scb2_spi_s_mosi: p6_7_scb2_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_1_scb0_spi_s_mosi: p8_1_scb0_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(8, 1, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_2_scb1_spi_s_mosi: p9_2_scb1_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p10_2_scb4_spi_s_mosi: p10_2_scb4_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(10, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_1_scb6_spi_s_mosi: p11_1_scb6_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(11, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_2_scb7_spi_s_mosi: p13_2_scb7_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_3_scb8_spi_s_mosi: p14_3_scb8_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_1_scb9_spi_s_mosi: p15_1_scb9_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_1_scb10_spi_s_mosi: p16_1_scb10_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_1_scb5_spi_s_mosi: p17_1_scb5_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_3_scb11_spi_s_mosi: p17_3_scb11_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_5_scb3_spi_s_mosi: p21_5_scb3_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(21, 5, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_spi_s_select0 */
+ /omit-if-no-ref/ p0_0_scb3_spi_s_select0: p0_0_scb3_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(0, 0, HSIOM_SEL_ACT_4)>;
+ };
+
+ /omit-if-no-ref/ p6_6_scb2_spi_s_select0: p6_6_scb2_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_2_scb0_spi_s_select0: p8_2_scb0_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(8, 2, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_0_scb1_spi_s_select0: p9_0_scb1_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(9, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p10_4_scb4_spi_s_select0: p10_4_scb4_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(10, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_3_scb6_spi_s_select0: p11_3_scb6_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(11, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_4_scb7_spi_s_select0: p13_4_scb7_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(13, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_7_scb8_spi_s_select0: p14_7_scb8_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(14, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_3_scb9_spi_s_select0: p15_3_scb9_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(15, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_3_scb10_spi_s_select0: p16_3_scb10_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(16, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_6_scb5_spi_s_select0: p16_6_scb5_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(16, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_6_scb11_spi_s_select0: p17_6_scb11_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(17, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_spi_s_select1 */
+ /omit-if-no-ref/ p6_3_scb2_spi_s_select1: p6_3_scb2_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(6, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_3_scb0_spi_s_select1: p8_3_scb0_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(8, 3, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p10_5_scb4_spi_s_select1: p10_5_scb4_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(10, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_4_scb6_spi_s_select1: p11_4_scb6_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(11, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_6_scb7_spi_s_select1: p13_6_scb7_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(13, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_6_scb8_spi_s_select1: p14_6_scb8_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(14, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_4_scb9_spi_s_select1: p15_4_scb9_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(15, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_4_scb10_spi_s_select1: p16_4_scb10_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(16, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_7_scb5_spi_s_select1: p16_7_scb5_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(16, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_7_scb11_spi_s_select1: p17_7_scb11_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(17, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p20_0_scb1_spi_s_select1: p20_0_scb1_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(20, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_7_scb3_spi_s_select1: p21_7_scb3_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(21, 7, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_uart_cts */
+ /omit-if-no-ref/ p6_4_scb2_uart_cts: p6_4_scb2_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p9_1_scb1_uart_cts: p9_1_scb1_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(9, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p10_2_scb4_uart_cts: p10_2_scb4_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(10, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p11_2_scb6_uart_cts: p11_2_scb6_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(11, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p13_3_scb7_uart_cts: p13_3_scb7_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(13, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p13_7_scb8_uart_cts: p13_7_scb8_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(13, 7, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p15_2_scb9_uart_cts: p15_2_scb9_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(15, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_2_scb10_uart_cts: p16_2_scb10_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(16, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_5_scb5_uart_cts: p16_5_scb5_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(16, 5, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_5_scb11_uart_cts: p17_5_scb11_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(17, 5, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p21_4_scb3_uart_cts: p21_4_scb3_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(21, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_uart_rts */
+ /omit-if-no-ref/ p6_6_scb2_uart_rts: p6_6_scb2_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p9_0_scb1_uart_rts: p9_0_scb1_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(9, 0, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p10_3_scb4_uart_rts: p10_3_scb4_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(10, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p11_3_scb6_uart_rts: p11_3_scb6_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(11, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p13_4_scb7_uart_rts: p13_4_scb7_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(13, 4, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p14_7_scb8_uart_rts: p14_7_scb8_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(14, 7, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p15_3_scb9_uart_rts: p15_3_scb9_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(15, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_3_scb10_uart_rts: p16_3_scb10_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(16, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_6_scb5_uart_rts: p16_6_scb5_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(16, 6, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_6_scb11_uart_rts: p17_6_scb11_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(17, 6, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p21_7_scb3_uart_rts: p21_7_scb3_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(21, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_uart_rx */
+ /omit-if-no-ref/ p6_5_scb2_uart_rx: p6_5_scb2_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p9_3_scb1_uart_rx: p9_3_scb1_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p10_0_scb4_uart_rx: p10_0_scb4_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(10, 0, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p11_0_scb6_uart_rx: p11_0_scb6_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(11, 0, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p13_1_scb7_uart_rx: p13_1_scb7_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p14_4_scb8_uart_rx: p14_4_scb8_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p15_0_scb9_uart_rx: p15_0_scb9_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_0_scb10_uart_rx: p16_0_scb10_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_0_scb5_uart_rx: p17_0_scb5_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_2_scb11_uart_rx: p17_2_scb11_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p21_6_scb3_uart_rx: p21_6_scb3_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(21, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_uart_tx */
+ /omit-if-no-ref/ p6_7_scb2_uart_tx: p6_7_scb2_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p9_2_scb1_uart_tx: p9_2_scb1_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p10_1_scb4_uart_tx: p10_1_scb4_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(10, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p11_1_scb6_uart_tx: p11_1_scb6_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(11, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p13_2_scb7_uart_tx: p13_2_scb7_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p14_3_scb8_uart_tx: p14_3_scb8_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p15_1_scb9_uart_tx: p15_1_scb9_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_1_scb10_uart_tx: p16_1_scb10_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_1_scb5_uart_tx: p17_1_scb5_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_3_scb11_uart_tx: p17_3_scb11_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p21_5_scb3_uart_tx: p21_5_scb3_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(21, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* sdhc_card_cmd */
+ /omit-if-no-ref/ p7_0_sdhc1_card_cmd: p7_0_sdhc1_card_cmd {
+ pinmux = <DT_CAT1_PINMUX(7, 0, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p21_0_sdhc0_card_cmd: p21_0_sdhc0_card_cmd {
+ pinmux = <DT_CAT1_PINMUX(21, 0, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_dat_3to0 */
+ /omit-if-no-ref/ p7_3_sdhc1_card_dat_3to0: p7_3_sdhc1_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(7, 3, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p7_5_sdhc1_card_dat_3to0: p7_5_sdhc1_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(7, 5, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p7_6_sdhc1_card_dat_3to0: p7_6_sdhc1_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(7, 6, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p7_7_sdhc1_card_dat_3to0: p7_7_sdhc1_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(7, 7, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p12_1_sdhc0_card_dat_3to0: p12_1_sdhc0_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(12, 1, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p12_2_sdhc0_card_dat_3to0: p12_2_sdhc0_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(12, 2, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p12_4_sdhc0_card_dat_3to0: p12_4_sdhc0_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(12, 4, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p12_5_sdhc0_card_dat_3to0: p12_5_sdhc0_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(12, 5, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_dat_7to4 */
+ /omit-if-no-ref/ p6_4_sdhc1_card_dat_7to4: p6_4_sdhc1_card_dat_7to4 {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p6_5_sdhc1_card_dat_7to4: p6_5_sdhc1_card_dat_7to4 {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p6_6_sdhc1_card_dat_7to4: p6_6_sdhc1_card_dat_7to4 {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p6_7_sdhc1_card_dat_7to4: p6_7_sdhc1_card_dat_7to4 {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_detect_n */
+ /omit-if-no-ref/ p7_4_sdhc1_card_detect_n: p7_4_sdhc1_card_detect_n {
+ pinmux = <DT_CAT1_PINMUX(7, 4, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p21_1_sdhc0_card_detect_n: p21_1_sdhc0_card_detect_n {
+ pinmux = <DT_CAT1_PINMUX(21, 1, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_emmc_reset_n */
+ /omit-if-no-ref/
+ p7_2_sdhc1_card_emmc_reset_n: p7_2_sdhc1_card_emmc_reset_n {
+ pinmux = <DT_CAT1_PINMUX(7, 2, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_if_pwr_en */
+ /omit-if-no-ref/ p6_2_sdhc1_card_if_pwr_en: p6_2_sdhc1_card_if_pwr_en {
+ pinmux = <DT_CAT1_PINMUX(6, 2, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p21_4_sdhc0_card_if_pwr_en: p21_4_sdhc0_card_if_pwr_en {
+ pinmux = <DT_CAT1_PINMUX(21, 4, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_mech_write_prot */
+ /omit-if-no-ref/
+ p3_0_sdhc1_card_mech_write_prot: p3_0_sdhc1_card_mech_write_prot {
+ pinmux = <DT_CAT1_PINMUX(3, 0, HSIOM_SEL_ACT_14)>;
+ };
+
+ /omit-if-no-ref/
+ p6_0_sdhc1_card_mech_write_prot: p6_0_sdhc1_card_mech_write_prot {
+ pinmux = <DT_CAT1_PINMUX(6, 0, HSIOM_SEL_ACT_14)>;
+ };
+
+ /omit-if-no-ref/
+ p21_2_sdhc0_card_mech_write_prot: p21_2_sdhc0_card_mech_write_prot {
+ pinmux = <DT_CAT1_PINMUX(21, 2, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_clk_card */
+ /omit-if-no-ref/ p7_1_sdhc1_clk_card: p7_1_sdhc1_clk_card {
+ pinmux = <DT_CAT1_PINMUX(7, 1, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p12_0_sdhc0_clk_card: p12_0_sdhc0_clk_card {
+ pinmux = <DT_CAT1_PINMUX(12, 0, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_io_volt_sel */
+ /omit-if-no-ref/ p6_3_sdhc1_io_volt_sel: p6_3_sdhc1_io_volt_sel {
+ pinmux = <DT_CAT1_PINMUX(6, 3, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p21_3_sdhc0_io_volt_sel: p21_3_sdhc0_io_volt_sel {
+ pinmux = <DT_CAT1_PINMUX(21, 3, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_led_ctrl */
+ /omit-if-no-ref/ p6_1_sdhc1_led_ctrl: p6_1_sdhc1_led_ctrl {
+ pinmux = <DT_CAT1_PINMUX(6, 1, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* PWM tcpwm_line*/
+ /omit-if-no-ref/ p0_0_pwm0_0: p0_0_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(0, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_0_pwm0_1: p1_0_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(1, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_2_pwm0_2: p1_2_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(1, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_4_pwm0_3: p1_4_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(1, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_6_pwm0_4: p1_6_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(1, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p2_0_pwm0_5: p2_0_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(2, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p3_1_pwm0_6: p3_1_pwm0_6 {
+ pinmux = <DT_CAT1_PINMUX(3, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_1_pwm0_7: p4_1_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(4, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_3_pwm0_0: p4_3_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(4, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_5_pwm0_1: p4_5_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(4, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_7_pwm0_2: p4_7_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(4, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_0_pwm0_3: p6_0_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(6, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_2_pwm0_4: p6_2_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(6, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_4_pwm0_5: p6_4_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_6_pwm0_6: p6_6_pwm0_6 {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_0_pwm0_7: p7_0_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(7, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_2_pwm0_0: p7_2_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(7, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_4_pwm0_1: p7_4_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(7, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_6_pwm0_2: p7_6_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(7, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_0_pwm0_3: p8_0_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(8, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_2_pwm0_4: p8_2_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(8, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_4_pwm0_5: p8_4_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(8, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_6_pwm0_6: p8_6_pwm0_6 {
+ pinmux = <DT_CAT1_PINMUX(8, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p9_0_pwm0_7: p9_0_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(9, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p9_1_pwm0_0: p9_1_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(9, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p10_0_pwm0_1: p10_0_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(10, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p10_2_pwm0_2: p10_2_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(10, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p10_4_pwm0_3: p10_4_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(10, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p10_6_pwm0_4: p10_6_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(10, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p11_0_pwm0_5: p11_0_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(11, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p11_2_pwm0_6: p11_2_pwm0_6 {
+ pinmux = <DT_CAT1_PINMUX(11, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p11_4_pwm0_7: p11_4_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(11, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p11_6_pwm0_0: p11_6_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(11, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_0_pwm0_1: p12_0_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(12, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_2_pwm0_2: p12_2_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(12, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_4_pwm0_3: p12_4_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(12, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p13_1_pwm0_4: p13_1_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p13_3_pwm0_5: p13_3_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(13, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p13_6_pwm0_6: p13_6_pwm0_6 {
+ pinmux = <DT_CAT1_PINMUX(13, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p14_1_pwm0_7: p14_1_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(14, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p14_3_pwm0_0: p14_3_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p14_6_pwm0_1: p14_6_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(14, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_0_pwm0_2: p15_0_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_2_pwm0_3: p15_2_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(15, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_4_pwm0_4: p15_4_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(15, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_6_pwm0_5: p15_6_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(15, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_0_pwm0_0: p16_0_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_1_pwm0_1: p16_1_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_2_pwm0_2: p16_2_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(16, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_3_pwm0_3: p16_3_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(16, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_4_pwm0_4: p16_4_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(16, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_5_pwm0_5: p16_5_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(16, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_6_pwm0_6: p16_6_pwm0_6 {
+ pinmux = <DT_CAT1_PINMUX(16, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_7_pwm0_7: p16_7_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(16, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p20_0_pwm0_7: p20_0_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(20, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p20_1_pwm0_0: p20_1_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(20, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p20_2_pwm0_1: p20_2_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(20, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p20_3_pwm0_2: p20_3_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(20, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_0_pwm0_3: p21_0_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(21, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_2_pwm0_4: p21_2_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(21, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_4_pwm0_5: p21_4_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(21, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_6_pwm0_6: p21_6_pwm0_6 {
+ pinmux = <DT_CAT1_PINMUX(21, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p0_0_pwm1_0: p0_0_pwm1_0 {
+ pinmux = <DT_CAT1_PINMUX(0, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_0_pwm1_1: p1_0_pwm1_1 {
+ pinmux = <DT_CAT1_PINMUX(1, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_2_pwm1_2: p1_2_pwm1_2 {
+ pinmux = <DT_CAT1_PINMUX(1, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_4_pwm1_3: p1_4_pwm1_3 {
+ pinmux = <DT_CAT1_PINMUX(1, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_6_pwm1_4: p1_6_pwm1_4 {
+ pinmux = <DT_CAT1_PINMUX(1, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p2_0_pwm1_5: p2_0_pwm1_5 {
+ pinmux = <DT_CAT1_PINMUX(2, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p3_1_pwm1_6: p3_1_pwm1_6 {
+ pinmux = <DT_CAT1_PINMUX(3, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_1_pwm1_7: p4_1_pwm1_7 {
+ pinmux = <DT_CAT1_PINMUX(4, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_3_pwm1_8: p4_3_pwm1_8 {
+ pinmux = <DT_CAT1_PINMUX(4, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_5_pwm1_9: p4_5_pwm1_9 {
+ pinmux = <DT_CAT1_PINMUX(4, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_7_pwm1_10: p4_7_pwm1_10 {
+ pinmux = <DT_CAT1_PINMUX(4, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_0_pwm1_11: p6_0_pwm1_11 {
+ pinmux = <DT_CAT1_PINMUX(6, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_2_pwm1_12: p6_2_pwm1_12 {
+ pinmux = <DT_CAT1_PINMUX(6, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_4_pwm1_13: p6_4_pwm1_13 {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_6_pwm1_14: p6_6_pwm1_14 {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_0_pwm1_15: p7_0_pwm1_15 {
+ pinmux = <DT_CAT1_PINMUX(7, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_2_pwm1_16: p7_2_pwm1_16 {
+ pinmux = <DT_CAT1_PINMUX(7, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_4_pwm1_17: p7_4_pwm1_17 {
+ pinmux = <DT_CAT1_PINMUX(7, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_6_pwm1_18: p7_6_pwm1_18 {
+ pinmux = <DT_CAT1_PINMUX(7, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_0_pwm1_19: p8_0_pwm1_19 {
+ pinmux = <DT_CAT1_PINMUX(8, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_2_pwm1_20: p8_2_pwm1_20 {
+ pinmux = <DT_CAT1_PINMUX(8, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_4_pwm1_21: p8_4_pwm1_21 {
+ pinmux = <DT_CAT1_PINMUX(8, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_6_pwm1_22: p8_6_pwm1_22 {
+ pinmux = <DT_CAT1_PINMUX(8, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p9_2_pwm1_23: p9_2_pwm1_23 {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p9_3_pwm1_0: p9_3_pwm1_0 {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p10_0_pwm1_1: p10_0_pwm1_1 {
+ pinmux = <DT_CAT1_PINMUX(10, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p10_2_pwm1_2: p10_2_pwm1_2 {
+ pinmux = <DT_CAT1_PINMUX(10, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p10_4_pwm1_3: p10_4_pwm1_3 {
+ pinmux = <DT_CAT1_PINMUX(10, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p10_6_pwm1_4: p10_6_pwm1_4 {
+ pinmux = <DT_CAT1_PINMUX(10, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p11_0_pwm1_5: p11_0_pwm1_5 {
+ pinmux = <DT_CAT1_PINMUX(11, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p11_2_pwm1_6: p11_2_pwm1_6 {
+ pinmux = <DT_CAT1_PINMUX(11, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p11_4_pwm1_7: p11_4_pwm1_7 {
+ pinmux = <DT_CAT1_PINMUX(11, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p11_6_pwm1_8: p11_6_pwm1_8 {
+ pinmux = <DT_CAT1_PINMUX(11, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_0_pwm1_9: p12_0_pwm1_9 {
+ pinmux = <DT_CAT1_PINMUX(12, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_2_pwm1_10: p12_2_pwm1_10 {
+ pinmux = <DT_CAT1_PINMUX(12, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_4_pwm1_11: p12_4_pwm1_11 {
+ pinmux = <DT_CAT1_PINMUX(12, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p13_1_pwm1_12: p13_1_pwm1_12 {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p13_3_pwm1_13: p13_3_pwm1_13 {
+ pinmux = <DT_CAT1_PINMUX(13, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p13_6_pwm1_14: p13_6_pwm1_14 {
+ pinmux = <DT_CAT1_PINMUX(13, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p14_1_pwm1_15: p14_1_pwm1_15 {
+ pinmux = <DT_CAT1_PINMUX(14, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p14_3_pwm1_16: p14_3_pwm1_16 {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p14_6_pwm1_17: p14_6_pwm1_17 {
+ pinmux = <DT_CAT1_PINMUX(14, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_0_pwm1_18: p15_0_pwm1_18 {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_2_pwm1_19: p15_2_pwm1_19 {
+ pinmux = <DT_CAT1_PINMUX(15, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_4_pwm1_20: p15_4_pwm1_20 {
+ pinmux = <DT_CAT1_PINMUX(15, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_6_pwm1_21: p15_6_pwm1_21 {
+ pinmux = <DT_CAT1_PINMUX(15, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_0_pwm1_0: p16_0_pwm1_0 {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_1_pwm1_1: p16_1_pwm1_1 {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_2_pwm1_2: p16_2_pwm1_2 {
+ pinmux = <DT_CAT1_PINMUX(16, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_3_pwm1_3: p16_3_pwm1_3 {
+ pinmux = <DT_CAT1_PINMUX(16, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_4_pwm1_4: p16_4_pwm1_4 {
+ pinmux = <DT_CAT1_PINMUX(16, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_5_pwm1_5: p16_5_pwm1_5 {
+ pinmux = <DT_CAT1_PINMUX(16, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_6_pwm1_22: p16_6_pwm1_22 {
+ pinmux = <DT_CAT1_PINMUX(16, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_7_pwm1_23: p16_7_pwm1_23 {
+ pinmux = <DT_CAT1_PINMUX(16, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p20_4_pwm1_7: p20_4_pwm1_7 {
+ pinmux = <DT_CAT1_PINMUX(20, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p20_5_pwm1_8: p20_5_pwm1_8 {
+ pinmux = <DT_CAT1_PINMUX(20, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p20_6_pwm1_9: p20_6_pwm1_9 {
+ pinmux = <DT_CAT1_PINMUX(20, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p20_7_pwm1_10: p20_7_pwm1_10 {
+ pinmux = <DT_CAT1_PINMUX(20, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_0_pwm1_11: p21_0_pwm1_11 {
+ pinmux = <DT_CAT1_PINMUX(21, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_2_pwm1_12: p21_2_pwm1_12 {
+ pinmux = <DT_CAT1_PINMUX(21, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_4_pwm1_13: p21_4_pwm1_13 {
+ pinmux = <DT_CAT1_PINMUX(21, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_6_pwm1_14: p21_6_pwm1_14 {
+ pinmux = <DT_CAT1_PINMUX(21, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /* PWM tcpwm_line_compl*/
+ /omit-if-no-ref/ p0_1_pwm0_0: p0_1_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(0, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_1_pwm0_1: p1_1_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_3_pwm0_2: p1_3_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_5_pwm0_3: p1_5_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_7_pwm0_4: p1_7_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p3_0_pwm0_5: p3_0_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(3, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_0_pwm0_6: p4_0_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_2_pwm0_7: p4_2_pwm0_7_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_4_pwm0_0: p4_4_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_6_pwm0_1: p4_6_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p5_0_pwm0_2: p5_0_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(5, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_1_pwm0_3: p6_1_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_3_pwm0_4: p6_3_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_5_pwm0_5: p6_5_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_7_pwm0_6: p6_7_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_1_pwm0_7: p7_1_pwm0_7_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_3_pwm0_0: p7_3_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_5_pwm0_1: p7_5_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_7_pwm0_2: p7_7_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_1_pwm0_3: p8_1_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_3_pwm0_4: p8_3_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_5_pwm0_5: p8_5_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_7_pwm0_6: p8_7_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p9_2_pwm0_7: p9_2_pwm0_7_compl {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p9_3_pwm0_0: p9_3_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p10_1_pwm0_1: p10_1_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(10, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p10_3_pwm0_2: p10_3_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(10, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p10_5_pwm0_3: p10_5_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(10, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p10_7_pwm0_4: p10_7_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(10, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p11_1_pwm0_5: p11_1_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(11, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p11_3_pwm0_6: p11_3_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(11, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p11_5_pwm0_7: p11_5_pwm0_7_compl {
+ pinmux = <DT_CAT1_PINMUX(11, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p11_7_pwm0_0: p11_7_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(11, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_1_pwm0_1: p12_1_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_3_pwm0_2: p12_3_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_5_pwm0_3: p12_5_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p13_2_pwm0_4: p13_2_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p13_4_pwm0_5: p13_4_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(13, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p13_7_pwm0_6: p13_7_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(13, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p14_2_pwm0_7: p14_2_pwm0_7_compl {
+ pinmux = <DT_CAT1_PINMUX(14, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p14_4_pwm0_0: p14_4_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p14_7_pwm0_1: p14_7_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(14, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_1_pwm0_2: p15_1_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_3_pwm0_3: p15_3_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_5_pwm0_4: p15_5_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_7_pwm0_5: p15_7_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_0_pwm0_0: p17_0_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_1_pwm0_1: p17_1_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_2_pwm0_2: p17_2_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_3_pwm0_3: p17_3_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_4_pwm0_4: p17_4_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_5_pwm0_5: p17_5_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_6_pwm0_6: p17_6_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_7_pwm0_7: p17_7_pwm0_7_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p20_4_pwm0_7: p20_4_pwm0_7_compl {
+ pinmux = <DT_CAT1_PINMUX(20, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p20_5_pwm0_0: p20_5_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(20, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p20_6_pwm0_1: p20_6_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(20, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p20_7_pwm0_2: p20_7_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(20, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_1_pwm0_3: p21_1_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_3_pwm0_4: p21_3_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_5_pwm0_5: p21_5_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_7_pwm0_6: p21_7_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p0_1_pwm1_0: p0_1_pwm1_0_compl {
+ pinmux = <DT_CAT1_PINMUX(0, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_1_pwm1_1: p1_1_pwm1_1_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_3_pwm1_2: p1_3_pwm1_2_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_5_pwm1_3: p1_5_pwm1_3_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_7_pwm1_4: p1_7_pwm1_4_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p3_0_pwm1_5: p3_0_pwm1_5_compl {
+ pinmux = <DT_CAT1_PINMUX(3, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_0_pwm1_6: p4_0_pwm1_6_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_2_pwm1_7: p4_2_pwm1_7_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_4_pwm1_8: p4_4_pwm1_8_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_6_pwm1_9: p4_6_pwm1_9_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p5_0_pwm1_10: p5_0_pwm1_10_compl {
+ pinmux = <DT_CAT1_PINMUX(5, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_1_pwm1_11: p6_1_pwm1_11_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_3_pwm1_12: p6_3_pwm1_12_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_5_pwm1_13: p6_5_pwm1_13_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_7_pwm1_14: p6_7_pwm1_14_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_1_pwm1_15: p7_1_pwm1_15_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_3_pwm1_16: p7_3_pwm1_16_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_5_pwm1_17: p7_5_pwm1_17_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_7_pwm1_18: p7_7_pwm1_18_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_1_pwm1_19: p8_1_pwm1_19_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_3_pwm1_20: p8_3_pwm1_20_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_5_pwm1_21: p8_5_pwm1_21_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_7_pwm1_22: p8_7_pwm1_22_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p9_0_pwm1_23: p9_0_pwm1_23_compl {
+ pinmux = <DT_CAT1_PINMUX(9, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p9_1_pwm1_0: p9_1_pwm1_0_compl {
+ pinmux = <DT_CAT1_PINMUX(9, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p10_1_pwm1_1: p10_1_pwm1_1_compl {
+ pinmux = <DT_CAT1_PINMUX(10, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p10_3_pwm1_2: p10_3_pwm1_2_compl {
+ pinmux = <DT_CAT1_PINMUX(10, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p10_5_pwm1_3: p10_5_pwm1_3_compl {
+ pinmux = <DT_CAT1_PINMUX(10, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p10_7_pwm1_4: p10_7_pwm1_4_compl {
+ pinmux = <DT_CAT1_PINMUX(10, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p11_1_pwm1_5: p11_1_pwm1_5_compl {
+ pinmux = <DT_CAT1_PINMUX(11, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p11_3_pwm1_6: p11_3_pwm1_6_compl {
+ pinmux = <DT_CAT1_PINMUX(11, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p11_5_pwm1_7: p11_5_pwm1_7_compl {
+ pinmux = <DT_CAT1_PINMUX(11, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p11_7_pwm1_8: p11_7_pwm1_8_compl {
+ pinmux = <DT_CAT1_PINMUX(11, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_1_pwm1_9: p12_1_pwm1_9_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_3_pwm1_10: p12_3_pwm1_10_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_5_pwm1_11: p12_5_pwm1_11_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p13_2_pwm1_12: p13_2_pwm1_12_compl {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p13_4_pwm1_13: p13_4_pwm1_13_compl {
+ pinmux = <DT_CAT1_PINMUX(13, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p13_7_pwm1_14: p13_7_pwm1_14_compl {
+ pinmux = <DT_CAT1_PINMUX(13, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p14_2_pwm1_15: p14_2_pwm1_15_compl {
+ pinmux = <DT_CAT1_PINMUX(14, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p14_4_pwm1_16: p14_4_pwm1_16_compl {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p14_7_pwm1_17: p14_7_pwm1_17_compl {
+ pinmux = <DT_CAT1_PINMUX(14, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_1_pwm1_18: p15_1_pwm1_18_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_3_pwm1_19: p15_3_pwm1_19_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_5_pwm1_20: p15_5_pwm1_20_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_7_pwm1_21: p15_7_pwm1_21_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_0_pwm1_0: p17_0_pwm1_0_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_1_pwm1_1: p17_1_pwm1_1_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_2_pwm1_2: p17_2_pwm1_2_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_3_pwm1_3: p17_3_pwm1_3_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_4_pwm1_4: p17_4_pwm1_4_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_5_pwm1_5: p17_5_pwm1_5_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_6_pwm1_22: p17_6_pwm1_22_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_7_pwm1_23: p17_7_pwm1_23_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p20_0_pwm1_7: p20_0_pwm1_7_compl {
+ pinmux = <DT_CAT1_PINMUX(20, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p20_1_pwm1_8: p20_1_pwm1_8_compl {
+ pinmux = <DT_CAT1_PINMUX(20, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p20_2_pwm1_9: p20_2_pwm1_9_compl {
+ pinmux = <DT_CAT1_PINMUX(20, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p20_3_pwm1_10: p20_3_pwm1_10_compl {
+ pinmux = <DT_CAT1_PINMUX(20, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_1_pwm1_11: p21_1_pwm1_11_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_3_pwm1_12: p21_3_pwm1_12_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_5_pwm1_13: p21_5_pwm1_13_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_7_pwm1_14: p21_7_pwm1_14_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 7, HSIOM_SEL_ACT_2)>;
+ };
+ };
+ };
+};
diff --git a/dts/arm/infineon/edge/pse84/pse84.cm33.dtsi b/dts/arm/infineon/edge/pse84/pse84.cm33.dtsi
new file mode 100644
index 0000000..bc2540a
--- /dev/null
+++ b/dts/arm/infineon/edge/pse84/pse84.cm33.dtsi
@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <arm/armv8-m.dtsi>
+/ {
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-m33";
+ reg = <0>;
+ clock-frequency = <200000000>;
+ };
+ };
+};
+
+&nvic {
+ arm,num-irq-priority-bits = <3>;
+};
diff --git a/dts/arm/infineon/edge/pse84/pse84.cm55.dtsi b/dts/arm/infineon/edge/pse84/pse84.cm55.dtsi
new file mode 100644
index 0000000..43a2731
--- /dev/null
+++ b/dts/arm/infineon/edge/pse84/pse84.cm55.dtsi
@@ -0,0 +1,357 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <arm/armv8.1-m.dtsi>
+/ {
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-m55";
+ reg = <1>;
+ clock-frequency = <400000000>;
+ };
+ };
+};
+
+&gpio_prt0 {
+ interrupts = <0 4>;
+};
+
+&gpio_prt1 {
+ interrupts = <39 4>;
+};
+
+&gpio_prt2 {
+ interrupts = <1 4>;
+};
+
+&gpio_prt3 {
+ interrupts = <2 4>;
+};
+
+&gpio_prt4 {
+ interrupts = <40 4>;
+};
+
+&gpio_prt5 {
+ interrupts = <3 4>;
+};
+
+&gpio_prt6 {
+ interrupts = <4 4>;
+};
+
+&gpio_prt7 {
+ interrupts = <5 4>;
+};
+
+&gpio_prt8 {
+ interrupts = <6 4>;
+};
+
+&gpio_prt9 {
+ interrupts = <7 4>;
+};
+
+&gpio_prt10 {
+ interrupts = <8 4>;
+};
+
+&gpio_prt11 {
+ interrupts = <9 4>;
+};
+
+&gpio_prt12 {
+ interrupts = <10 4>;
+};
+
+&gpio_prt13 {
+ interrupts = <11 4>;
+};
+
+&gpio_prt14 {
+ interrupts = <12 4>;
+};
+
+&gpio_prt15 {
+ interrupts = <13 4>;
+};
+
+&gpio_prt16 {
+ interrupts = <14 4>;
+};
+
+&gpio_prt17 {
+ interrupts = <15 4>;
+};
+
+&gpio_prt18 {
+ interrupts = <16 4>;
+};
+
+&gpio_prt19 {
+ interrupts = <17 4>;
+};
+
+&gpio_prt20 {
+ interrupts = <18 4>;
+};
+
+&gpio_prt21 {
+ interrupts = <19 4>;
+};
+
+&adc0 {
+ interrupts = <36 4>;
+};
+
+&scb0 {
+ interrupts = <22 4>;
+};
+
+&scb2 {
+ interrupts = <121 4>;
+};
+
+&scb3 {
+ interrupts = <122 4>;
+};
+
+&scb4 {
+ interrupts = <123 4>;
+};
+
+&scb5 {
+ interrupts = <124 4>;
+};
+
+&scb6 {
+ interrupts = <125 4>;
+};
+
+&scb7 {
+ interrupts = <126 4>;
+};
+
+&scb8 {
+ interrupts = <127 4>;
+};
+
+&scb9 {
+ interrupts = <128 4>;
+};
+
+&scb10 {
+ interrupts = <129 4>;
+};
+
+&scb11 {
+ interrupts = <130 4>;
+};
+
+&scb1 {
+ interrupts = <120 4>;
+};
+
+&i3c0 {
+ interrupts = <153 4>;
+};
+
+&watchdog0 {
+ interrupts = <33 4>;
+};
+
+&mcwdt0 {
+ interrupts = <0 4>;
+};
+
+&mcwdt1 {
+ interrupts = <34 4>;
+};
+
+&tcpwm0_0 {
+ interrupts = <88 4>;
+};
+
+&tcpwm0_1 {
+ interrupts = <89 4>;
+};
+
+&tcpwm0_2 {
+ interrupts = <90 4>;
+};
+
+&tcpwm0_3 {
+ interrupts = <91 4>;
+};
+
+&tcpwm0_4 {
+ interrupts = <92 4>;
+};
+
+&tcpwm0_5 {
+ interrupts = <93 4>;
+};
+
+&tcpwm0_6 {
+ interrupts = <94 4>;
+};
+
+&tcpwm0_7 {
+ interrupts = <95 4>;
+};
+
+&tcpwm1_0 {
+ interrupts = <96 4>;
+};
+
+&tcpwm1_1 {
+ interrupts = <97 4>;
+};
+
+&tcpwm1_2 {
+ interrupts = <98 4>;
+};
+
+&tcpwm1_3 {
+ interrupts = <99 4>;
+};
+
+&tcpwm1_4 {
+ interrupts = <100 4>;
+};
+
+&tcpwm1_5 {
+ interrupts = <101 4>;
+};
+
+&tcpwm1_6 {
+ interrupts = <102 4>;
+};
+
+&tcpwm1_7 {
+ interrupts = <103 4>;
+};
+
+&tcpwm1_8 {
+ interrupts = <104 4>;
+};
+
+&tcpwm1_9 {
+ interrupts = <105 4>;
+};
+
+&tcpwm1_10 {
+ interrupts = <106 4>;
+};
+
+&tcpwm1_11 {
+ interrupts = <107 4>;
+};
+
+&tcpwm1_12 {
+ interrupts = <108 4>;
+};
+
+&tcpwm1_13 {
+ interrupts = <109 4>;
+};
+
+&tcpwm1_14 {
+ interrupts = <110 4>;
+};
+
+&tcpwm1_15 {
+ interrupts = <111 4>;
+};
+
+&tcpwm1_16 {
+ interrupts = <112 4>;
+};
+
+&tcpwm1_17 {
+ interrupts = <113 4>;
+};
+
+&tcpwm1_18 {
+ interrupts = <114 4>;
+};
+
+&tcpwm1_19 {
+ interrupts = <115 4>;
+};
+
+&tcpwm1_20 {
+ interrupts = <116 4>;
+};
+
+&tcpwm1_21 {
+ interrupts = <117 4>;
+};
+
+&tcpwm1_22 {
+ interrupts = <118 4>;
+};
+
+&tcpwm1_23 {
+ interrupts = <119 4>;
+};
+
+&dma0 {
+interrupts = <60 4>, /* CH0 */
+ <61 4>, /* CH1 */
+ <62 4>, /* CH2 */
+ <63 4>, /* CH3 */
+ <64 4>, /* CH4 */
+ <65 4>, /* CH5 */
+ <66 4>, /* CH6 */
+ <67 4>, /* CH7 */
+ <68 4>, /* CH8 */
+ <69 4>, /* CH9 */
+ <70 4>, /* CH10 */
+ <71 4>, /* CH11 */
+ <72 4>, /* CH12 */
+ <73 4>, /* CH13 */
+ <74 4>, /* CH14 */
+ <75 4>; /* CH15 */
+};
+
+&dma1 {
+interrupts = <158 4>, /* CH0 */
+ <159 4>, /* CH1 */
+ <160 4>, /* CH2 */
+ <161 4>, /* CH3 */
+ <162 4>, /* CH4 */
+ <163 4>, /* CH5 */
+ <164 4>, /* CH6 */
+ <165 4>, /* CH7 */
+ <166 4>, /* CH8 */
+ <167 4>, /* CH9 */
+ <168 4>, /* CH10 */
+ <169 4>, /* CH11 */
+ <170 4>, /* CH12 */
+ <171 4>, /* CH13 */
+ <172 4>, /* CH14 */
+ <173 4>; /* CH15 */
+};
+
+&sdhc0 {
+ interrupts = <132 4>, /* SDIO wakeup interrupt for mxsdhc */
+ <131 6>; /* Consolidated interrupt for mxsdhc */
+};
+
+&sdhc1 {
+ interrupts = <134 4>, /* SDIO wakeup interrupt for mxsdhc */
+ <133 6>; /* Consolidated interrupt for mxsdhc */
+};
+
+&nvic {
+ arm,num-irq-priority-bits = <3>;
+};
diff --git a/dts/arm/infineon/edge/pse84/pse84.dtsi b/dts/arm/infineon/edge/pse84/pse84.dtsi
new file mode 100644
index 0000000..8576f06
--- /dev/null
+++ b/dts/arm/infineon/edge/pse84/pse84.dtsi
@@ -0,0 +1,1120 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <mem.h>
+
+/ {
+ sram0: sram0@24000000 {
+ compatible = "mmio-sram";
+ reg = <0x24000000 0x100000>;
+ };
+
+ dtcm {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ dtcm_m33: dtcm_m33@48040000 {
+ compatible = "zephyr,memory-region", "arm,dtcm";
+ reg = <0x48040000 DT_SIZE_K(256)>;
+ zephyr,memory-region = "DTCM_M33";
+ };
+
+ dtcm_m55: dtcm_m55@20000000 {
+ compatible = "zephyr,memory-region", "arm,dtcm";
+ reg = <0x20000000 DT_SIZE_K(256)>;
+ zephyr,memory-region = "DTCM_M55";
+ };
+ };
+
+ itcm {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ itcm_m33: itcm_m33@48000000 {
+ compatible = "zephyr,memory-region", "arm,itcm";
+ reg = <0x48000000 DT_SIZE_K(256)>;
+ zephyr,memory-region = "ITCM_M33";
+ };
+
+ itcm_m55: itcm_m55@0 {
+ compatible = "zephyr,memory-region", "arm,itcm";
+ reg = <0x00000000 DT_SIZE_K(256)>;
+ zephyr,memory-region = "ITCM_M55";
+ };
+ };
+
+ rram {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ rram: rram@22000000 {
+ compatible = "soc-nv-flash";
+ reg = <0x22000000 DT_SIZE_K(512)>;
+ };
+ };
+
+ socmem {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ socmem: socmem@26000000 {
+ reg = <0x26000000 DT_SIZE_M(5)>;
+ };
+ };
+
+ soc {
+ pinctrl: pinctrl@42800000 {
+ compatible = "infineon,cat1-pinctrl";
+ reg = <0x42800000 0x20000>;
+ };
+
+ hsiom: hsiom@42800000 {
+ compatible = "infineon,cat1-hsiom";
+ reg = <0x42800000 0x4000>;
+ interrupts = <41 4>, <40 4>;
+ status = "disabled";
+ };
+
+ gpio_prt0: gpio@42810000 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x42810000 0x80>;
+ interrupts = <0 4>;
+ gpio-controller;
+ ngpios = <2>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt1: gpio@42810080 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x42810080 0x80>;
+ interrupts = <59 4>;
+ gpio-controller;
+ ngpios = <8>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt2: gpio@42810100 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x42810100 0x80>;
+ interrupts = <1 4>;
+ gpio-controller;
+ ngpios = <1>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt3: gpio@42810180 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x42810180 0x80>;
+ interrupts = <2 4>;
+ gpio-controller;
+ ngpios = <2>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt4: gpio@42810200 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x42810200 0x80>;
+ interrupts = <60 4>;
+ gpio-controller;
+ ngpios = <8>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt5: gpio@42810280 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x42810280 0x80>;
+ interrupts = <3 4>;
+ gpio-controller;
+ ngpios = <1>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt6: gpio@42810300 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x42810300 0x80>;
+ interrupts = <4 4>;
+ gpio-controller;
+ ngpios = <8>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt7: gpio@42810380 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x42810380 0x80>;
+ interrupts = <5 4>;
+ gpio-controller;
+ ngpios = <8>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt8: gpio@42810400 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x42810400 0x80>;
+ interrupts = <6 4>;
+ gpio-controller;
+ ngpios = <8>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt9: gpio@42810480 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x42810480 0x80>;
+ interrupts = <7 4>;
+ gpio-controller;
+ ngpios = <4>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt10: gpio@42810500 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x42810500 0x80>;
+ interrupts = <8 4>;
+ gpio-controller;
+ ngpios = <8>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt11: gpio@42810580 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x42810580 0x80>;
+ interrupts = <9 4>;
+ gpio-controller;
+ ngpios = <8>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt12: gpio@42810600 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x42810600 0x80>;
+ interrupts = <10 4>;
+ gpio-controller;
+ ngpios = <6>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt13: gpio@42810680 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x42810680 0x80>;
+ interrupts = <11 4>;
+ gpio-controller;
+ ngpios = <8>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt14: gpio@42810700 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x42810700 0x80>;
+ interrupts = <12 4>;
+ gpio-controller;
+ ngpios = <8>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt15: gpio@42810780 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x42810780 0x80>;
+ interrupts = <13 4>;
+ gpio-controller;
+ ngpios = <8>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt16: gpio@42810800 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x42810800 0x80>;
+ interrupts = <14 4>;
+ gpio-controller;
+ ngpios = <8>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt17: gpio@42810880 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x42810880 0x80>;
+ interrupts = <15 4>;
+ gpio-controller;
+ ngpios = <8>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt18: gpio@42810900 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x42810900 0x80>;
+ interrupts = <16 4>;
+ gpio-controller;
+ ngpios = <2>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt19: gpio@42810980 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x42810980 0x80>;
+ interrupts = <17 4>;
+ gpio-controller;
+ ngpios = <2>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt20: gpio@42810a00 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x42810a00 0x80>;
+ interrupts = <18 4>;
+ gpio-controller;
+ ngpios = <8>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt21: gpio@42810a80 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x42810a80 0x80>;
+ interrupts = <19 4>;
+ gpio-controller;
+ ngpios = <8>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ adc0: adc@42e80000 {
+ compatible = "infineon,autanalog-sar-adc";
+ reg = <0x42e80000 0xf20>;
+ interrupts = <57 4>;
+ status = "disabled";
+ #io-channel-cells = <1>;
+ };
+
+ ipc0: ipc@422a0000 {
+ compatible = "infineon,cat1-ipc";
+ reg = <0x422a0000 0x1200>;
+ status = "disabled";
+ #ipc-config-cells = <3>;
+ };
+
+ ipc1: ipc@441d0000 {
+ compatible = "infineon,cat1-ipc";
+ reg = <0x441d0000 0x1200>;
+ status = "disabled";
+ #ipc-config-cells = <3>;
+ };
+
+ scb0: scb@42990000 {
+ compatible = "infineon,cat1-scb";
+ reg = <0x42990000 0xfd0>;
+ interrupts = <43 4>;
+ status = "disabled";
+ };
+
+ scb2: scb@429a0000 {
+ compatible = "infineon,cat1-scb";
+ reg = <0x429a0000 0xfd0>;
+ interrupts = <143 4>;
+ status = "disabled";
+ };
+
+ scb3: scb@429b0000 {
+ compatible = "infineon,cat1-scb";
+ reg = <0x429b0000 0xfd0>;
+ interrupts = <144 4>;
+ status = "disabled";
+ };
+
+ scb4: scb@429c0000 {
+ compatible = "infineon,cat1-scb";
+ reg = <0x429c0000 0xfd0>;
+ interrupts = <145 4>;
+ status = "disabled";
+ };
+
+ scb5: scb@429d0000 {
+ compatible = "infineon,cat1-scb";
+ reg = <0x429d0000 0xfd0>;
+ interrupts = <146 4>;
+ status = "disabled";
+ };
+
+ scb6: scb@429e0000 {
+ compatible = "infineon,cat1-scb";
+ reg = <0x429e0000 0xfd0>;
+ interrupts = <147 4>;
+ status = "disabled";
+ };
+
+ scb7: scb@429f0000 {
+ compatible = "infineon,cat1-scb";
+ reg = <0x429f0000 0xfd0>;
+ interrupts = <148 4>;
+ status = "disabled";
+ };
+
+ scb8: scb@42a00000 {
+ compatible = "infineon,cat1-scb";
+ reg = <0x42a00000 0xfd0>;
+ interrupts = <149 4>;
+ status = "disabled";
+ };
+
+ scb9: scb@42a10000 {
+ compatible = "infineon,cat1-scb";
+ reg = <0x42a10000 0xfd0>;
+ interrupts = <150 4>;
+ status = "disabled";
+ };
+
+ scb10: scb@42a20000 {
+ compatible = "infineon,cat1-scb";
+ reg = <0x42a20000 0xfd0>;
+ interrupts = <151 4>;
+ status = "disabled";
+ };
+
+ scb11: scb@42a30000 {
+ compatible = "infineon,cat1-scb";
+ reg = <0x42a30000 0xfd0>;
+ interrupts = <152 4>;
+ status = "disabled";
+ };
+
+ scb1: scb@42d00000 {
+ compatible = "infineon,cat1-scb";
+ reg = <0x42d00000 0xfd0>;
+ interrupts = <142 4>;
+ status = "disabled";
+ };
+
+ i3c0: i3c@42a50000 {
+ compatible = "infineon,cat1-i3c";
+ reg = <0x42a50000 0x438>;
+ interrupts = <176 4>;
+ status = "disabled";
+ };
+
+ watchdog0: watchdog@4240c000 {
+ compatible = "infineon,cat1-watchdog";
+ reg = <0x4240c000 0x180>;
+ interrupts = <54 4>;
+ status = "disabled";
+ };
+
+ mcwdt0: mcwdt@4240d000 {
+ compatible = "infineon,cat1-lp-timer-pdl";
+ reg = <0x4240d000 0x40>;
+ interrupts = <55 4>;
+ status = "disabled";
+ };
+
+ mcwdt1: mcwdt@4240d040 {
+ compatible = "infineon,cat1-lp-timer-pdl";
+ reg = <0x4240d040 0x40>;
+ interrupts = <0 4>;
+ status = "disabled";
+ };
+
+ tcpwm0: tcpwm0@42860000 {
+ reg = <0x42860000 0x8000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ tcpwm0_0: tcpwm0_0@42860000 {
+ compatible = "infineon,tcpwm";
+ reg = <0x42860000 0x80>;
+ interrupts = <110 4>;
+ resolution = <32>;
+ status = "disabled";
+
+ pwm0_0: pwm0_0 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter0_0: counter0_0 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm0_1: tcpwm0_1@42860080 {
+ compatible = "infineon,tcpwm";
+ reg = <0x42860080 0x80>;
+ interrupts = <111 4>;
+ resolution = <32>;
+ status = "disabled";
+
+ pwm0_1: pwm0_1 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter0_1: counter0_1 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm0_2: tcpwm0_2@42860100 {
+ compatible = "infineon,tcpwm";
+ reg = <0x42860100 0x80>;
+ interrupts = <112 4>;
+ resolution = <32>;
+ status = "disabled";
+
+ pwm0_2: pwm0_2 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter0_2: counter0_2 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm0_3: tcpwm0_3@42860180 {
+ compatible = "infineon,tcpwm";
+ reg = <0x42860180 0x80>;
+ interrupts = <113 4>;
+ resolution = <32>;
+ status = "disabled";
+
+ pwm0_3: pwm0_3 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter0_3: counter0_3 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm0_4: tcpwm0_4@42860200 {
+ compatible = "infineon,tcpwm";
+ reg = <0x42860200 0x80>;
+ interrupts = <114 4>;
+ resolution = <32>;
+ status = "disabled";
+
+ pwm0_4: pwm0_4 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter0_4: counter0_4 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm0_5: tcpwm0_5@42860280 {
+ compatible = "infineon,tcpwm";
+ reg = <0x42860280 0x80>;
+ interrupts = <115 4>;
+ resolution = <32>;
+ status = "disabled";
+
+ pwm0_5: pwm0_5 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter0_5: counter0_5 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm0_6: tcpwm0_6@42860300 {
+ compatible = "infineon,tcpwm";
+ reg = <0x42860300 0x80>;
+ interrupts = <116 4>;
+ resolution = <32>;
+ status = "disabled";
+
+ pwm0_6: pwm0_6 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter0_6: counter0_6 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm0_7: tcpwm0_7@42860380 {
+ compatible = "infineon,tcpwm";
+ reg = <0x42860380 0x80>;
+ interrupts = <117 4>;
+ resolution = <32>;
+ status = "disabled";
+
+ pwm0_7: pwm0_7 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter0_7: counter0_7 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+ };
+
+ tcpwm1: tcpwm1@42868000 {
+ reg = <0x42868000 0x8000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ tcpwm1_0: tcpwm1_0@42868000 {
+ compatible = "infineon,tcpwm";
+ reg = <0x42868000 0x80>;
+ interrupts = <118 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_0: pwm1_0 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_0: counter1_0 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_1: tcpwm1_1@42868080 {
+ compatible = "infineon,tcpwm";
+ reg = <0x42868080 0x80>;
+ interrupts = <119 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_1: pwm1_1 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_1: counter1_1 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_2: tcpwm1_2@42868100 {
+ compatible = "infineon,tcpwm";
+ reg = <0x42868100 0x80>;
+ interrupts = <120 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_2: pwm1_2 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_2: counter1_2 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_3: tcpwm1_3@42868180 {
+ compatible = "infineon,tcpwm";
+ reg = <0x42868180 0x80>;
+ interrupts = <121 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_3: pwm1_3 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_3: counter1_3 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_4: tcpwm1_4@42868200 {
+ compatible = "infineon,tcpwm";
+ reg = <0x42868200 0x80>;
+ interrupts = <122 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_4: pwm1_4 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_4: counter1_4 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_5: tcpwm1_5@42868280 {
+ compatible = "infineon,tcpwm";
+ reg = <0x42868280 0x80>;
+ interrupts = <123 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_5: pwm1_5 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_5: counter1_5 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_6: tcpwm1_6@42868300 {
+ compatible = "infineon,tcpwm";
+ reg = <0x42868300 0x80>;
+ interrupts = <124 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_6: pwm1_6 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_6: counter1_6 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_7: tcpwm1_7@42868380 {
+ compatible = "infineon,tcpwm";
+ reg = <0x42868380 0x80>;
+ interrupts = <125 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_7: pwm1_7 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_7: counter1_7 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_8: tcpwm1_8@42868400 {
+ compatible = "infineon,tcpwm";
+ reg = <0x42868400 0x80>;
+ interrupts = <126 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_8: pwm1_8 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_8: counter1_8 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_9: tcpwm1_9@42868480 {
+ compatible = "infineon,tcpwm";
+ reg = <0x42868480 0x80>;
+ interrupts = <127 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_9: pwm1_9 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_9: counter1_9 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_10: tcpwm1_10@42868500 {
+ compatible = "infineon,tcpwm";
+ reg = <0x42868500 0x80>;
+ interrupts = <128 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_10: pwm1_10 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_10: counter1_10 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_11: tcpwm1_11@42868580 {
+ compatible = "infineon,tcpwm";
+ reg = <0x42868580 0x80>;
+ interrupts = <129 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_11: pwm1_11 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_11: counter1_11 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_12: tcpwm1_12@42868600 {
+ compatible = "infineon,tcpwm";
+ reg = <0x42868600 0x80>;
+ interrupts = <130 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_12: pwm1_12 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_12: counter1_12 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_13: tcpwm1_13@42868680 {
+ compatible = "infineon,tcpwm";
+ reg = <0x42868680 0x80>;
+ interrupts = <131 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_13: pwm1_13 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_13: counter1_13 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_14: tcpwm1_14@42868700 {
+ compatible = "infineon,tcpwm";
+ reg = <0x42868700 0x80>;
+ interrupts = <132 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_14: pwm1_14 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_14: counter1_14 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_15: tcpwm1_15@42868780 {
+ compatible = "infineon,tcpwm";
+ reg = <0x42868780 0x80>;
+ interrupts = <133 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_15: pwm1_15 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_15: counter1_15 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_16: tcpwm1_16@42868800 {
+ compatible = "infineon,tcpwm";
+ reg = <0x42868800 0x80>;
+ interrupts = <134 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_16: pwm1_16 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_16: counter1_16 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_17: tcpwm1_17@42868880 {
+ compatible = "infineon,tcpwm";
+ reg = <0x42868880 0x80>;
+ interrupts = <135 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_17: pwm1_17 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_17: counter1_17 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_18: tcpwm1_18@42868900 {
+ compatible = "infineon,tcpwm";
+ reg = <0x42868900 0x80>;
+ interrupts = <136 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_18: pwm1_18 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_18: counter1_18 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_19: tcpwm1_19@42868980 {
+ compatible = "infineon,tcpwm";
+ reg = <0x42868980 0x80>;
+ interrupts = <137 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_19: pwm1_19 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_19: counter1_19 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_20: tcpwm1_20@42868a00 {
+ compatible = "infineon,tcpwm";
+ reg = <0x42868a00 0x80>;
+ interrupts = <138 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_20: pwm1_20 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_20: counter1_20 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_21: tcpwm1_21@42868a80 {
+ compatible = "infineon,tcpwm";
+ reg = <0x42868a80 0x80>;
+ interrupts = <139 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_21: pwm1_21 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_21: counter1_21 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_22: tcpwm1_22@42868b00 {
+ compatible = "infineon,tcpwm";
+ reg = <0x42868b00 0x80>;
+ interrupts = <140 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_22: pwm1_22 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_22: counter1_22 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_23: tcpwm1_23@42868b80 {
+ compatible = "infineon,tcpwm";
+ reg = <0x42868b80 0x80>;
+ interrupts = <141 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_23: pwm1_23 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_23: counter1_23 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+ };
+
+ dma0: dw@42270000 {
+ #dma-cells = <1>;
+ compatible = "infineon,cat1-dma-pdl";
+ reg = <0x42270000 0x10000>;
+ dma-channels = <16>;
+ interrupts = <82 4>, /* CH0 */
+ <83 4>, /* CH1 */
+ <84 4>, /* CH2 */
+ <85 4>, /* CH3 */
+ <86 4>, /* CH4 */
+ <87 4>, /* CH5 */
+ <88 4>, /* CH6 */
+ <89 4>, /* CH7 */
+ <90 4>, /* CH8 */
+ <91 4>, /* CH9 */
+ <92 4>, /* CH10 */
+ <93 4>, /* CH11 */
+ <94 4>, /* CH12 */
+ <95 4>, /* CH13 */
+ <96 4>, /* CH14 */
+ <97 4>; /* CH15 */
+ status = "disabled";
+ };
+
+ dma1: dw@42280000 {
+ #dma-cells = <1>;
+ compatible = "infineon,cat1-dma-pdl";
+ reg = <0x42280000 0x10000>;
+ dma-channels = <16>;
+ interrupts = <181 4>, /* CH0 */
+ <182 4>, /* CH1 */
+ <183 4>, /* CH2 */
+ <184 4>, /* CH3 */
+ <185 4>, /* CH4 */
+ <186 4>, /* CH5 */
+ <187 4>, /* CH6 */
+ <188 4>, /* CH7 */
+ <189 4>, /* CH8 */
+ <190 4>, /* CH9 */
+ <191 4>, /* CH10 */
+ <192 4>, /* CH11 */
+ <193 4>, /* CH12 */
+ <194 4>, /* CH13 */
+ <195 4>, /* CH14 */
+ <196 4>; /* CH15 */
+ status = "disabled";
+ };
+
+ sdhc0: sdhc@44810000 {
+ compatible = "infineon,cat1-sdhc-sdio";
+ reg = <0x44810000 0x2000>;
+ interrupts = <155 4>, /* SDIO wakeup interrupt for mxsdhc */
+ <154 6>; /* Consolidated interrupt for mxsdhc */
+ status = "disabled";
+ };
+
+ sdhc1: sdhc@44820000 {
+ compatible = "infineon,cat1-sdhc-sdio";
+ reg = <0x44820000 0x2000>;
+ interrupts = <157 4>, /* SDIO wakeup interrupt for mxsdhc */
+ <156 6>; /* Consolidated interrupt for mxsdhc */
+ status = "disabled";
+ };
+ };
+};
diff --git a/dts/arm/infineon/edge/pse84/pse84.ewlb-235.dtsi b/dts/arm/infineon/edge/pse84/pse84.ewlb-235.dtsi
new file mode 100644
index 0000000..20c7dd1
--- /dev/null
+++ b/dts/arm/infineon/edge/pse84/pse84.ewlb-235.dtsi
@@ -0,0 +1,1910 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/dt-bindings/gpio/gpio.h>
+#include <zephyr/dt-bindings/pinctrl/ifx_cat1-pinctrl.h>
+#include "pse84.dtsi"
+
+/ {
+ soc {
+ pinctrl: pinctrl@42800000 {
+ /* i3c_i3c_scl */
+ /omit-if-no-ref/ p3_0_i3c0_i3c_scl: p3_0_i3c0_i3c_scl {
+ pinmux = <DT_CAT1_PINMUX(3, 0, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* i3c_i3c_sda */
+ /omit-if-no-ref/ p3_1_i3c0_i3c_sda: p3_1_i3c0_i3c_sda {
+ pinmux = <DT_CAT1_PINMUX(3, 1, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* scb_i2c_scl */
+ /omit-if-no-ref/ p6_5_scb2_i2c_scl: p6_5_scb2_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p8_0_scb0_i2c_scl: p8_0_scb0_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(8, 0, HSIOM_SEL_DS_3)>;
+ };
+
+ /omit-if-no-ref/ p9_3_scb1_i2c_scl: p9_3_scb1_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p10_0_scb4_i2c_scl: p10_0_scb4_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(10, 0, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p11_0_scb6_i2c_scl: p11_0_scb6_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(11, 0, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p13_1_scb7_i2c_scl: p13_1_scb7_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p14_4_scb8_i2c_scl: p14_4_scb8_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p15_0_scb9_i2c_scl: p15_0_scb9_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p16_0_scb10_i2c_scl: p16_0_scb10_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p17_0_scb5_i2c_scl: p17_0_scb5_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p17_2_scb11_i2c_scl: p17_2_scb11_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p21_6_scb3_i2c_scl: p21_6_scb3_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(21, 6, HSIOM_SEL_ACT_5)>;
+ };
+
+ /* scb_i2c_sda */
+ /omit-if-no-ref/ p6_7_scb2_i2c_sda: p6_7_scb2_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p8_1_scb0_i2c_sda: p8_1_scb0_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(8, 1, HSIOM_SEL_DS_3)>;
+ };
+
+ /omit-if-no-ref/ p9_2_scb1_i2c_sda: p9_2_scb1_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p10_1_scb4_i2c_sda: p10_1_scb4_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(10, 1, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p11_1_scb6_i2c_sda: p11_1_scb6_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(11, 1, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p13_2_scb7_i2c_sda: p13_2_scb7_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p14_3_scb8_i2c_sda: p14_3_scb8_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p15_1_scb9_i2c_sda: p15_1_scb9_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p16_1_scb10_i2c_sda: p16_1_scb10_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p17_1_scb5_i2c_sda: p17_1_scb5_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p17_3_scb11_i2c_sda: p17_3_scb11_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p21_5_scb3_i2c_sda: p21_5_scb3_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(21, 5, HSIOM_SEL_ACT_5)>;
+ };
+
+ /* scb_spi_m_clk */
+ /omit-if-no-ref/ p6_5_scb2_spi_m_clk: p6_5_scb2_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_0_scb0_spi_m_clk: p8_0_scb0_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(8, 0, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_3_scb1_spi_m_clk: p9_3_scb1_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p10_1_scb4_spi_m_clk: p10_1_scb4_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(10, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_0_scb6_spi_m_clk: p11_0_scb6_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(11, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_1_scb7_spi_m_clk: p13_1_scb7_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_4_scb8_spi_m_clk: p14_4_scb8_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_0_scb9_spi_m_clk: p15_0_scb9_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_0_scb10_spi_m_clk: p16_0_scb10_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_0_scb5_spi_m_clk: p17_0_scb5_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_2_scb11_spi_m_clk: p17_2_scb11_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_6_scb3_spi_m_clk: p21_6_scb3_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(21, 6, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_spi_m_miso */
+ /omit-if-no-ref/ p6_4_scb2_spi_m_miso: p6_4_scb2_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_4_scb0_spi_m_miso: p8_4_scb0_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(8, 4, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_1_scb1_spi_m_miso: p9_1_scb1_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(9, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p10_3_scb4_spi_m_miso: p10_3_scb4_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(10, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_2_scb6_spi_m_miso: p11_2_scb6_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(11, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_3_scb7_spi_m_miso: p13_3_scb7_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(13, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_7_scb8_spi_m_miso: p13_7_scb8_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(13, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_2_scb9_spi_m_miso: p15_2_scb9_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(15, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_2_scb10_spi_m_miso: p16_2_scb10_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(16, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_5_scb5_spi_m_miso: p16_5_scb5_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(16, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_5_scb11_spi_m_miso: p17_5_scb11_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(17, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_4_scb3_spi_m_miso: p21_4_scb3_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(21, 4, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_spi_m_mosi */
+ /omit-if-no-ref/ p6_7_scb2_spi_m_mosi: p6_7_scb2_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_1_scb0_spi_m_mosi: p8_1_scb0_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(8, 1, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_2_scb1_spi_m_mosi: p9_2_scb1_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p10_2_scb4_spi_m_mosi: p10_2_scb4_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(10, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_1_scb6_spi_m_mosi: p11_1_scb6_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(11, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_2_scb7_spi_m_mosi: p13_2_scb7_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_3_scb8_spi_m_mosi: p14_3_scb8_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_1_scb9_spi_m_mosi: p15_1_scb9_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_1_scb10_spi_m_mosi: p16_1_scb10_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_1_scb5_spi_m_mosi: p17_1_scb5_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_3_scb11_spi_m_mosi: p17_3_scb11_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_5_scb3_spi_m_mosi: p21_5_scb3_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(21, 5, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_spi_m_select0 */
+ /omit-if-no-ref/ p0_0_scb3_spi_m_select0: p0_0_scb3_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(0, 0, HSIOM_SEL_ACT_4)>;
+ };
+
+ /omit-if-no-ref/ p6_6_scb2_spi_m_select0: p6_6_scb2_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_2_scb0_spi_m_select0: p8_2_scb0_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(8, 2, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_0_scb1_spi_m_select0: p9_0_scb1_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(9, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p10_4_scb4_spi_m_select0: p10_4_scb4_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(10, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_3_scb6_spi_m_select0: p11_3_scb6_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(11, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_4_scb7_spi_m_select0: p13_4_scb7_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(13, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_7_scb8_spi_m_select0: p14_7_scb8_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(14, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_3_scb9_spi_m_select0: p15_3_scb9_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(15, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_3_scb10_spi_m_select0: p16_3_scb10_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(16, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_6_scb5_spi_m_select0: p16_6_scb5_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(16, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_6_scb11_spi_m_select0: p17_6_scb11_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(17, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_spi_m_select1 */
+ /omit-if-no-ref/ p6_3_scb2_spi_m_select1: p6_3_scb2_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(6, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_3_scb0_spi_m_select1: p8_3_scb0_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(8, 3, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p10_5_scb4_spi_m_select1: p10_5_scb4_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(10, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_4_scb6_spi_m_select1: p11_4_scb6_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(11, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_6_scb7_spi_m_select1: p13_6_scb7_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(13, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_6_scb8_spi_m_select1: p14_6_scb8_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(14, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_4_scb9_spi_m_select1: p15_4_scb9_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(15, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_4_scb10_spi_m_select1: p16_4_scb10_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(16, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_7_scb5_spi_m_select1: p16_7_scb5_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(16, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_7_scb11_spi_m_select1: p17_7_scb11_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(17, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p20_0_scb1_spi_m_select1: p20_0_scb1_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(20, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_7_scb3_spi_m_select1: p21_7_scb3_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(21, 7, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_spi_s_clk */
+ /omit-if-no-ref/ p6_5_scb2_spi_s_clk: p6_5_scb2_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_0_scb0_spi_s_clk: p8_0_scb0_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(8, 0, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_3_scb1_spi_s_clk: p9_3_scb1_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p10_1_scb4_spi_s_clk: p10_1_scb4_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(10, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_0_scb6_spi_s_clk: p11_0_scb6_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(11, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_1_scb7_spi_s_clk: p13_1_scb7_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_4_scb8_spi_s_clk: p14_4_scb8_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_0_scb9_spi_s_clk: p15_0_scb9_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_0_scb10_spi_s_clk: p16_0_scb10_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_0_scb5_spi_s_clk: p17_0_scb5_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_2_scb11_spi_s_clk: p17_2_scb11_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_6_scb3_spi_s_clk: p21_6_scb3_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(21, 6, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_spi_s_miso */
+ /omit-if-no-ref/ p6_4_scb2_spi_s_miso: p6_4_scb2_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_4_scb0_spi_s_miso: p8_4_scb0_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(8, 4, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_1_scb1_spi_s_miso: p9_1_scb1_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(9, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p10_3_scb4_spi_s_miso: p10_3_scb4_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(10, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_2_scb6_spi_s_miso: p11_2_scb6_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(11, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_3_scb7_spi_s_miso: p13_3_scb7_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(13, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_7_scb8_spi_s_miso: p13_7_scb8_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(13, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_2_scb9_spi_s_miso: p15_2_scb9_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(15, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_2_scb10_spi_s_miso: p16_2_scb10_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(16, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_5_scb5_spi_s_miso: p16_5_scb5_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(16, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_5_scb11_spi_s_miso: p17_5_scb11_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(17, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_4_scb3_spi_s_miso: p21_4_scb3_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(21, 4, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_spi_s_mosi */
+ /omit-if-no-ref/ p6_7_scb2_spi_s_mosi: p6_7_scb2_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_1_scb0_spi_s_mosi: p8_1_scb0_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(8, 1, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_2_scb1_spi_s_mosi: p9_2_scb1_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p10_2_scb4_spi_s_mosi: p10_2_scb4_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(10, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_1_scb6_spi_s_mosi: p11_1_scb6_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(11, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_2_scb7_spi_s_mosi: p13_2_scb7_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_3_scb8_spi_s_mosi: p14_3_scb8_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_1_scb9_spi_s_mosi: p15_1_scb9_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_1_scb10_spi_s_mosi: p16_1_scb10_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_1_scb5_spi_s_mosi: p17_1_scb5_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_3_scb11_spi_s_mosi: p17_3_scb11_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_5_scb3_spi_s_mosi: p21_5_scb3_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(21, 5, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_spi_s_select0 */
+ /omit-if-no-ref/ p0_0_scb3_spi_s_select0: p0_0_scb3_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(0, 0, HSIOM_SEL_ACT_4)>;
+ };
+
+ /omit-if-no-ref/ p6_6_scb2_spi_s_select0: p6_6_scb2_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_2_scb0_spi_s_select0: p8_2_scb0_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(8, 2, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_0_scb1_spi_s_select0: p9_0_scb1_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(9, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p10_4_scb4_spi_s_select0: p10_4_scb4_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(10, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_3_scb6_spi_s_select0: p11_3_scb6_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(11, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_4_scb7_spi_s_select0: p13_4_scb7_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(13, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_7_scb8_spi_s_select0: p14_7_scb8_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(14, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_3_scb9_spi_s_select0: p15_3_scb9_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(15, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_3_scb10_spi_s_select0: p16_3_scb10_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(16, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_6_scb5_spi_s_select0: p16_6_scb5_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(16, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_6_scb11_spi_s_select0: p17_6_scb11_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(17, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_spi_s_select1 */
+ /omit-if-no-ref/ p6_3_scb2_spi_s_select1: p6_3_scb2_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(6, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_3_scb0_spi_s_select1: p8_3_scb0_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(8, 3, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p10_5_scb4_spi_s_select1: p10_5_scb4_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(10, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_4_scb6_spi_s_select1: p11_4_scb6_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(11, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_6_scb7_spi_s_select1: p13_6_scb7_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(13, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_6_scb8_spi_s_select1: p14_6_scb8_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(14, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_4_scb9_spi_s_select1: p15_4_scb9_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(15, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_4_scb10_spi_s_select1: p16_4_scb10_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(16, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_7_scb5_spi_s_select1: p16_7_scb5_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(16, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_7_scb11_spi_s_select1: p17_7_scb11_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(17, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p20_0_scb1_spi_s_select1: p20_0_scb1_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(20, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_7_scb3_spi_s_select1: p21_7_scb3_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(21, 7, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_uart_cts */
+ /omit-if-no-ref/ p6_4_scb2_uart_cts: p6_4_scb2_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p9_1_scb1_uart_cts: p9_1_scb1_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(9, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p10_2_scb4_uart_cts: p10_2_scb4_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(10, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p11_2_scb6_uart_cts: p11_2_scb6_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(11, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p13_3_scb7_uart_cts: p13_3_scb7_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(13, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p13_7_scb8_uart_cts: p13_7_scb8_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(13, 7, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p15_2_scb9_uart_cts: p15_2_scb9_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(15, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_2_scb10_uart_cts: p16_2_scb10_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(16, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_5_scb5_uart_cts: p16_5_scb5_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(16, 5, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_5_scb11_uart_cts: p17_5_scb11_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(17, 5, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p21_4_scb3_uart_cts: p21_4_scb3_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(21, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_uart_rts */
+ /omit-if-no-ref/ p6_6_scb2_uart_rts: p6_6_scb2_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p9_0_scb1_uart_rts: p9_0_scb1_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(9, 0, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p10_3_scb4_uart_rts: p10_3_scb4_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(10, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p11_3_scb6_uart_rts: p11_3_scb6_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(11, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p13_4_scb7_uart_rts: p13_4_scb7_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(13, 4, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p14_7_scb8_uart_rts: p14_7_scb8_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(14, 7, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p15_3_scb9_uart_rts: p15_3_scb9_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(15, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_3_scb10_uart_rts: p16_3_scb10_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(16, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_6_scb5_uart_rts: p16_6_scb5_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(16, 6, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_6_scb11_uart_rts: p17_6_scb11_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(17, 6, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p21_7_scb3_uart_rts: p21_7_scb3_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(21, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_uart_rx */
+ /omit-if-no-ref/ p6_5_scb2_uart_rx: p6_5_scb2_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p9_3_scb1_uart_rx: p9_3_scb1_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p10_0_scb4_uart_rx: p10_0_scb4_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(10, 0, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p11_0_scb6_uart_rx: p11_0_scb6_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(11, 0, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p13_1_scb7_uart_rx: p13_1_scb7_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p14_4_scb8_uart_rx: p14_4_scb8_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p15_0_scb9_uart_rx: p15_0_scb9_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_0_scb10_uart_rx: p16_0_scb10_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_0_scb5_uart_rx: p17_0_scb5_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_2_scb11_uart_rx: p17_2_scb11_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p21_6_scb3_uart_rx: p21_6_scb3_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(21, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_uart_tx */
+ /omit-if-no-ref/ p6_7_scb2_uart_tx: p6_7_scb2_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p9_2_scb1_uart_tx: p9_2_scb1_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p10_1_scb4_uart_tx: p10_1_scb4_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(10, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p11_1_scb6_uart_tx: p11_1_scb6_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(11, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p13_2_scb7_uart_tx: p13_2_scb7_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p14_3_scb8_uart_tx: p14_3_scb8_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p15_1_scb9_uart_tx: p15_1_scb9_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_1_scb10_uart_tx: p16_1_scb10_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_1_scb5_uart_tx: p17_1_scb5_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_3_scb11_uart_tx: p17_3_scb11_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p21_5_scb3_uart_tx: p21_5_scb3_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(21, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* sdhc_card_cmd */
+ /omit-if-no-ref/ p7_0_sdhc1_card_cmd: p7_0_sdhc1_card_cmd {
+ pinmux = <DT_CAT1_PINMUX(7, 0, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p21_0_sdhc0_card_cmd: p21_0_sdhc0_card_cmd {
+ pinmux = <DT_CAT1_PINMUX(21, 0, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_dat_3to0 */
+ /omit-if-no-ref/ p7_3_sdhc1_card_dat_3to0: p7_3_sdhc1_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(7, 3, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p7_5_sdhc1_card_dat_3to0: p7_5_sdhc1_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(7, 5, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p7_6_sdhc1_card_dat_3to0: p7_6_sdhc1_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(7, 6, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p7_7_sdhc1_card_dat_3to0: p7_7_sdhc1_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(7, 7, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p12_1_sdhc0_card_dat_3to0: p12_1_sdhc0_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(12, 1, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p12_2_sdhc0_card_dat_3to0: p12_2_sdhc0_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(12, 2, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p12_4_sdhc0_card_dat_3to0: p12_4_sdhc0_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(12, 4, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p12_5_sdhc0_card_dat_3to0: p12_5_sdhc0_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(12, 5, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_dat_7to4 */
+ /omit-if-no-ref/ p6_4_sdhc1_card_dat_7to4: p6_4_sdhc1_card_dat_7to4 {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p6_5_sdhc1_card_dat_7to4: p6_5_sdhc1_card_dat_7to4 {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p6_6_sdhc1_card_dat_7to4: p6_6_sdhc1_card_dat_7to4 {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p6_7_sdhc1_card_dat_7to4: p6_7_sdhc1_card_dat_7to4 {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_detect_n */
+ /omit-if-no-ref/ p7_4_sdhc1_card_detect_n: p7_4_sdhc1_card_detect_n {
+ pinmux = <DT_CAT1_PINMUX(7, 4, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p21_1_sdhc0_card_detect_n: p21_1_sdhc0_card_detect_n {
+ pinmux = <DT_CAT1_PINMUX(21, 1, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_emmc_reset_n */
+ /omit-if-no-ref/
+ p7_2_sdhc1_card_emmc_reset_n: p7_2_sdhc1_card_emmc_reset_n {
+ pinmux = <DT_CAT1_PINMUX(7, 2, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_if_pwr_en */
+ /omit-if-no-ref/ p6_2_sdhc1_card_if_pwr_en: p6_2_sdhc1_card_if_pwr_en {
+ pinmux = <DT_CAT1_PINMUX(6, 2, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p21_4_sdhc0_card_if_pwr_en: p21_4_sdhc0_card_if_pwr_en {
+ pinmux = <DT_CAT1_PINMUX(21, 4, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_mech_write_prot */
+ /omit-if-no-ref/
+ p3_0_sdhc1_card_mech_write_prot: p3_0_sdhc1_card_mech_write_prot {
+ pinmux = <DT_CAT1_PINMUX(3, 0, HSIOM_SEL_ACT_14)>;
+ };
+
+ /omit-if-no-ref/
+ p6_0_sdhc1_card_mech_write_prot: p6_0_sdhc1_card_mech_write_prot {
+ pinmux = <DT_CAT1_PINMUX(6, 0, HSIOM_SEL_ACT_14)>;
+ };
+
+ /omit-if-no-ref/
+ p21_2_sdhc0_card_mech_write_prot: p21_2_sdhc0_card_mech_write_prot {
+ pinmux = <DT_CAT1_PINMUX(21, 2, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_clk_card */
+ /omit-if-no-ref/ p7_1_sdhc1_clk_card: p7_1_sdhc1_clk_card {
+ pinmux = <DT_CAT1_PINMUX(7, 1, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p12_0_sdhc0_clk_card: p12_0_sdhc0_clk_card {
+ pinmux = <DT_CAT1_PINMUX(12, 0, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_io_volt_sel */
+ /omit-if-no-ref/ p6_3_sdhc1_io_volt_sel: p6_3_sdhc1_io_volt_sel {
+ pinmux = <DT_CAT1_PINMUX(6, 3, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p21_3_sdhc0_io_volt_sel: p21_3_sdhc0_io_volt_sel {
+ pinmux = <DT_CAT1_PINMUX(21, 3, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_led_ctrl */
+ /omit-if-no-ref/ p6_1_sdhc1_led_ctrl: p6_1_sdhc1_led_ctrl {
+ pinmux = <DT_CAT1_PINMUX(6, 1, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* PWM tcpwm_line*/
+ /omit-if-no-ref/ p0_0_pwm0_0: p0_0_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(0, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_0_pwm0_1: p1_0_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(1, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_2_pwm0_2: p1_2_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(1, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_4_pwm0_3: p1_4_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(1, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_6_pwm0_4: p1_6_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(1, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p2_0_pwm0_5: p2_0_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(2, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p3_1_pwm0_6: p3_1_pwm0_6 {
+ pinmux = <DT_CAT1_PINMUX(3, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_1_pwm0_7: p4_1_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(4, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_3_pwm0_0: p4_3_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(4, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_5_pwm0_1: p4_5_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(4, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_7_pwm0_2: p4_7_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(4, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_0_pwm0_3: p6_0_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(6, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_2_pwm0_4: p6_2_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(6, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_4_pwm0_5: p6_4_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_6_pwm0_6: p6_6_pwm0_6 {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_0_pwm0_7: p7_0_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(7, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_2_pwm0_0: p7_2_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(7, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_4_pwm0_1: p7_4_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(7, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_6_pwm0_2: p7_6_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(7, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_0_pwm0_3: p8_0_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(8, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_2_pwm0_4: p8_2_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(8, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_4_pwm0_5: p8_4_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(8, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_6_pwm0_6: p8_6_pwm0_6 {
+ pinmux = <DT_CAT1_PINMUX(8, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p9_0_pwm0_7: p9_0_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(9, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p9_1_pwm0_0: p9_1_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(9, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p10_0_pwm0_1: p10_0_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(10, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p10_2_pwm0_2: p10_2_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(10, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p10_4_pwm0_3: p10_4_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(10, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p10_6_pwm0_4: p10_6_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(10, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p11_0_pwm0_5: p11_0_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(11, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p11_2_pwm0_6: p11_2_pwm0_6 {
+ pinmux = <DT_CAT1_PINMUX(11, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p11_4_pwm0_7: p11_4_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(11, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p11_6_pwm0_0: p11_6_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(11, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_0_pwm0_1: p12_0_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(12, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_2_pwm0_2: p12_2_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(12, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_4_pwm0_3: p12_4_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(12, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p13_1_pwm0_4: p13_1_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p13_3_pwm0_5: p13_3_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(13, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p13_6_pwm0_6: p13_6_pwm0_6 {
+ pinmux = <DT_CAT1_PINMUX(13, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p14_1_pwm0_7: p14_1_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(14, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p14_3_pwm0_0: p14_3_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p14_6_pwm0_1: p14_6_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(14, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_0_pwm0_2: p15_0_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_2_pwm0_3: p15_2_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(15, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_4_pwm0_4: p15_4_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(15, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_6_pwm0_5: p15_6_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(15, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_0_pwm0_0: p16_0_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_1_pwm0_1: p16_1_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_2_pwm0_2: p16_2_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(16, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_3_pwm0_3: p16_3_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(16, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_4_pwm0_4: p16_4_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(16, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_5_pwm0_5: p16_5_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(16, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_6_pwm0_6: p16_6_pwm0_6 {
+ pinmux = <DT_CAT1_PINMUX(16, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_7_pwm0_7: p16_7_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(16, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p20_0_pwm0_7: p20_0_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(20, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p20_1_pwm0_0: p20_1_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(20, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p20_2_pwm0_1: p20_2_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(20, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p20_3_pwm0_2: p20_3_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(20, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_0_pwm0_3: p21_0_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(21, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_2_pwm0_4: p21_2_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(21, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_4_pwm0_5: p21_4_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(21, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_6_pwm0_6: p21_6_pwm0_6 {
+ pinmux = <DT_CAT1_PINMUX(21, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p0_0_pwm1_0: p0_0_pwm1_0 {
+ pinmux = <DT_CAT1_PINMUX(0, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_0_pwm1_1: p1_0_pwm1_1 {
+ pinmux = <DT_CAT1_PINMUX(1, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_2_pwm1_2: p1_2_pwm1_2 {
+ pinmux = <DT_CAT1_PINMUX(1, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_4_pwm1_3: p1_4_pwm1_3 {
+ pinmux = <DT_CAT1_PINMUX(1, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_6_pwm1_4: p1_6_pwm1_4 {
+ pinmux = <DT_CAT1_PINMUX(1, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p2_0_pwm1_5: p2_0_pwm1_5 {
+ pinmux = <DT_CAT1_PINMUX(2, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p3_1_pwm1_6: p3_1_pwm1_6 {
+ pinmux = <DT_CAT1_PINMUX(3, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_1_pwm1_7: p4_1_pwm1_7 {
+ pinmux = <DT_CAT1_PINMUX(4, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_3_pwm1_8: p4_3_pwm1_8 {
+ pinmux = <DT_CAT1_PINMUX(4, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_5_pwm1_9: p4_5_pwm1_9 {
+ pinmux = <DT_CAT1_PINMUX(4, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_7_pwm1_10: p4_7_pwm1_10 {
+ pinmux = <DT_CAT1_PINMUX(4, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_0_pwm1_11: p6_0_pwm1_11 {
+ pinmux = <DT_CAT1_PINMUX(6, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_2_pwm1_12: p6_2_pwm1_12 {
+ pinmux = <DT_CAT1_PINMUX(6, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_4_pwm1_13: p6_4_pwm1_13 {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_6_pwm1_14: p6_6_pwm1_14 {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_0_pwm1_15: p7_0_pwm1_15 {
+ pinmux = <DT_CAT1_PINMUX(7, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_2_pwm1_16: p7_2_pwm1_16 {
+ pinmux = <DT_CAT1_PINMUX(7, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_4_pwm1_17: p7_4_pwm1_17 {
+ pinmux = <DT_CAT1_PINMUX(7, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_6_pwm1_18: p7_6_pwm1_18 {
+ pinmux = <DT_CAT1_PINMUX(7, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_0_pwm1_19: p8_0_pwm1_19 {
+ pinmux = <DT_CAT1_PINMUX(8, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_2_pwm1_20: p8_2_pwm1_20 {
+ pinmux = <DT_CAT1_PINMUX(8, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_4_pwm1_21: p8_4_pwm1_21 {
+ pinmux = <DT_CAT1_PINMUX(8, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_6_pwm1_22: p8_6_pwm1_22 {
+ pinmux = <DT_CAT1_PINMUX(8, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p9_2_pwm1_23: p9_2_pwm1_23 {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p9_3_pwm1_0: p9_3_pwm1_0 {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p10_0_pwm1_1: p10_0_pwm1_1 {
+ pinmux = <DT_CAT1_PINMUX(10, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p10_2_pwm1_2: p10_2_pwm1_2 {
+ pinmux = <DT_CAT1_PINMUX(10, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p10_4_pwm1_3: p10_4_pwm1_3 {
+ pinmux = <DT_CAT1_PINMUX(10, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p10_6_pwm1_4: p10_6_pwm1_4 {
+ pinmux = <DT_CAT1_PINMUX(10, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p11_0_pwm1_5: p11_0_pwm1_5 {
+ pinmux = <DT_CAT1_PINMUX(11, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p11_2_pwm1_6: p11_2_pwm1_6 {
+ pinmux = <DT_CAT1_PINMUX(11, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p11_4_pwm1_7: p11_4_pwm1_7 {
+ pinmux = <DT_CAT1_PINMUX(11, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p11_6_pwm1_8: p11_6_pwm1_8 {
+ pinmux = <DT_CAT1_PINMUX(11, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_0_pwm1_9: p12_0_pwm1_9 {
+ pinmux = <DT_CAT1_PINMUX(12, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_2_pwm1_10: p12_2_pwm1_10 {
+ pinmux = <DT_CAT1_PINMUX(12, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_4_pwm1_11: p12_4_pwm1_11 {
+ pinmux = <DT_CAT1_PINMUX(12, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p13_1_pwm1_12: p13_1_pwm1_12 {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p13_3_pwm1_13: p13_3_pwm1_13 {
+ pinmux = <DT_CAT1_PINMUX(13, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p13_6_pwm1_14: p13_6_pwm1_14 {
+ pinmux = <DT_CAT1_PINMUX(13, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p14_1_pwm1_15: p14_1_pwm1_15 {
+ pinmux = <DT_CAT1_PINMUX(14, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p14_3_pwm1_16: p14_3_pwm1_16 {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p14_6_pwm1_17: p14_6_pwm1_17 {
+ pinmux = <DT_CAT1_PINMUX(14, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_0_pwm1_18: p15_0_pwm1_18 {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_2_pwm1_19: p15_2_pwm1_19 {
+ pinmux = <DT_CAT1_PINMUX(15, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_4_pwm1_20: p15_4_pwm1_20 {
+ pinmux = <DT_CAT1_PINMUX(15, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_6_pwm1_21: p15_6_pwm1_21 {
+ pinmux = <DT_CAT1_PINMUX(15, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_0_pwm1_0: p16_0_pwm1_0 {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_1_pwm1_1: p16_1_pwm1_1 {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_2_pwm1_2: p16_2_pwm1_2 {
+ pinmux = <DT_CAT1_PINMUX(16, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_3_pwm1_3: p16_3_pwm1_3 {
+ pinmux = <DT_CAT1_PINMUX(16, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_4_pwm1_4: p16_4_pwm1_4 {
+ pinmux = <DT_CAT1_PINMUX(16, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_5_pwm1_5: p16_5_pwm1_5 {
+ pinmux = <DT_CAT1_PINMUX(16, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_6_pwm1_22: p16_6_pwm1_22 {
+ pinmux = <DT_CAT1_PINMUX(16, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_7_pwm1_23: p16_7_pwm1_23 {
+ pinmux = <DT_CAT1_PINMUX(16, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p20_4_pwm1_7: p20_4_pwm1_7 {
+ pinmux = <DT_CAT1_PINMUX(20, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p20_5_pwm1_8: p20_5_pwm1_8 {
+ pinmux = <DT_CAT1_PINMUX(20, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p20_6_pwm1_9: p20_6_pwm1_9 {
+ pinmux = <DT_CAT1_PINMUX(20, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p20_7_pwm1_10: p20_7_pwm1_10 {
+ pinmux = <DT_CAT1_PINMUX(20, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_0_pwm1_11: p21_0_pwm1_11 {
+ pinmux = <DT_CAT1_PINMUX(21, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_2_pwm1_12: p21_2_pwm1_12 {
+ pinmux = <DT_CAT1_PINMUX(21, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_4_pwm1_13: p21_4_pwm1_13 {
+ pinmux = <DT_CAT1_PINMUX(21, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_6_pwm1_14: p21_6_pwm1_14 {
+ pinmux = <DT_CAT1_PINMUX(21, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /* PWM tcpwm_line_compl*/
+ /omit-if-no-ref/ p0_1_pwm0_0: p0_1_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(0, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_1_pwm0_1: p1_1_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_3_pwm0_2: p1_3_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_5_pwm0_3: p1_5_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_7_pwm0_4: p1_7_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p3_0_pwm0_5: p3_0_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(3, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_0_pwm0_6: p4_0_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_2_pwm0_7: p4_2_pwm0_7_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_4_pwm0_0: p4_4_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_6_pwm0_1: p4_6_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p5_0_pwm0_2: p5_0_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(5, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_1_pwm0_3: p6_1_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_3_pwm0_4: p6_3_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_5_pwm0_5: p6_5_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_7_pwm0_6: p6_7_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_1_pwm0_7: p7_1_pwm0_7_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_3_pwm0_0: p7_3_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_5_pwm0_1: p7_5_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_7_pwm0_2: p7_7_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_1_pwm0_3: p8_1_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_3_pwm0_4: p8_3_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_5_pwm0_5: p8_5_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_7_pwm0_6: p8_7_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p9_2_pwm0_7: p9_2_pwm0_7_compl {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p9_3_pwm0_0: p9_3_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p10_1_pwm0_1: p10_1_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(10, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p10_3_pwm0_2: p10_3_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(10, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p10_5_pwm0_3: p10_5_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(10, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p10_7_pwm0_4: p10_7_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(10, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p11_1_pwm0_5: p11_1_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(11, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p11_3_pwm0_6: p11_3_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(11, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p11_5_pwm0_7: p11_5_pwm0_7_compl {
+ pinmux = <DT_CAT1_PINMUX(11, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p11_7_pwm0_0: p11_7_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(11, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_1_pwm0_1: p12_1_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_3_pwm0_2: p12_3_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_5_pwm0_3: p12_5_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p13_2_pwm0_4: p13_2_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p13_4_pwm0_5: p13_4_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(13, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p13_7_pwm0_6: p13_7_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(13, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p14_2_pwm0_7: p14_2_pwm0_7_compl {
+ pinmux = <DT_CAT1_PINMUX(14, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p14_4_pwm0_0: p14_4_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p14_7_pwm0_1: p14_7_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(14, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_1_pwm0_2: p15_1_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_3_pwm0_3: p15_3_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_5_pwm0_4: p15_5_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_7_pwm0_5: p15_7_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_0_pwm0_0: p17_0_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_1_pwm0_1: p17_1_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_2_pwm0_2: p17_2_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_3_pwm0_3: p17_3_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_4_pwm0_4: p17_4_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_5_pwm0_5: p17_5_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_6_pwm0_6: p17_6_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_7_pwm0_7: p17_7_pwm0_7_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p20_4_pwm0_7: p20_4_pwm0_7_compl {
+ pinmux = <DT_CAT1_PINMUX(20, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p20_5_pwm0_0: p20_5_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(20, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p20_6_pwm0_1: p20_6_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(20, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p20_7_pwm0_2: p20_7_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(20, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_1_pwm0_3: p21_1_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_3_pwm0_4: p21_3_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_5_pwm0_5: p21_5_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_7_pwm0_6: p21_7_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p0_1_pwm1_0: p0_1_pwm1_0_compl {
+ pinmux = <DT_CAT1_PINMUX(0, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_1_pwm1_1: p1_1_pwm1_1_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_3_pwm1_2: p1_3_pwm1_2_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_5_pwm1_3: p1_5_pwm1_3_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_7_pwm1_4: p1_7_pwm1_4_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p3_0_pwm1_5: p3_0_pwm1_5_compl {
+ pinmux = <DT_CAT1_PINMUX(3, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_0_pwm1_6: p4_0_pwm1_6_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_2_pwm1_7: p4_2_pwm1_7_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_4_pwm1_8: p4_4_pwm1_8_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_6_pwm1_9: p4_6_pwm1_9_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p5_0_pwm1_10: p5_0_pwm1_10_compl {
+ pinmux = <DT_CAT1_PINMUX(5, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_1_pwm1_11: p6_1_pwm1_11_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_3_pwm1_12: p6_3_pwm1_12_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_5_pwm1_13: p6_5_pwm1_13_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_7_pwm1_14: p6_7_pwm1_14_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_1_pwm1_15: p7_1_pwm1_15_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_3_pwm1_16: p7_3_pwm1_16_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_5_pwm1_17: p7_5_pwm1_17_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_7_pwm1_18: p7_7_pwm1_18_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_1_pwm1_19: p8_1_pwm1_19_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_3_pwm1_20: p8_3_pwm1_20_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_5_pwm1_21: p8_5_pwm1_21_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_7_pwm1_22: p8_7_pwm1_22_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p9_0_pwm1_23: p9_0_pwm1_23_compl {
+ pinmux = <DT_CAT1_PINMUX(9, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p9_1_pwm1_0: p9_1_pwm1_0_compl {
+ pinmux = <DT_CAT1_PINMUX(9, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p10_1_pwm1_1: p10_1_pwm1_1_compl {
+ pinmux = <DT_CAT1_PINMUX(10, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p10_3_pwm1_2: p10_3_pwm1_2_compl {
+ pinmux = <DT_CAT1_PINMUX(10, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p10_5_pwm1_3: p10_5_pwm1_3_compl {
+ pinmux = <DT_CAT1_PINMUX(10, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p10_7_pwm1_4: p10_7_pwm1_4_compl {
+ pinmux = <DT_CAT1_PINMUX(10, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p11_1_pwm1_5: p11_1_pwm1_5_compl {
+ pinmux = <DT_CAT1_PINMUX(11, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p11_3_pwm1_6: p11_3_pwm1_6_compl {
+ pinmux = <DT_CAT1_PINMUX(11, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p11_5_pwm1_7: p11_5_pwm1_7_compl {
+ pinmux = <DT_CAT1_PINMUX(11, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p11_7_pwm1_8: p11_7_pwm1_8_compl {
+ pinmux = <DT_CAT1_PINMUX(11, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_1_pwm1_9: p12_1_pwm1_9_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_3_pwm1_10: p12_3_pwm1_10_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_5_pwm1_11: p12_5_pwm1_11_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p13_2_pwm1_12: p13_2_pwm1_12_compl {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p13_4_pwm1_13: p13_4_pwm1_13_compl {
+ pinmux = <DT_CAT1_PINMUX(13, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p13_7_pwm1_14: p13_7_pwm1_14_compl {
+ pinmux = <DT_CAT1_PINMUX(13, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p14_2_pwm1_15: p14_2_pwm1_15_compl {
+ pinmux = <DT_CAT1_PINMUX(14, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p14_4_pwm1_16: p14_4_pwm1_16_compl {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p14_7_pwm1_17: p14_7_pwm1_17_compl {
+ pinmux = <DT_CAT1_PINMUX(14, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_1_pwm1_18: p15_1_pwm1_18_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_3_pwm1_19: p15_3_pwm1_19_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_5_pwm1_20: p15_5_pwm1_20_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_7_pwm1_21: p15_7_pwm1_21_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_0_pwm1_0: p17_0_pwm1_0_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_1_pwm1_1: p17_1_pwm1_1_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_2_pwm1_2: p17_2_pwm1_2_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_3_pwm1_3: p17_3_pwm1_3_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_4_pwm1_4: p17_4_pwm1_4_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_5_pwm1_5: p17_5_pwm1_5_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_6_pwm1_22: p17_6_pwm1_22_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_7_pwm1_23: p17_7_pwm1_23_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p20_0_pwm1_7: p20_0_pwm1_7_compl {
+ pinmux = <DT_CAT1_PINMUX(20, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p20_1_pwm1_8: p20_1_pwm1_8_compl {
+ pinmux = <DT_CAT1_PINMUX(20, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p20_2_pwm1_9: p20_2_pwm1_9_compl {
+ pinmux = <DT_CAT1_PINMUX(20, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p20_3_pwm1_10: p20_3_pwm1_10_compl {
+ pinmux = <DT_CAT1_PINMUX(20, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_1_pwm1_11: p21_1_pwm1_11_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_3_pwm1_12: p21_3_pwm1_12_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_5_pwm1_13: p21_5_pwm1_13_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_7_pwm1_14: p21_7_pwm1_14_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 7, HSIOM_SEL_ACT_2)>;
+ };
+ };
+ };
+};
diff --git a/dts/arm/infineon/edge/pse84/pse84.ewlb-235_s.dtsi b/dts/arm/infineon/edge/pse84/pse84.ewlb-235_s.dtsi
new file mode 100644
index 0000000..7022a83
--- /dev/null
+++ b/dts/arm/infineon/edge/pse84/pse84.ewlb-235_s.dtsi
@@ -0,0 +1,1910 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/dt-bindings/gpio/gpio.h>
+#include <zephyr/dt-bindings/pinctrl/ifx_cat1-pinctrl.h>
+#include "pse84_s.dtsi"
+
+/ {
+ soc {
+ pinctrl: pinctrl@52800000 {
+ /* i3c_i3c_scl */
+ /omit-if-no-ref/ p3_0_i3c0_i3c_scl: p3_0_i3c0_i3c_scl {
+ pinmux = <DT_CAT1_PINMUX(3, 0, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* i3c_i3c_sda */
+ /omit-if-no-ref/ p3_1_i3c0_i3c_sda: p3_1_i3c0_i3c_sda {
+ pinmux = <DT_CAT1_PINMUX(3, 1, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* scb_i2c_scl */
+ /omit-if-no-ref/ p6_5_scb2_i2c_scl: p6_5_scb2_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p8_0_scb0_i2c_scl: p8_0_scb0_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(8, 0, HSIOM_SEL_DS_3)>;
+ };
+
+ /omit-if-no-ref/ p9_3_scb1_i2c_scl: p9_3_scb1_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p10_0_scb4_i2c_scl: p10_0_scb4_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(10, 0, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p11_0_scb6_i2c_scl: p11_0_scb6_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(11, 0, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p13_1_scb7_i2c_scl: p13_1_scb7_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p14_4_scb8_i2c_scl: p14_4_scb8_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p15_0_scb9_i2c_scl: p15_0_scb9_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p16_0_scb10_i2c_scl: p16_0_scb10_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p17_0_scb5_i2c_scl: p17_0_scb5_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p17_2_scb11_i2c_scl: p17_2_scb11_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p21_6_scb3_i2c_scl: p21_6_scb3_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(21, 6, HSIOM_SEL_ACT_5)>;
+ };
+
+ /* scb_i2c_sda */
+ /omit-if-no-ref/ p6_7_scb2_i2c_sda: p6_7_scb2_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p8_1_scb0_i2c_sda: p8_1_scb0_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(8, 1, HSIOM_SEL_DS_3)>;
+ };
+
+ /omit-if-no-ref/ p9_2_scb1_i2c_sda: p9_2_scb1_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p10_1_scb4_i2c_sda: p10_1_scb4_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(10, 1, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p11_1_scb6_i2c_sda: p11_1_scb6_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(11, 1, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p13_2_scb7_i2c_sda: p13_2_scb7_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p14_3_scb8_i2c_sda: p14_3_scb8_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p15_1_scb9_i2c_sda: p15_1_scb9_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p16_1_scb10_i2c_sda: p16_1_scb10_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p17_1_scb5_i2c_sda: p17_1_scb5_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p17_3_scb11_i2c_sda: p17_3_scb11_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p21_5_scb3_i2c_sda: p21_5_scb3_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(21, 5, HSIOM_SEL_ACT_5)>;
+ };
+
+ /* scb_spi_m_clk */
+ /omit-if-no-ref/ p6_5_scb2_spi_m_clk: p6_5_scb2_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_0_scb0_spi_m_clk: p8_0_scb0_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(8, 0, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_3_scb1_spi_m_clk: p9_3_scb1_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p10_1_scb4_spi_m_clk: p10_1_scb4_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(10, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_0_scb6_spi_m_clk: p11_0_scb6_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(11, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_1_scb7_spi_m_clk: p13_1_scb7_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_4_scb8_spi_m_clk: p14_4_scb8_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_0_scb9_spi_m_clk: p15_0_scb9_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_0_scb10_spi_m_clk: p16_0_scb10_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_0_scb5_spi_m_clk: p17_0_scb5_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_2_scb11_spi_m_clk: p17_2_scb11_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_6_scb3_spi_m_clk: p21_6_scb3_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(21, 6, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_spi_m_miso */
+ /omit-if-no-ref/ p6_4_scb2_spi_m_miso: p6_4_scb2_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_4_scb0_spi_m_miso: p8_4_scb0_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(8, 4, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_1_scb1_spi_m_miso: p9_1_scb1_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(9, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p10_3_scb4_spi_m_miso: p10_3_scb4_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(10, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_2_scb6_spi_m_miso: p11_2_scb6_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(11, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_3_scb7_spi_m_miso: p13_3_scb7_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(13, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_7_scb8_spi_m_miso: p13_7_scb8_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(13, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_2_scb9_spi_m_miso: p15_2_scb9_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(15, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_2_scb10_spi_m_miso: p16_2_scb10_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(16, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_5_scb5_spi_m_miso: p16_5_scb5_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(16, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_5_scb11_spi_m_miso: p17_5_scb11_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(17, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_4_scb3_spi_m_miso: p21_4_scb3_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(21, 4, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_spi_m_mosi */
+ /omit-if-no-ref/ p6_7_scb2_spi_m_mosi: p6_7_scb2_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_1_scb0_spi_m_mosi: p8_1_scb0_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(8, 1, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_2_scb1_spi_m_mosi: p9_2_scb1_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p10_2_scb4_spi_m_mosi: p10_2_scb4_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(10, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_1_scb6_spi_m_mosi: p11_1_scb6_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(11, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_2_scb7_spi_m_mosi: p13_2_scb7_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_3_scb8_spi_m_mosi: p14_3_scb8_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_1_scb9_spi_m_mosi: p15_1_scb9_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_1_scb10_spi_m_mosi: p16_1_scb10_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_1_scb5_spi_m_mosi: p17_1_scb5_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_3_scb11_spi_m_mosi: p17_3_scb11_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_5_scb3_spi_m_mosi: p21_5_scb3_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(21, 5, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_spi_m_select0 */
+ /omit-if-no-ref/ p0_0_scb3_spi_m_select0: p0_0_scb3_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(0, 0, HSIOM_SEL_ACT_4)>;
+ };
+
+ /omit-if-no-ref/ p6_6_scb2_spi_m_select0: p6_6_scb2_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_2_scb0_spi_m_select0: p8_2_scb0_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(8, 2, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_0_scb1_spi_m_select0: p9_0_scb1_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(9, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p10_4_scb4_spi_m_select0: p10_4_scb4_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(10, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_3_scb6_spi_m_select0: p11_3_scb6_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(11, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_4_scb7_spi_m_select0: p13_4_scb7_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(13, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_7_scb8_spi_m_select0: p14_7_scb8_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(14, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_3_scb9_spi_m_select0: p15_3_scb9_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(15, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_3_scb10_spi_m_select0: p16_3_scb10_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(16, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_6_scb5_spi_m_select0: p16_6_scb5_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(16, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_6_scb11_spi_m_select0: p17_6_scb11_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(17, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_spi_m_select1 */
+ /omit-if-no-ref/ p6_3_scb2_spi_m_select1: p6_3_scb2_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(6, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_3_scb0_spi_m_select1: p8_3_scb0_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(8, 3, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p10_5_scb4_spi_m_select1: p10_5_scb4_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(10, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_4_scb6_spi_m_select1: p11_4_scb6_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(11, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_6_scb7_spi_m_select1: p13_6_scb7_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(13, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_6_scb8_spi_m_select1: p14_6_scb8_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(14, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_4_scb9_spi_m_select1: p15_4_scb9_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(15, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_4_scb10_spi_m_select1: p16_4_scb10_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(16, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_7_scb5_spi_m_select1: p16_7_scb5_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(16, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_7_scb11_spi_m_select1: p17_7_scb11_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(17, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p20_0_scb1_spi_m_select1: p20_0_scb1_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(20, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_7_scb3_spi_m_select1: p21_7_scb3_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(21, 7, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_spi_s_clk */
+ /omit-if-no-ref/ p6_5_scb2_spi_s_clk: p6_5_scb2_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_0_scb0_spi_s_clk: p8_0_scb0_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(8, 0, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_3_scb1_spi_s_clk: p9_3_scb1_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p10_1_scb4_spi_s_clk: p10_1_scb4_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(10, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_0_scb6_spi_s_clk: p11_0_scb6_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(11, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_1_scb7_spi_s_clk: p13_1_scb7_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_4_scb8_spi_s_clk: p14_4_scb8_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_0_scb9_spi_s_clk: p15_0_scb9_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_0_scb10_spi_s_clk: p16_0_scb10_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_0_scb5_spi_s_clk: p17_0_scb5_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_2_scb11_spi_s_clk: p17_2_scb11_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_6_scb3_spi_s_clk: p21_6_scb3_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(21, 6, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_spi_s_miso */
+ /omit-if-no-ref/ p6_4_scb2_spi_s_miso: p6_4_scb2_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_4_scb0_spi_s_miso: p8_4_scb0_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(8, 4, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_1_scb1_spi_s_miso: p9_1_scb1_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(9, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p10_3_scb4_spi_s_miso: p10_3_scb4_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(10, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_2_scb6_spi_s_miso: p11_2_scb6_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(11, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_3_scb7_spi_s_miso: p13_3_scb7_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(13, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_7_scb8_spi_s_miso: p13_7_scb8_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(13, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_2_scb9_spi_s_miso: p15_2_scb9_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(15, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_2_scb10_spi_s_miso: p16_2_scb10_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(16, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_5_scb5_spi_s_miso: p16_5_scb5_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(16, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_5_scb11_spi_s_miso: p17_5_scb11_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(17, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_4_scb3_spi_s_miso: p21_4_scb3_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(21, 4, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_spi_s_mosi */
+ /omit-if-no-ref/ p6_7_scb2_spi_s_mosi: p6_7_scb2_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_1_scb0_spi_s_mosi: p8_1_scb0_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(8, 1, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_2_scb1_spi_s_mosi: p9_2_scb1_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p10_2_scb4_spi_s_mosi: p10_2_scb4_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(10, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_1_scb6_spi_s_mosi: p11_1_scb6_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(11, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_2_scb7_spi_s_mosi: p13_2_scb7_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_3_scb8_spi_s_mosi: p14_3_scb8_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_1_scb9_spi_s_mosi: p15_1_scb9_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_1_scb10_spi_s_mosi: p16_1_scb10_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_1_scb5_spi_s_mosi: p17_1_scb5_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_3_scb11_spi_s_mosi: p17_3_scb11_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_5_scb3_spi_s_mosi: p21_5_scb3_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(21, 5, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_spi_s_select0 */
+ /omit-if-no-ref/ p0_0_scb3_spi_s_select0: p0_0_scb3_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(0, 0, HSIOM_SEL_ACT_4)>;
+ };
+
+ /omit-if-no-ref/ p6_6_scb2_spi_s_select0: p6_6_scb2_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_2_scb0_spi_s_select0: p8_2_scb0_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(8, 2, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_0_scb1_spi_s_select0: p9_0_scb1_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(9, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p10_4_scb4_spi_s_select0: p10_4_scb4_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(10, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_3_scb6_spi_s_select0: p11_3_scb6_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(11, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_4_scb7_spi_s_select0: p13_4_scb7_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(13, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_7_scb8_spi_s_select0: p14_7_scb8_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(14, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_3_scb9_spi_s_select0: p15_3_scb9_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(15, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_3_scb10_spi_s_select0: p16_3_scb10_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(16, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_6_scb5_spi_s_select0: p16_6_scb5_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(16, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_6_scb11_spi_s_select0: p17_6_scb11_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(17, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_spi_s_select1 */
+ /omit-if-no-ref/ p6_3_scb2_spi_s_select1: p6_3_scb2_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(6, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_3_scb0_spi_s_select1: p8_3_scb0_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(8, 3, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p10_5_scb4_spi_s_select1: p10_5_scb4_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(10, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p11_4_scb6_spi_s_select1: p11_4_scb6_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(11, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_6_scb7_spi_s_select1: p13_6_scb7_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(13, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_6_scb8_spi_s_select1: p14_6_scb8_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(14, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_4_scb9_spi_s_select1: p15_4_scb9_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(15, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_4_scb10_spi_s_select1: p16_4_scb10_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(16, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_7_scb5_spi_s_select1: p16_7_scb5_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(16, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_7_scb11_spi_s_select1: p17_7_scb11_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(17, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p20_0_scb1_spi_s_select1: p20_0_scb1_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(20, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_7_scb3_spi_s_select1: p21_7_scb3_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(21, 7, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_uart_cts */
+ /omit-if-no-ref/ p6_4_scb2_uart_cts: p6_4_scb2_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p9_1_scb1_uart_cts: p9_1_scb1_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(9, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p10_2_scb4_uart_cts: p10_2_scb4_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(10, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p11_2_scb6_uart_cts: p11_2_scb6_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(11, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p13_3_scb7_uart_cts: p13_3_scb7_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(13, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p13_7_scb8_uart_cts: p13_7_scb8_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(13, 7, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p15_2_scb9_uart_cts: p15_2_scb9_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(15, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_2_scb10_uart_cts: p16_2_scb10_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(16, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_5_scb5_uart_cts: p16_5_scb5_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(16, 5, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_5_scb11_uart_cts: p17_5_scb11_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(17, 5, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p21_4_scb3_uart_cts: p21_4_scb3_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(21, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_uart_rts */
+ /omit-if-no-ref/ p6_6_scb2_uart_rts: p6_6_scb2_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p9_0_scb1_uart_rts: p9_0_scb1_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(9, 0, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p10_3_scb4_uart_rts: p10_3_scb4_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(10, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p11_3_scb6_uart_rts: p11_3_scb6_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(11, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p13_4_scb7_uart_rts: p13_4_scb7_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(13, 4, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p14_7_scb8_uart_rts: p14_7_scb8_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(14, 7, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p15_3_scb9_uart_rts: p15_3_scb9_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(15, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_3_scb10_uart_rts: p16_3_scb10_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(16, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_6_scb5_uart_rts: p16_6_scb5_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(16, 6, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_6_scb11_uart_rts: p17_6_scb11_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(17, 6, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p21_7_scb3_uart_rts: p21_7_scb3_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(21, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_uart_rx */
+ /omit-if-no-ref/ p6_5_scb2_uart_rx: p6_5_scb2_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p9_3_scb1_uart_rx: p9_3_scb1_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p10_0_scb4_uart_rx: p10_0_scb4_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(10, 0, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p11_0_scb6_uart_rx: p11_0_scb6_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(11, 0, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p13_1_scb7_uart_rx: p13_1_scb7_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p14_4_scb8_uart_rx: p14_4_scb8_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p15_0_scb9_uart_rx: p15_0_scb9_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_0_scb10_uart_rx: p16_0_scb10_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_0_scb5_uart_rx: p17_0_scb5_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_2_scb11_uart_rx: p17_2_scb11_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p21_6_scb3_uart_rx: p21_6_scb3_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(21, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_uart_tx */
+ /omit-if-no-ref/ p6_7_scb2_uart_tx: p6_7_scb2_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p9_2_scb1_uart_tx: p9_2_scb1_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p10_1_scb4_uart_tx: p10_1_scb4_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(10, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p11_1_scb6_uart_tx: p11_1_scb6_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(11, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p13_2_scb7_uart_tx: p13_2_scb7_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p14_3_scb8_uart_tx: p14_3_scb8_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p15_1_scb9_uart_tx: p15_1_scb9_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_1_scb10_uart_tx: p16_1_scb10_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_1_scb5_uart_tx: p17_1_scb5_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_3_scb11_uart_tx: p17_3_scb11_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p21_5_scb3_uart_tx: p21_5_scb3_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(21, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* sdhc_card_cmd */
+ /omit-if-no-ref/ p7_0_sdhc1_card_cmd: p7_0_sdhc1_card_cmd {
+ pinmux = <DT_CAT1_PINMUX(7, 0, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p21_0_sdhc0_card_cmd: p21_0_sdhc0_card_cmd {
+ pinmux = <DT_CAT1_PINMUX(21, 0, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_dat_3to0 */
+ /omit-if-no-ref/ p7_3_sdhc1_card_dat_3to0: p7_3_sdhc1_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(7, 3, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p7_5_sdhc1_card_dat_3to0: p7_5_sdhc1_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(7, 5, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p7_6_sdhc1_card_dat_3to0: p7_6_sdhc1_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(7, 6, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p7_7_sdhc1_card_dat_3to0: p7_7_sdhc1_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(7, 7, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p12_1_sdhc0_card_dat_3to0: p12_1_sdhc0_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(12, 1, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p12_2_sdhc0_card_dat_3to0: p12_2_sdhc0_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(12, 2, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p12_4_sdhc0_card_dat_3to0: p12_4_sdhc0_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(12, 4, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p12_5_sdhc0_card_dat_3to0: p12_5_sdhc0_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(12, 5, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_dat_7to4 */
+ /omit-if-no-ref/ p6_4_sdhc1_card_dat_7to4: p6_4_sdhc1_card_dat_7to4 {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p6_5_sdhc1_card_dat_7to4: p6_5_sdhc1_card_dat_7to4 {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p6_6_sdhc1_card_dat_7to4: p6_6_sdhc1_card_dat_7to4 {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p6_7_sdhc1_card_dat_7to4: p6_7_sdhc1_card_dat_7to4 {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_detect_n */
+ /omit-if-no-ref/ p7_4_sdhc1_card_detect_n: p7_4_sdhc1_card_detect_n {
+ pinmux = <DT_CAT1_PINMUX(7, 4, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p21_1_sdhc0_card_detect_n: p21_1_sdhc0_card_detect_n {
+ pinmux = <DT_CAT1_PINMUX(21, 1, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_emmc_reset_n */
+ /omit-if-no-ref/
+ p7_2_sdhc1_card_emmc_reset_n: p7_2_sdhc1_card_emmc_reset_n {
+ pinmux = <DT_CAT1_PINMUX(7, 2, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_if_pwr_en */
+ /omit-if-no-ref/ p6_2_sdhc1_card_if_pwr_en: p6_2_sdhc1_card_if_pwr_en {
+ pinmux = <DT_CAT1_PINMUX(6, 2, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p21_4_sdhc0_card_if_pwr_en: p21_4_sdhc0_card_if_pwr_en {
+ pinmux = <DT_CAT1_PINMUX(21, 4, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_mech_write_prot */
+ /omit-if-no-ref/
+ p3_0_sdhc1_card_mech_write_prot: p3_0_sdhc1_card_mech_write_prot {
+ pinmux = <DT_CAT1_PINMUX(3, 0, HSIOM_SEL_ACT_14)>;
+ };
+
+ /omit-if-no-ref/
+ p6_0_sdhc1_card_mech_write_prot: p6_0_sdhc1_card_mech_write_prot {
+ pinmux = <DT_CAT1_PINMUX(6, 0, HSIOM_SEL_ACT_14)>;
+ };
+
+ /omit-if-no-ref/
+ p21_2_sdhc0_card_mech_write_prot: p21_2_sdhc0_card_mech_write_prot {
+ pinmux = <DT_CAT1_PINMUX(21, 2, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_clk_card */
+ /omit-if-no-ref/ p7_1_sdhc1_clk_card: p7_1_sdhc1_clk_card {
+ pinmux = <DT_CAT1_PINMUX(7, 1, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p12_0_sdhc0_clk_card: p12_0_sdhc0_clk_card {
+ pinmux = <DT_CAT1_PINMUX(12, 0, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_io_volt_sel */
+ /omit-if-no-ref/ p6_3_sdhc1_io_volt_sel: p6_3_sdhc1_io_volt_sel {
+ pinmux = <DT_CAT1_PINMUX(6, 3, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p21_3_sdhc0_io_volt_sel: p21_3_sdhc0_io_volt_sel {
+ pinmux = <DT_CAT1_PINMUX(21, 3, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_led_ctrl */
+ /omit-if-no-ref/ p6_1_sdhc1_led_ctrl: p6_1_sdhc1_led_ctrl {
+ pinmux = <DT_CAT1_PINMUX(6, 1, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* PWM tcpwm_line*/
+ /omit-if-no-ref/ p0_0_pwm0_0: p0_0_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(0, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_0_pwm0_1: p1_0_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(1, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_2_pwm0_2: p1_2_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(1, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_4_pwm0_3: p1_4_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(1, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_6_pwm0_4: p1_6_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(1, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p2_0_pwm0_5: p2_0_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(2, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p3_1_pwm0_6: p3_1_pwm0_6 {
+ pinmux = <DT_CAT1_PINMUX(3, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_1_pwm0_7: p4_1_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(4, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_3_pwm0_0: p4_3_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(4, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_5_pwm0_1: p4_5_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(4, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_7_pwm0_2: p4_7_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(4, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_0_pwm0_3: p6_0_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(6, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_2_pwm0_4: p6_2_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(6, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_4_pwm0_5: p6_4_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_6_pwm0_6: p6_6_pwm0_6 {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_0_pwm0_7: p7_0_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(7, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_2_pwm0_0: p7_2_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(7, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_4_pwm0_1: p7_4_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(7, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_6_pwm0_2: p7_6_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(7, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_0_pwm0_3: p8_0_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(8, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_2_pwm0_4: p8_2_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(8, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_4_pwm0_5: p8_4_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(8, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_6_pwm0_6: p8_6_pwm0_6 {
+ pinmux = <DT_CAT1_PINMUX(8, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p9_0_pwm0_7: p9_0_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(9, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p9_1_pwm0_0: p9_1_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(9, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p10_0_pwm0_1: p10_0_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(10, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p10_2_pwm0_2: p10_2_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(10, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p10_4_pwm0_3: p10_4_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(10, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p10_6_pwm0_4: p10_6_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(10, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p11_0_pwm0_5: p11_0_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(11, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p11_2_pwm0_6: p11_2_pwm0_6 {
+ pinmux = <DT_CAT1_PINMUX(11, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p11_4_pwm0_7: p11_4_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(11, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p11_6_pwm0_0: p11_6_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(11, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_0_pwm0_1: p12_0_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(12, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_2_pwm0_2: p12_2_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(12, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_4_pwm0_3: p12_4_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(12, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p13_1_pwm0_4: p13_1_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p13_3_pwm0_5: p13_3_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(13, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p13_6_pwm0_6: p13_6_pwm0_6 {
+ pinmux = <DT_CAT1_PINMUX(13, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p14_1_pwm0_7: p14_1_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(14, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p14_3_pwm0_0: p14_3_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p14_6_pwm0_1: p14_6_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(14, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_0_pwm0_2: p15_0_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_2_pwm0_3: p15_2_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(15, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_4_pwm0_4: p15_4_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(15, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_6_pwm0_5: p15_6_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(15, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_0_pwm0_0: p16_0_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_1_pwm0_1: p16_1_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_2_pwm0_2: p16_2_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(16, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_3_pwm0_3: p16_3_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(16, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_4_pwm0_4: p16_4_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(16, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_5_pwm0_5: p16_5_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(16, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_6_pwm0_6: p16_6_pwm0_6 {
+ pinmux = <DT_CAT1_PINMUX(16, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_7_pwm0_7: p16_7_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(16, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p20_0_pwm0_7: p20_0_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(20, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p20_1_pwm0_0: p20_1_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(20, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p20_2_pwm0_1: p20_2_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(20, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p20_3_pwm0_2: p20_3_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(20, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_0_pwm0_3: p21_0_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(21, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_2_pwm0_4: p21_2_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(21, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_4_pwm0_5: p21_4_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(21, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_6_pwm0_6: p21_6_pwm0_6 {
+ pinmux = <DT_CAT1_PINMUX(21, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p0_0_pwm1_0: p0_0_pwm1_0 {
+ pinmux = <DT_CAT1_PINMUX(0, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_0_pwm1_1: p1_0_pwm1_1 {
+ pinmux = <DT_CAT1_PINMUX(1, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_2_pwm1_2: p1_2_pwm1_2 {
+ pinmux = <DT_CAT1_PINMUX(1, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_4_pwm1_3: p1_4_pwm1_3 {
+ pinmux = <DT_CAT1_PINMUX(1, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_6_pwm1_4: p1_6_pwm1_4 {
+ pinmux = <DT_CAT1_PINMUX(1, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p2_0_pwm1_5: p2_0_pwm1_5 {
+ pinmux = <DT_CAT1_PINMUX(2, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p3_1_pwm1_6: p3_1_pwm1_6 {
+ pinmux = <DT_CAT1_PINMUX(3, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_1_pwm1_7: p4_1_pwm1_7 {
+ pinmux = <DT_CAT1_PINMUX(4, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_3_pwm1_8: p4_3_pwm1_8 {
+ pinmux = <DT_CAT1_PINMUX(4, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_5_pwm1_9: p4_5_pwm1_9 {
+ pinmux = <DT_CAT1_PINMUX(4, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_7_pwm1_10: p4_7_pwm1_10 {
+ pinmux = <DT_CAT1_PINMUX(4, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_0_pwm1_11: p6_0_pwm1_11 {
+ pinmux = <DT_CAT1_PINMUX(6, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_2_pwm1_12: p6_2_pwm1_12 {
+ pinmux = <DT_CAT1_PINMUX(6, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_4_pwm1_13: p6_4_pwm1_13 {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_6_pwm1_14: p6_6_pwm1_14 {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_0_pwm1_15: p7_0_pwm1_15 {
+ pinmux = <DT_CAT1_PINMUX(7, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_2_pwm1_16: p7_2_pwm1_16 {
+ pinmux = <DT_CAT1_PINMUX(7, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_4_pwm1_17: p7_4_pwm1_17 {
+ pinmux = <DT_CAT1_PINMUX(7, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_6_pwm1_18: p7_6_pwm1_18 {
+ pinmux = <DT_CAT1_PINMUX(7, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_0_pwm1_19: p8_0_pwm1_19 {
+ pinmux = <DT_CAT1_PINMUX(8, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_2_pwm1_20: p8_2_pwm1_20 {
+ pinmux = <DT_CAT1_PINMUX(8, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_4_pwm1_21: p8_4_pwm1_21 {
+ pinmux = <DT_CAT1_PINMUX(8, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_6_pwm1_22: p8_6_pwm1_22 {
+ pinmux = <DT_CAT1_PINMUX(8, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p9_2_pwm1_23: p9_2_pwm1_23 {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p9_3_pwm1_0: p9_3_pwm1_0 {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p10_0_pwm1_1: p10_0_pwm1_1 {
+ pinmux = <DT_CAT1_PINMUX(10, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p10_2_pwm1_2: p10_2_pwm1_2 {
+ pinmux = <DT_CAT1_PINMUX(10, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p10_4_pwm1_3: p10_4_pwm1_3 {
+ pinmux = <DT_CAT1_PINMUX(10, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p10_6_pwm1_4: p10_6_pwm1_4 {
+ pinmux = <DT_CAT1_PINMUX(10, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p11_0_pwm1_5: p11_0_pwm1_5 {
+ pinmux = <DT_CAT1_PINMUX(11, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p11_2_pwm1_6: p11_2_pwm1_6 {
+ pinmux = <DT_CAT1_PINMUX(11, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p11_4_pwm1_7: p11_4_pwm1_7 {
+ pinmux = <DT_CAT1_PINMUX(11, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p11_6_pwm1_8: p11_6_pwm1_8 {
+ pinmux = <DT_CAT1_PINMUX(11, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_0_pwm1_9: p12_0_pwm1_9 {
+ pinmux = <DT_CAT1_PINMUX(12, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_2_pwm1_10: p12_2_pwm1_10 {
+ pinmux = <DT_CAT1_PINMUX(12, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_4_pwm1_11: p12_4_pwm1_11 {
+ pinmux = <DT_CAT1_PINMUX(12, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p13_1_pwm1_12: p13_1_pwm1_12 {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p13_3_pwm1_13: p13_3_pwm1_13 {
+ pinmux = <DT_CAT1_PINMUX(13, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p13_6_pwm1_14: p13_6_pwm1_14 {
+ pinmux = <DT_CAT1_PINMUX(13, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p14_1_pwm1_15: p14_1_pwm1_15 {
+ pinmux = <DT_CAT1_PINMUX(14, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p14_3_pwm1_16: p14_3_pwm1_16 {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p14_6_pwm1_17: p14_6_pwm1_17 {
+ pinmux = <DT_CAT1_PINMUX(14, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_0_pwm1_18: p15_0_pwm1_18 {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_2_pwm1_19: p15_2_pwm1_19 {
+ pinmux = <DT_CAT1_PINMUX(15, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_4_pwm1_20: p15_4_pwm1_20 {
+ pinmux = <DT_CAT1_PINMUX(15, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_6_pwm1_21: p15_6_pwm1_21 {
+ pinmux = <DT_CAT1_PINMUX(15, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_0_pwm1_0: p16_0_pwm1_0 {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_1_pwm1_1: p16_1_pwm1_1 {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_2_pwm1_2: p16_2_pwm1_2 {
+ pinmux = <DT_CAT1_PINMUX(16, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_3_pwm1_3: p16_3_pwm1_3 {
+ pinmux = <DT_CAT1_PINMUX(16, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_4_pwm1_4: p16_4_pwm1_4 {
+ pinmux = <DT_CAT1_PINMUX(16, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_5_pwm1_5: p16_5_pwm1_5 {
+ pinmux = <DT_CAT1_PINMUX(16, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_6_pwm1_22: p16_6_pwm1_22 {
+ pinmux = <DT_CAT1_PINMUX(16, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_7_pwm1_23: p16_7_pwm1_23 {
+ pinmux = <DT_CAT1_PINMUX(16, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p20_4_pwm1_7: p20_4_pwm1_7 {
+ pinmux = <DT_CAT1_PINMUX(20, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p20_5_pwm1_8: p20_5_pwm1_8 {
+ pinmux = <DT_CAT1_PINMUX(20, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p20_6_pwm1_9: p20_6_pwm1_9 {
+ pinmux = <DT_CAT1_PINMUX(20, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p20_7_pwm1_10: p20_7_pwm1_10 {
+ pinmux = <DT_CAT1_PINMUX(20, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_0_pwm1_11: p21_0_pwm1_11 {
+ pinmux = <DT_CAT1_PINMUX(21, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_2_pwm1_12: p21_2_pwm1_12 {
+ pinmux = <DT_CAT1_PINMUX(21, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_4_pwm1_13: p21_4_pwm1_13 {
+ pinmux = <DT_CAT1_PINMUX(21, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_6_pwm1_14: p21_6_pwm1_14 {
+ pinmux = <DT_CAT1_PINMUX(21, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /* PWM tcpwm_line_compl*/
+ /omit-if-no-ref/ p0_1_pwm0_0: p0_1_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(0, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_1_pwm0_1: p1_1_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_3_pwm0_2: p1_3_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_5_pwm0_3: p1_5_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_7_pwm0_4: p1_7_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p3_0_pwm0_5: p3_0_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(3, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_0_pwm0_6: p4_0_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_2_pwm0_7: p4_2_pwm0_7_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_4_pwm0_0: p4_4_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_6_pwm0_1: p4_6_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p5_0_pwm0_2: p5_0_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(5, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_1_pwm0_3: p6_1_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_3_pwm0_4: p6_3_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_5_pwm0_5: p6_5_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_7_pwm0_6: p6_7_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_1_pwm0_7: p7_1_pwm0_7_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_3_pwm0_0: p7_3_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_5_pwm0_1: p7_5_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_7_pwm0_2: p7_7_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_1_pwm0_3: p8_1_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_3_pwm0_4: p8_3_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_5_pwm0_5: p8_5_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_7_pwm0_6: p8_7_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p9_2_pwm0_7: p9_2_pwm0_7_compl {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p9_3_pwm0_0: p9_3_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p10_1_pwm0_1: p10_1_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(10, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p10_3_pwm0_2: p10_3_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(10, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p10_5_pwm0_3: p10_5_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(10, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p10_7_pwm0_4: p10_7_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(10, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p11_1_pwm0_5: p11_1_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(11, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p11_3_pwm0_6: p11_3_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(11, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p11_5_pwm0_7: p11_5_pwm0_7_compl {
+ pinmux = <DT_CAT1_PINMUX(11, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p11_7_pwm0_0: p11_7_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(11, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_1_pwm0_1: p12_1_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_3_pwm0_2: p12_3_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_5_pwm0_3: p12_5_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p13_2_pwm0_4: p13_2_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p13_4_pwm0_5: p13_4_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(13, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p13_7_pwm0_6: p13_7_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(13, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p14_2_pwm0_7: p14_2_pwm0_7_compl {
+ pinmux = <DT_CAT1_PINMUX(14, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p14_4_pwm0_0: p14_4_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p14_7_pwm0_1: p14_7_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(14, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_1_pwm0_2: p15_1_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_3_pwm0_3: p15_3_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_5_pwm0_4: p15_5_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_7_pwm0_5: p15_7_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_0_pwm0_0: p17_0_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_1_pwm0_1: p17_1_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_2_pwm0_2: p17_2_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_3_pwm0_3: p17_3_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_4_pwm0_4: p17_4_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_5_pwm0_5: p17_5_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_6_pwm0_6: p17_6_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_7_pwm0_7: p17_7_pwm0_7_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p20_4_pwm0_7: p20_4_pwm0_7_compl {
+ pinmux = <DT_CAT1_PINMUX(20, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p20_5_pwm0_0: p20_5_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(20, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p20_6_pwm0_1: p20_6_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(20, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p20_7_pwm0_2: p20_7_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(20, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_1_pwm0_3: p21_1_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_3_pwm0_4: p21_3_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_5_pwm0_5: p21_5_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_7_pwm0_6: p21_7_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p0_1_pwm1_0: p0_1_pwm1_0_compl {
+ pinmux = <DT_CAT1_PINMUX(0, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_1_pwm1_1: p1_1_pwm1_1_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_3_pwm1_2: p1_3_pwm1_2_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_5_pwm1_3: p1_5_pwm1_3_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_7_pwm1_4: p1_7_pwm1_4_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p3_0_pwm1_5: p3_0_pwm1_5_compl {
+ pinmux = <DT_CAT1_PINMUX(3, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_0_pwm1_6: p4_0_pwm1_6_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_2_pwm1_7: p4_2_pwm1_7_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_4_pwm1_8: p4_4_pwm1_8_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_6_pwm1_9: p4_6_pwm1_9_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p5_0_pwm1_10: p5_0_pwm1_10_compl {
+ pinmux = <DT_CAT1_PINMUX(5, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_1_pwm1_11: p6_1_pwm1_11_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_3_pwm1_12: p6_3_pwm1_12_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_5_pwm1_13: p6_5_pwm1_13_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_7_pwm1_14: p6_7_pwm1_14_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_1_pwm1_15: p7_1_pwm1_15_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_3_pwm1_16: p7_3_pwm1_16_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_5_pwm1_17: p7_5_pwm1_17_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_7_pwm1_18: p7_7_pwm1_18_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_1_pwm1_19: p8_1_pwm1_19_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_3_pwm1_20: p8_3_pwm1_20_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_5_pwm1_21: p8_5_pwm1_21_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_7_pwm1_22: p8_7_pwm1_22_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p9_0_pwm1_23: p9_0_pwm1_23_compl {
+ pinmux = <DT_CAT1_PINMUX(9, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p9_1_pwm1_0: p9_1_pwm1_0_compl {
+ pinmux = <DT_CAT1_PINMUX(9, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p10_1_pwm1_1: p10_1_pwm1_1_compl {
+ pinmux = <DT_CAT1_PINMUX(10, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p10_3_pwm1_2: p10_3_pwm1_2_compl {
+ pinmux = <DT_CAT1_PINMUX(10, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p10_5_pwm1_3: p10_5_pwm1_3_compl {
+ pinmux = <DT_CAT1_PINMUX(10, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p10_7_pwm1_4: p10_7_pwm1_4_compl {
+ pinmux = <DT_CAT1_PINMUX(10, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p11_1_pwm1_5: p11_1_pwm1_5_compl {
+ pinmux = <DT_CAT1_PINMUX(11, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p11_3_pwm1_6: p11_3_pwm1_6_compl {
+ pinmux = <DT_CAT1_PINMUX(11, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p11_5_pwm1_7: p11_5_pwm1_7_compl {
+ pinmux = <DT_CAT1_PINMUX(11, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p11_7_pwm1_8: p11_7_pwm1_8_compl {
+ pinmux = <DT_CAT1_PINMUX(11, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_1_pwm1_9: p12_1_pwm1_9_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_3_pwm1_10: p12_3_pwm1_10_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_5_pwm1_11: p12_5_pwm1_11_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p13_2_pwm1_12: p13_2_pwm1_12_compl {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p13_4_pwm1_13: p13_4_pwm1_13_compl {
+ pinmux = <DT_CAT1_PINMUX(13, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p13_7_pwm1_14: p13_7_pwm1_14_compl {
+ pinmux = <DT_CAT1_PINMUX(13, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p14_2_pwm1_15: p14_2_pwm1_15_compl {
+ pinmux = <DT_CAT1_PINMUX(14, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p14_4_pwm1_16: p14_4_pwm1_16_compl {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p14_7_pwm1_17: p14_7_pwm1_17_compl {
+ pinmux = <DT_CAT1_PINMUX(14, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_1_pwm1_18: p15_1_pwm1_18_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_3_pwm1_19: p15_3_pwm1_19_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_5_pwm1_20: p15_5_pwm1_20_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_7_pwm1_21: p15_7_pwm1_21_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_0_pwm1_0: p17_0_pwm1_0_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_1_pwm1_1: p17_1_pwm1_1_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_2_pwm1_2: p17_2_pwm1_2_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_3_pwm1_3: p17_3_pwm1_3_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_4_pwm1_4: p17_4_pwm1_4_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_5_pwm1_5: p17_5_pwm1_5_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_6_pwm1_22: p17_6_pwm1_22_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_7_pwm1_23: p17_7_pwm1_23_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p20_0_pwm1_7: p20_0_pwm1_7_compl {
+ pinmux = <DT_CAT1_PINMUX(20, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p20_1_pwm1_8: p20_1_pwm1_8_compl {
+ pinmux = <DT_CAT1_PINMUX(20, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p20_2_pwm1_9: p20_2_pwm1_9_compl {
+ pinmux = <DT_CAT1_PINMUX(20, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p20_3_pwm1_10: p20_3_pwm1_10_compl {
+ pinmux = <DT_CAT1_PINMUX(20, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_1_pwm1_11: p21_1_pwm1_11_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_3_pwm1_12: p21_3_pwm1_12_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_5_pwm1_13: p21_5_pwm1_13_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_7_pwm1_14: p21_7_pwm1_14_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 7, HSIOM_SEL_ACT_2)>;
+ };
+ };
+ };
+};
diff --git a/dts/arm/infineon/edge/pse84/pse84.wlb-154.dtsi b/dts/arm/infineon/edge/pse84/pse84.wlb-154.dtsi
new file mode 100644
index 0000000..f9f1dc9
--- /dev/null
+++ b/dts/arm/infineon/edge/pse84/pse84.wlb-154.dtsi
@@ -0,0 +1,1358 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/dt-bindings/gpio/gpio.h>
+#include <zephyr/dt-bindings/pinctrl/ifx_cat1-pinctrl.h>
+#include "pse84.dtsi"
+
+/ {
+ soc {
+ /delete-node/ gpio@42810000; // gpio_prt0
+ /delete-node/ gpio@42810500; // gpio_prt10
+ /delete-node/ gpio@42810580; // gpio_prt11
+
+ pinctrl: pinctrl@42800000 {
+ /* i3c_i3c_scl */
+ /omit-if-no-ref/ p3_0_i3c0_i3c_scl: p3_0_i3c0_i3c_scl {
+ pinmux = <DT_CAT1_PINMUX(3, 0, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* i3c_i3c_sda */
+ /omit-if-no-ref/ p3_1_i3c0_i3c_sda: p3_1_i3c0_i3c_sda {
+ pinmux = <DT_CAT1_PINMUX(3, 1, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* scb_i2c_scl */
+ /omit-if-no-ref/ p6_5_scb2_i2c_scl: p6_5_scb2_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p8_0_scb0_i2c_scl: p8_0_scb0_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(8, 0, HSIOM_SEL_DS_3)>;
+ };
+
+ /omit-if-no-ref/ p9_3_scb1_i2c_scl: p9_3_scb1_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p13_1_scb7_i2c_scl: p13_1_scb7_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p14_4_scb8_i2c_scl: p14_4_scb8_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p15_0_scb9_i2c_scl: p15_0_scb9_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p16_0_scb10_i2c_scl: p16_0_scb10_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p17_0_scb5_i2c_scl: p17_0_scb5_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p17_2_scb11_i2c_scl: p17_2_scb11_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_7)>;
+ };
+
+ /* scb_i2c_sda */
+ /omit-if-no-ref/ p6_7_scb2_i2c_sda: p6_7_scb2_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p8_1_scb0_i2c_sda: p8_1_scb0_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(8, 1, HSIOM_SEL_DS_3)>;
+ };
+
+ /omit-if-no-ref/ p9_2_scb1_i2c_sda: p9_2_scb1_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p13_2_scb7_i2c_sda: p13_2_scb7_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p14_3_scb8_i2c_sda: p14_3_scb8_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p15_1_scb9_i2c_sda: p15_1_scb9_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p16_1_scb10_i2c_sda: p16_1_scb10_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p17_1_scb5_i2c_sda: p17_1_scb5_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p17_3_scb11_i2c_sda: p17_3_scb11_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_7)>;
+ };
+
+ /* scb_spi_m_clk */
+ /omit-if-no-ref/ p6_5_scb2_spi_m_clk: p6_5_scb2_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_0_scb0_spi_m_clk: p8_0_scb0_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(8, 0, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_3_scb1_spi_m_clk: p9_3_scb1_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_1_scb7_spi_m_clk: p13_1_scb7_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_4_scb8_spi_m_clk: p14_4_scb8_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_0_scb9_spi_m_clk: p15_0_scb9_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_0_scb10_spi_m_clk: p16_0_scb10_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_0_scb5_spi_m_clk: p17_0_scb5_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_2_scb11_spi_m_clk: p17_2_scb11_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_spi_m_miso */
+ /omit-if-no-ref/ p6_4_scb2_spi_m_miso: p6_4_scb2_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_4_scb0_spi_m_miso: p8_4_scb0_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(8, 4, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_1_scb1_spi_m_miso: p9_1_scb1_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(9, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_3_scb7_spi_m_miso: p13_3_scb7_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(13, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_2_scb9_spi_m_miso: p15_2_scb9_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(15, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_2_scb10_spi_m_miso: p16_2_scb10_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(16, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_5_scb5_spi_m_miso: p16_5_scb5_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(16, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_5_scb11_spi_m_miso: p17_5_scb11_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(17, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_spi_m_mosi */
+ /omit-if-no-ref/ p6_7_scb2_spi_m_mosi: p6_7_scb2_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_1_scb0_spi_m_mosi: p8_1_scb0_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(8, 1, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_2_scb1_spi_m_mosi: p9_2_scb1_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_2_scb7_spi_m_mosi: p13_2_scb7_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_3_scb8_spi_m_mosi: p14_3_scb8_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_1_scb9_spi_m_mosi: p15_1_scb9_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_1_scb10_spi_m_mosi: p16_1_scb10_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_1_scb5_spi_m_mosi: p17_1_scb5_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_3_scb11_spi_m_mosi: p17_3_scb11_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_spi_m_select0 */
+ /omit-if-no-ref/ p6_6_scb2_spi_m_select0: p6_6_scb2_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_2_scb0_spi_m_select0: p8_2_scb0_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(8, 2, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_0_scb1_spi_m_select0: p9_0_scb1_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(9, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_4_scb7_spi_m_select0: p13_4_scb7_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(13, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_3_scb9_spi_m_select0: p15_3_scb9_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(15, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_3_scb10_spi_m_select0: p16_3_scb10_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(16, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_6_scb5_spi_m_select0: p16_6_scb5_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(16, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_6_scb11_spi_m_select0: p17_6_scb11_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(17, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_spi_m_select1 */
+ /omit-if-no-ref/ p6_3_scb2_spi_m_select1: p6_3_scb2_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(6, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_3_scb0_spi_m_select1: p8_3_scb0_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(8, 3, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p16_4_scb10_spi_m_select1: p16_4_scb10_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(16, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_7_scb5_spi_m_select1: p16_7_scb5_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(16, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_7_scb3_spi_m_select1: p21_7_scb3_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(21, 7, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_spi_s_clk */
+ /omit-if-no-ref/ p6_5_scb2_spi_s_clk: p6_5_scb2_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_0_scb0_spi_s_clk: p8_0_scb0_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(8, 0, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_3_scb1_spi_s_clk: p9_3_scb1_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_1_scb7_spi_s_clk: p13_1_scb7_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_4_scb8_spi_s_clk: p14_4_scb8_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_0_scb9_spi_s_clk: p15_0_scb9_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_0_scb10_spi_s_clk: p16_0_scb10_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_0_scb5_spi_s_clk: p17_0_scb5_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_2_scb11_spi_s_clk: p17_2_scb11_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_spi_s_miso */
+ /omit-if-no-ref/ p6_4_scb2_spi_s_miso: p6_4_scb2_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_4_scb0_spi_s_miso: p8_4_scb0_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(8, 4, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_1_scb1_spi_s_miso: p9_1_scb1_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(9, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_3_scb7_spi_s_miso: p13_3_scb7_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(13, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_2_scb9_spi_s_miso: p15_2_scb9_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(15, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_2_scb10_spi_s_miso: p16_2_scb10_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(16, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_5_scb5_spi_s_miso: p16_5_scb5_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(16, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_5_scb11_spi_s_miso: p17_5_scb11_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(17, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_spi_s_mosi */
+ /omit-if-no-ref/ p6_7_scb2_spi_s_mosi: p6_7_scb2_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_1_scb0_spi_s_mosi: p8_1_scb0_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(8, 1, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_2_scb1_spi_s_mosi: p9_2_scb1_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_2_scb7_spi_s_mosi: p13_2_scb7_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_3_scb8_spi_s_mosi: p14_3_scb8_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_1_scb9_spi_s_mosi: p15_1_scb9_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_1_scb10_spi_s_mosi: p16_1_scb10_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_1_scb5_spi_s_mosi: p17_1_scb5_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_3_scb11_spi_s_mosi: p17_3_scb11_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_spi_s_select0 */
+ /omit-if-no-ref/ p6_6_scb2_spi_s_select0: p6_6_scb2_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_2_scb0_spi_s_select0: p8_2_scb0_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(8, 2, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_0_scb1_spi_s_select0: p9_0_scb1_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(9, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_4_scb7_spi_s_select0: p13_4_scb7_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(13, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_3_scb9_spi_s_select0: p15_3_scb9_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(15, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_3_scb10_spi_s_select0: p16_3_scb10_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(16, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_6_scb5_spi_s_select0: p16_6_scb5_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(16, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_6_scb11_spi_s_select0: p17_6_scb11_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(17, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_spi_s_select1 */
+ /omit-if-no-ref/ p6_3_scb2_spi_s_select1: p6_3_scb2_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(6, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_3_scb0_spi_s_select1: p8_3_scb0_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(8, 3, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p16_4_scb10_spi_s_select1: p16_4_scb10_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(16, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_7_scb5_spi_s_select1: p16_7_scb5_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(16, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_7_scb3_spi_s_select1: p21_7_scb3_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(21, 7, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_uart_cts */
+ /omit-if-no-ref/ p6_4_scb2_uart_cts: p6_4_scb2_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p9_1_scb1_uart_cts: p9_1_scb1_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(9, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p13_3_scb7_uart_cts: p13_3_scb7_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(13, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p15_2_scb9_uart_cts: p15_2_scb9_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(15, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_2_scb10_uart_cts: p16_2_scb10_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(16, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_5_scb5_uart_cts: p16_5_scb5_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(16, 5, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_5_scb11_uart_cts: p17_5_scb11_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(17, 5, HSIOM_SEL_ACT_8)>;
+ };
+
+ /* scb_uart_rts */
+ /omit-if-no-ref/ p6_6_scb2_uart_rts: p6_6_scb2_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p9_0_scb1_uart_rts: p9_0_scb1_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(9, 0, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p13_4_scb7_uart_rts: p13_4_scb7_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(13, 4, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p15_3_scb9_uart_rts: p15_3_scb9_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(15, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_3_scb10_uart_rts: p16_3_scb10_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(16, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_6_scb5_uart_rts: p16_6_scb5_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(16, 6, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_6_scb11_uart_rts: p17_6_scb11_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(17, 6, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p21_7_scb3_uart_rts: p21_7_scb3_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(21, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_uart_rx */
+ /omit-if-no-ref/ p6_5_scb2_uart_rx: p6_5_scb2_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p9_3_scb1_uart_rx: p9_3_scb1_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p13_1_scb7_uart_rx: p13_1_scb7_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p14_4_scb8_uart_rx: p14_4_scb8_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p15_0_scb9_uart_rx: p15_0_scb9_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_0_scb10_uart_rx: p16_0_scb10_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_0_scb5_uart_rx: p17_0_scb5_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_2_scb11_uart_rx: p17_2_scb11_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /* scb_uart_tx */
+ /omit-if-no-ref/ p6_7_scb2_uart_tx: p6_7_scb2_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p9_2_scb1_uart_tx: p9_2_scb1_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p13_2_scb7_uart_tx: p13_2_scb7_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p14_3_scb8_uart_tx: p14_3_scb8_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p15_1_scb9_uart_tx: p15_1_scb9_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_1_scb10_uart_tx: p16_1_scb10_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_1_scb5_uart_tx: p17_1_scb5_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_3_scb11_uart_tx: p17_3_scb11_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /* sdhc_card_cmd */
+ /omit-if-no-ref/ p7_0_sdhc1_card_cmd: p7_0_sdhc1_card_cmd {
+ pinmux = <DT_CAT1_PINMUX(7, 0, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p21_0_sdhc0_card_cmd: p21_0_sdhc0_card_cmd {
+ pinmux = <DT_CAT1_PINMUX(21, 0, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_dat_3to0 */
+ /omit-if-no-ref/ p7_3_sdhc1_card_dat_3to0: p7_3_sdhc1_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(7, 3, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p7_5_sdhc1_card_dat_3to0: p7_5_sdhc1_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(7, 5, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p7_6_sdhc1_card_dat_3to0: p7_6_sdhc1_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(7, 6, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p7_7_sdhc1_card_dat_3to0: p7_7_sdhc1_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(7, 7, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p12_1_sdhc0_card_dat_3to0: p12_1_sdhc0_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(12, 1, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p12_2_sdhc0_card_dat_3to0: p12_2_sdhc0_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(12, 2, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p12_4_sdhc0_card_dat_3to0: p12_4_sdhc0_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(12, 4, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p12_5_sdhc0_card_dat_3to0: p12_5_sdhc0_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(12, 5, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_dat_7to4 */
+ /omit-if-no-ref/ p6_4_sdhc1_card_dat_7to4: p6_4_sdhc1_card_dat_7to4 {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p6_5_sdhc1_card_dat_7to4: p6_5_sdhc1_card_dat_7to4 {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p6_6_sdhc1_card_dat_7to4: p6_6_sdhc1_card_dat_7to4 {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p6_7_sdhc1_card_dat_7to4: p6_7_sdhc1_card_dat_7to4 {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_detect_n */
+ /omit-if-no-ref/ p7_4_sdhc1_card_detect_n: p7_4_sdhc1_card_detect_n {
+ pinmux = <DT_CAT1_PINMUX(7, 4, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p21_1_sdhc0_card_detect_n: p21_1_sdhc0_card_detect_n {
+ pinmux = <DT_CAT1_PINMUX(21, 1, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_emmc_reset_n */
+ /omit-if-no-ref/
+ p7_2_sdhc1_card_emmc_reset_n: p7_2_sdhc1_card_emmc_reset_n {
+ pinmux = <DT_CAT1_PINMUX(7, 2, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_if_pwr_en */
+ /omit-if-no-ref/ p6_2_sdhc1_card_if_pwr_en: p6_2_sdhc1_card_if_pwr_en {
+ pinmux = <DT_CAT1_PINMUX(6, 2, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_mech_write_prot */
+ /omit-if-no-ref/
+ p3_0_sdhc1_card_mech_write_prot: p3_0_sdhc1_card_mech_write_prot {
+ pinmux = <DT_CAT1_PINMUX(3, 0, HSIOM_SEL_ACT_14)>;
+ };
+
+ /omit-if-no-ref/
+ p6_0_sdhc1_card_mech_write_prot: p6_0_sdhc1_card_mech_write_prot {
+ pinmux = <DT_CAT1_PINMUX(6, 0, HSIOM_SEL_ACT_14)>;
+ };
+
+ /omit-if-no-ref/
+ p21_2_sdhc0_card_mech_write_prot: p21_2_sdhc0_card_mech_write_prot {
+ pinmux = <DT_CAT1_PINMUX(21, 2, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_clk_card */
+ /omit-if-no-ref/ p7_1_sdhc1_clk_card: p7_1_sdhc1_clk_card {
+ pinmux = <DT_CAT1_PINMUX(7, 1, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p12_0_sdhc0_clk_card: p12_0_sdhc0_clk_card {
+ pinmux = <DT_CAT1_PINMUX(12, 0, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_io_volt_sel */
+ /omit-if-no-ref/ p6_3_sdhc1_io_volt_sel: p6_3_sdhc1_io_volt_sel {
+ pinmux = <DT_CAT1_PINMUX(6, 3, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p21_3_sdhc0_io_volt_sel: p21_3_sdhc0_io_volt_sel {
+ pinmux = <DT_CAT1_PINMUX(21, 3, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_led_ctrl */
+ /omit-if-no-ref/ p6_1_sdhc1_led_ctrl: p6_1_sdhc1_led_ctrl {
+ pinmux = <DT_CAT1_PINMUX(6, 1, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* PWM tcpwm_line*/
+ /omit-if-no-ref/ p1_0_pwm0_1: p1_0_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(1, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_2_pwm0_2: p1_2_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(1, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_4_pwm0_3: p1_4_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(1, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_6_pwm0_4: p1_6_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(1, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p2_0_pwm0_5: p2_0_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(2, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p3_1_pwm0_6: p3_1_pwm0_6 {
+ pinmux = <DT_CAT1_PINMUX(3, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_1_pwm0_7: p4_1_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(4, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_3_pwm0_0: p4_3_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(4, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_5_pwm0_1: p4_5_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(4, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_7_pwm0_2: p4_7_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(4, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_0_pwm0_3: p6_0_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(6, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_2_pwm0_4: p6_2_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(6, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_4_pwm0_5: p6_4_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_6_pwm0_6: p6_6_pwm0_6 {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_0_pwm0_7: p7_0_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(7, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_2_pwm0_0: p7_2_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(7, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_4_pwm0_1: p7_4_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(7, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_6_pwm0_2: p7_6_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(7, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_0_pwm0_3: p8_0_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(8, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_2_pwm0_4: p8_2_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(8, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_4_pwm0_5: p8_4_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(8, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p9_0_pwm0_7: p9_0_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(9, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p9_1_pwm0_0: p9_1_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(9, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_0_pwm0_1: p12_0_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(12, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_2_pwm0_2: p12_2_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(12, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_4_pwm0_3: p12_4_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(12, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p13_1_pwm0_4: p13_1_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p13_3_pwm0_5: p13_3_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(13, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p14_3_pwm0_0: p14_3_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_0_pwm0_2: p15_0_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_2_pwm0_3: p15_2_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(15, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_0_pwm0_0: p16_0_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_1_pwm0_1: p16_1_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_2_pwm0_2: p16_2_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(16, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_3_pwm0_3: p16_3_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(16, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_4_pwm0_4: p16_4_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(16, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_5_pwm0_5: p16_5_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(16, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_6_pwm0_6: p16_6_pwm0_6 {
+ pinmux = <DT_CAT1_PINMUX(16, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_7_pwm0_7: p16_7_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(16, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p20_1_pwm0_0: p20_1_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(20, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_0_pwm0_3: p21_0_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(21, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_2_pwm0_4: p21_2_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(21, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_0_pwm1_1: p1_0_pwm1_1 {
+ pinmux = <DT_CAT1_PINMUX(1, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_2_pwm1_2: p1_2_pwm1_2 {
+ pinmux = <DT_CAT1_PINMUX(1, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_4_pwm1_3: p1_4_pwm1_3 {
+ pinmux = <DT_CAT1_PINMUX(1, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_6_pwm1_4: p1_6_pwm1_4 {
+ pinmux = <DT_CAT1_PINMUX(1, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p2_0_pwm1_5: p2_0_pwm1_5 {
+ pinmux = <DT_CAT1_PINMUX(2, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p3_1_pwm1_6: p3_1_pwm1_6 {
+ pinmux = <DT_CAT1_PINMUX(3, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_1_pwm1_7: p4_1_pwm1_7 {
+ pinmux = <DT_CAT1_PINMUX(4, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_3_pwm1_8: p4_3_pwm1_8 {
+ pinmux = <DT_CAT1_PINMUX(4, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_5_pwm1_9: p4_5_pwm1_9 {
+ pinmux = <DT_CAT1_PINMUX(4, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_7_pwm1_10: p4_7_pwm1_10 {
+ pinmux = <DT_CAT1_PINMUX(4, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_0_pwm1_11: p6_0_pwm1_11 {
+ pinmux = <DT_CAT1_PINMUX(6, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_2_pwm1_12: p6_2_pwm1_12 {
+ pinmux = <DT_CAT1_PINMUX(6, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_4_pwm1_13: p6_4_pwm1_13 {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_6_pwm1_14: p6_6_pwm1_14 {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_0_pwm1_15: p7_0_pwm1_15 {
+ pinmux = <DT_CAT1_PINMUX(7, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_2_pwm1_16: p7_2_pwm1_16 {
+ pinmux = <DT_CAT1_PINMUX(7, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_4_pwm1_17: p7_4_pwm1_17 {
+ pinmux = <DT_CAT1_PINMUX(7, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_6_pwm1_18: p7_6_pwm1_18 {
+ pinmux = <DT_CAT1_PINMUX(7, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_0_pwm1_19: p8_0_pwm1_19 {
+ pinmux = <DT_CAT1_PINMUX(8, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_2_pwm1_20: p8_2_pwm1_20 {
+ pinmux = <DT_CAT1_PINMUX(8, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_4_pwm1_21: p8_4_pwm1_21 {
+ pinmux = <DT_CAT1_PINMUX(8, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p9_2_pwm1_23: p9_2_pwm1_23 {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p9_3_pwm1_0: p9_3_pwm1_0 {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_0_pwm1_9: p12_0_pwm1_9 {
+ pinmux = <DT_CAT1_PINMUX(12, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_2_pwm1_10: p12_2_pwm1_10 {
+ pinmux = <DT_CAT1_PINMUX(12, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_4_pwm1_11: p12_4_pwm1_11 {
+ pinmux = <DT_CAT1_PINMUX(12, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p13_1_pwm1_12: p13_1_pwm1_12 {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p13_3_pwm1_13: p13_3_pwm1_13 {
+ pinmux = <DT_CAT1_PINMUX(13, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p14_3_pwm1_16: p14_3_pwm1_16 {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_0_pwm1_18: p15_0_pwm1_18 {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_2_pwm1_19: p15_2_pwm1_19 {
+ pinmux = <DT_CAT1_PINMUX(15, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_0_pwm1_0: p16_0_pwm1_0 {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_1_pwm1_1: p16_1_pwm1_1 {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_2_pwm1_2: p16_2_pwm1_2 {
+ pinmux = <DT_CAT1_PINMUX(16, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_3_pwm1_3: p16_3_pwm1_3 {
+ pinmux = <DT_CAT1_PINMUX(16, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_4_pwm1_4: p16_4_pwm1_4 {
+ pinmux = <DT_CAT1_PINMUX(16, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_5_pwm1_5: p16_5_pwm1_5 {
+ pinmux = <DT_CAT1_PINMUX(16, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_6_pwm1_22: p16_6_pwm1_22 {
+ pinmux = <DT_CAT1_PINMUX(16, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_7_pwm1_23: p16_7_pwm1_23 {
+ pinmux = <DT_CAT1_PINMUX(16, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_0_pwm1_11: p21_0_pwm1_11 {
+ pinmux = <DT_CAT1_PINMUX(21, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_2_pwm1_12: p21_2_pwm1_12 {
+ pinmux = <DT_CAT1_PINMUX(21, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /* PWM tcpwm_line_compl*/
+ /omit-if-no-ref/ p1_1_pwm0_1: p1_1_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_3_pwm0_2: p1_3_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_5_pwm0_3: p1_5_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_7_pwm0_4: p1_7_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p3_0_pwm0_5: p3_0_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(3, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_0_pwm0_6: p4_0_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_2_pwm0_7: p4_2_pwm0_7_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_4_pwm0_0: p4_4_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_6_pwm0_1: p4_6_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p5_0_pwm0_2: p5_0_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(5, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_1_pwm0_3: p6_1_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_3_pwm0_4: p6_3_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_5_pwm0_5: p6_5_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_7_pwm0_6: p6_7_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_1_pwm0_7: p7_1_pwm0_7_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_3_pwm0_0: p7_3_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_5_pwm0_1: p7_5_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_7_pwm0_2: p7_7_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_1_pwm0_3: p8_1_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_3_pwm0_4: p8_3_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p9_2_pwm0_7: p9_2_pwm0_7_compl {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p9_3_pwm0_0: p9_3_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_1_pwm0_1: p12_1_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_3_pwm0_2: p12_3_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_5_pwm0_3: p12_5_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p13_2_pwm0_4: p13_2_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p13_4_pwm0_5: p13_4_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(13, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p14_4_pwm0_0: p14_4_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_1_pwm0_2: p15_1_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_3_pwm0_3: p15_3_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_0_pwm0_0: p17_0_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_1_pwm0_1: p17_1_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_2_pwm0_2: p17_2_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_3_pwm0_3: p17_3_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_4_pwm0_4: p17_4_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_5_pwm0_5: p17_5_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_6_pwm0_6: p17_6_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_1_pwm0_3: p21_1_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_3_pwm0_4: p21_3_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_7_pwm0_6: p21_7_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_1_pwm1_1: p1_1_pwm1_1_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_3_pwm1_2: p1_3_pwm1_2_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_5_pwm1_3: p1_5_pwm1_3_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_7_pwm1_4: p1_7_pwm1_4_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p3_0_pwm1_5: p3_0_pwm1_5_compl {
+ pinmux = <DT_CAT1_PINMUX(3, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_0_pwm1_6: p4_0_pwm1_6_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_2_pwm1_7: p4_2_pwm1_7_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_4_pwm1_8: p4_4_pwm1_8_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_6_pwm1_9: p4_6_pwm1_9_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p5_0_pwm1_10: p5_0_pwm1_10_compl {
+ pinmux = <DT_CAT1_PINMUX(5, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_1_pwm1_11: p6_1_pwm1_11_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_3_pwm1_12: p6_3_pwm1_12_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_5_pwm1_13: p6_5_pwm1_13_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_7_pwm1_14: p6_7_pwm1_14_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_1_pwm1_15: p7_1_pwm1_15_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_3_pwm1_16: p7_3_pwm1_16_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_5_pwm1_17: p7_5_pwm1_17_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_7_pwm1_18: p7_7_pwm1_18_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_1_pwm1_19: p8_1_pwm1_19_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_3_pwm1_20: p8_3_pwm1_20_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p9_0_pwm1_23: p9_0_pwm1_23_compl {
+ pinmux = <DT_CAT1_PINMUX(9, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p9_1_pwm1_0: p9_1_pwm1_0_compl {
+ pinmux = <DT_CAT1_PINMUX(9, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_1_pwm1_9: p12_1_pwm1_9_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_3_pwm1_10: p12_3_pwm1_10_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_5_pwm1_11: p12_5_pwm1_11_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p13_2_pwm1_12: p13_2_pwm1_12_compl {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p13_4_pwm1_13: p13_4_pwm1_13_compl {
+ pinmux = <DT_CAT1_PINMUX(13, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p14_4_pwm1_16: p14_4_pwm1_16_compl {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_1_pwm1_18: p15_1_pwm1_18_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_3_pwm1_19: p15_3_pwm1_19_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_0_pwm1_0: p17_0_pwm1_0_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_1_pwm1_1: p17_1_pwm1_1_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_2_pwm1_2: p17_2_pwm1_2_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_3_pwm1_3: p17_3_pwm1_3_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_4_pwm1_4: p17_4_pwm1_4_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_5_pwm1_5: p17_5_pwm1_5_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_6_pwm1_22: p17_6_pwm1_22_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p20_1_pwm1_8: p20_1_pwm1_8_compl {
+ pinmux = <DT_CAT1_PINMUX(20, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_1_pwm1_11: p21_1_pwm1_11_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_3_pwm1_12: p21_3_pwm1_12_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_7_pwm1_14: p21_7_pwm1_14_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 7, HSIOM_SEL_ACT_2)>;
+ };
+ };
+ };
+};
+
+&gpio_prt8 {
+ ngpios = <5>;
+};
+
+&gpio_prt13 {
+ ngpios = <6>;
+};
+
+&gpio_prt14 {
+ ngpios = <2>;
+};
+
+&gpio_prt15 {
+ ngpios = <4>;
+};
+
+&gpio_prt17 {
+ ngpios = <7>;
+};
+
+&gpio_prt20 {
+ ngpios = <1>;
+};
+
+&gpio_prt21 {
+ ngpios = <5>;
+};
diff --git a/dts/arm/infineon/edge/pse84/pse84.wlb-154_s.dtsi b/dts/arm/infineon/edge/pse84/pse84.wlb-154_s.dtsi
new file mode 100644
index 0000000..e9d4eb9
--- /dev/null
+++ b/dts/arm/infineon/edge/pse84/pse84.wlb-154_s.dtsi
@@ -0,0 +1,1358 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/dt-bindings/gpio/gpio.h>
+#include <zephyr/dt-bindings/pinctrl/ifx_cat1-pinctrl.h>
+#include "pse84_s.dtsi"
+
+/ {
+ soc {
+ /delete-node/ gpio@52810000; // gpio_prt0
+ /delete-node/ gpio@52810500; // gpio_prt10
+ /delete-node/ gpio@52810580; // gpio_prt11
+
+ pinctrl: pinctrl@52800000 {
+ /* i3c_i3c_scl */
+ /omit-if-no-ref/ p3_0_i3c0_i3c_scl: p3_0_i3c0_i3c_scl {
+ pinmux = <DT_CAT1_PINMUX(3, 0, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* i3c_i3c_sda */
+ /omit-if-no-ref/ p3_1_i3c0_i3c_sda: p3_1_i3c0_i3c_sda {
+ pinmux = <DT_CAT1_PINMUX(3, 1, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* scb_i2c_scl */
+ /omit-if-no-ref/ p6_5_scb2_i2c_scl: p6_5_scb2_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p8_0_scb0_i2c_scl: p8_0_scb0_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(8, 0, HSIOM_SEL_DS_3)>;
+ };
+
+ /omit-if-no-ref/ p9_3_scb1_i2c_scl: p9_3_scb1_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p13_1_scb7_i2c_scl: p13_1_scb7_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p14_4_scb8_i2c_scl: p14_4_scb8_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p15_0_scb9_i2c_scl: p15_0_scb9_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p16_0_scb10_i2c_scl: p16_0_scb10_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p17_0_scb5_i2c_scl: p17_0_scb5_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p17_2_scb11_i2c_scl: p17_2_scb11_i2c_scl {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_7)>;
+ };
+
+ /* scb_i2c_sda */
+ /omit-if-no-ref/ p6_7_scb2_i2c_sda: p6_7_scb2_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p8_1_scb0_i2c_sda: p8_1_scb0_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(8, 1, HSIOM_SEL_DS_3)>;
+ };
+
+ /omit-if-no-ref/ p9_2_scb1_i2c_sda: p9_2_scb1_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p13_2_scb7_i2c_sda: p13_2_scb7_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p14_3_scb8_i2c_sda: p14_3_scb8_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p15_1_scb9_i2c_sda: p15_1_scb9_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p16_1_scb10_i2c_sda: p16_1_scb10_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p17_1_scb5_i2c_sda: p17_1_scb5_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_7)>;
+ };
+
+ /omit-if-no-ref/ p17_3_scb11_i2c_sda: p17_3_scb11_i2c_sda {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_7)>;
+ };
+
+ /* scb_spi_m_clk */
+ /omit-if-no-ref/ p6_5_scb2_spi_m_clk: p6_5_scb2_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_0_scb0_spi_m_clk: p8_0_scb0_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(8, 0, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_3_scb1_spi_m_clk: p9_3_scb1_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_1_scb7_spi_m_clk: p13_1_scb7_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_4_scb8_spi_m_clk: p14_4_scb8_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_0_scb9_spi_m_clk: p15_0_scb9_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_0_scb10_spi_m_clk: p16_0_scb10_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_0_scb5_spi_m_clk: p17_0_scb5_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_2_scb11_spi_m_clk: p17_2_scb11_spi_m_clk {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_spi_m_miso */
+ /omit-if-no-ref/ p6_4_scb2_spi_m_miso: p6_4_scb2_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_4_scb0_spi_m_miso: p8_4_scb0_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(8, 4, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_1_scb1_spi_m_miso: p9_1_scb1_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(9, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_3_scb7_spi_m_miso: p13_3_scb7_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(13, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_2_scb9_spi_m_miso: p15_2_scb9_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(15, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_2_scb10_spi_m_miso: p16_2_scb10_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(16, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_5_scb5_spi_m_miso: p16_5_scb5_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(16, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_5_scb11_spi_m_miso: p17_5_scb11_spi_m_miso {
+ pinmux = <DT_CAT1_PINMUX(17, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_spi_m_mosi */
+ /omit-if-no-ref/ p6_7_scb2_spi_m_mosi: p6_7_scb2_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_1_scb0_spi_m_mosi: p8_1_scb0_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(8, 1, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_2_scb1_spi_m_mosi: p9_2_scb1_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_2_scb7_spi_m_mosi: p13_2_scb7_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_3_scb8_spi_m_mosi: p14_3_scb8_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_1_scb9_spi_m_mosi: p15_1_scb9_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_1_scb10_spi_m_mosi: p16_1_scb10_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_1_scb5_spi_m_mosi: p17_1_scb5_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_3_scb11_spi_m_mosi: p17_3_scb11_spi_m_mosi {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_spi_m_select0 */
+ /omit-if-no-ref/ p6_6_scb2_spi_m_select0: p6_6_scb2_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_2_scb0_spi_m_select0: p8_2_scb0_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(8, 2, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_0_scb1_spi_m_select0: p9_0_scb1_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(9, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_4_scb7_spi_m_select0: p13_4_scb7_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(13, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_3_scb9_spi_m_select0: p15_3_scb9_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(15, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_3_scb10_spi_m_select0: p16_3_scb10_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(16, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_6_scb5_spi_m_select0: p16_6_scb5_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(16, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_6_scb11_spi_m_select0: p17_6_scb11_spi_m_select0 {
+ pinmux = <DT_CAT1_PINMUX(17, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_spi_m_select1 */
+ /omit-if-no-ref/ p6_3_scb2_spi_m_select1: p6_3_scb2_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(6, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_3_scb0_spi_m_select1: p8_3_scb0_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(8, 3, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p16_4_scb10_spi_m_select1: p16_4_scb10_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(16, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_7_scb5_spi_m_select1: p16_7_scb5_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(16, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_7_scb3_spi_m_select1: p21_7_scb3_spi_m_select1 {
+ pinmux = <DT_CAT1_PINMUX(21, 7, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_spi_s_clk */
+ /omit-if-no-ref/ p6_5_scb2_spi_s_clk: p6_5_scb2_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_0_scb0_spi_s_clk: p8_0_scb0_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(8, 0, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_3_scb1_spi_s_clk: p9_3_scb1_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_1_scb7_spi_s_clk: p13_1_scb7_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_4_scb8_spi_s_clk: p14_4_scb8_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_0_scb9_spi_s_clk: p15_0_scb9_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_0_scb10_spi_s_clk: p16_0_scb10_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_0_scb5_spi_s_clk: p17_0_scb5_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_2_scb11_spi_s_clk: p17_2_scb11_spi_s_clk {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_spi_s_miso */
+ /omit-if-no-ref/ p6_4_scb2_spi_s_miso: p6_4_scb2_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_4_scb0_spi_s_miso: p8_4_scb0_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(8, 4, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_1_scb1_spi_s_miso: p9_1_scb1_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(9, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_3_scb7_spi_s_miso: p13_3_scb7_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(13, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_2_scb9_spi_s_miso: p15_2_scb9_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(15, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_2_scb10_spi_s_miso: p16_2_scb10_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(16, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_5_scb5_spi_s_miso: p16_5_scb5_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(16, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_5_scb11_spi_s_miso: p17_5_scb11_spi_s_miso {
+ pinmux = <DT_CAT1_PINMUX(17, 5, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_spi_s_mosi */
+ /omit-if-no-ref/ p6_7_scb2_spi_s_mosi: p6_7_scb2_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_1_scb0_spi_s_mosi: p8_1_scb0_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(8, 1, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_2_scb1_spi_s_mosi: p9_2_scb1_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_2_scb7_spi_s_mosi: p13_2_scb7_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p14_3_scb8_spi_s_mosi: p14_3_scb8_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_1_scb9_spi_s_mosi: p15_1_scb9_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_1_scb10_spi_s_mosi: p16_1_scb10_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_1_scb5_spi_s_mosi: p17_1_scb5_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_3_scb11_spi_s_mosi: p17_3_scb11_spi_s_mosi {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_spi_s_select0 */
+ /omit-if-no-ref/ p6_6_scb2_spi_s_select0: p6_6_scb2_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_2_scb0_spi_s_select0: p8_2_scb0_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(8, 2, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p9_0_scb1_spi_s_select0: p9_0_scb1_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(9, 0, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p13_4_scb7_spi_s_select0: p13_4_scb7_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(13, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p15_3_scb9_spi_s_select0: p15_3_scb9_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(15, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_3_scb10_spi_s_select0: p16_3_scb10_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(16, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_6_scb5_spi_s_select0: p16_6_scb5_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(16, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p17_6_scb11_spi_s_select0: p17_6_scb11_spi_s_select0 {
+ pinmux = <DT_CAT1_PINMUX(17, 6, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_spi_s_select1 */
+ /omit-if-no-ref/ p6_3_scb2_spi_s_select1: p6_3_scb2_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(6, 3, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p8_3_scb0_spi_s_select1: p8_3_scb0_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(8, 3, HSIOM_SEL_DS_2)>;
+ };
+
+ /omit-if-no-ref/ p16_4_scb10_spi_s_select1: p16_4_scb10_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(16, 4, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p16_7_scb5_spi_s_select1: p16_7_scb5_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(16, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /omit-if-no-ref/ p21_7_scb3_spi_s_select1: p21_7_scb3_spi_s_select1 {
+ pinmux = <DT_CAT1_PINMUX(21, 7, HSIOM_SEL_ACT_4)>;
+ };
+
+ /* scb_uart_cts */
+ /omit-if-no-ref/ p6_4_scb2_uart_cts: p6_4_scb2_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p9_1_scb1_uart_cts: p9_1_scb1_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(9, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p13_3_scb7_uart_cts: p13_3_scb7_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(13, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p15_2_scb9_uart_cts: p15_2_scb9_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(15, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_2_scb10_uart_cts: p16_2_scb10_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(16, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_5_scb5_uart_cts: p16_5_scb5_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(16, 5, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_5_scb11_uart_cts: p17_5_scb11_uart_cts {
+ pinmux = <DT_CAT1_PINMUX(17, 5, HSIOM_SEL_ACT_8)>;
+ };
+
+ /* scb_uart_rts */
+ /omit-if-no-ref/ p6_6_scb2_uart_rts: p6_6_scb2_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p9_0_scb1_uart_rts: p9_0_scb1_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(9, 0, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p13_4_scb7_uart_rts: p13_4_scb7_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(13, 4, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p15_3_scb9_uart_rts: p15_3_scb9_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(15, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_3_scb10_uart_rts: p16_3_scb10_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(16, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_6_scb5_uart_rts: p16_6_scb5_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(16, 6, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_6_scb11_uart_rts: p17_6_scb11_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(17, 6, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p21_7_scb3_uart_rts: p21_7_scb3_uart_rts {
+ pinmux = <DT_CAT1_PINMUX(21, 7, HSIOM_SEL_ACT_6)>;
+ };
+
+ /* scb_uart_rx */
+ /omit-if-no-ref/ p6_5_scb2_uart_rx: p6_5_scb2_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p9_3_scb1_uart_rx: p9_3_scb1_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p13_1_scb7_uart_rx: p13_1_scb7_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p14_4_scb8_uart_rx: p14_4_scb8_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p15_0_scb9_uart_rx: p15_0_scb9_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_0_scb10_uart_rx: p16_0_scb10_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_0_scb5_uart_rx: p17_0_scb5_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_2_scb11_uart_rx: p17_2_scb11_uart_rx {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /* scb_uart_tx */
+ /omit-if-no-ref/ p6_7_scb2_uart_tx: p6_7_scb2_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p9_2_scb1_uart_tx: p9_2_scb1_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p13_2_scb7_uart_tx: p13_2_scb7_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p14_3_scb8_uart_tx: p14_3_scb8_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p15_1_scb9_uart_tx: p15_1_scb9_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p16_1_scb10_uart_tx: p16_1_scb10_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_1_scb5_uart_tx: p17_1_scb5_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_8)>;
+ };
+
+ /omit-if-no-ref/ p17_3_scb11_uart_tx: p17_3_scb11_uart_tx {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_8)>;
+ };
+
+ /* sdhc_card_cmd */
+ /omit-if-no-ref/ p7_0_sdhc1_card_cmd: p7_0_sdhc1_card_cmd {
+ pinmux = <DT_CAT1_PINMUX(7, 0, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p21_0_sdhc0_card_cmd: p21_0_sdhc0_card_cmd {
+ pinmux = <DT_CAT1_PINMUX(21, 0, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_dat_3to0 */
+ /omit-if-no-ref/ p7_3_sdhc1_card_dat_3to0: p7_3_sdhc1_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(7, 3, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p7_5_sdhc1_card_dat_3to0: p7_5_sdhc1_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(7, 5, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p7_6_sdhc1_card_dat_3to0: p7_6_sdhc1_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(7, 6, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p7_7_sdhc1_card_dat_3to0: p7_7_sdhc1_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(7, 7, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p12_1_sdhc0_card_dat_3to0: p12_1_sdhc0_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(12, 1, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p12_2_sdhc0_card_dat_3to0: p12_2_sdhc0_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(12, 2, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p12_4_sdhc0_card_dat_3to0: p12_4_sdhc0_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(12, 4, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p12_5_sdhc0_card_dat_3to0: p12_5_sdhc0_card_dat_3to0 {
+ pinmux = <DT_CAT1_PINMUX(12, 5, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_dat_7to4 */
+ /omit-if-no-ref/ p6_4_sdhc1_card_dat_7to4: p6_4_sdhc1_card_dat_7to4 {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p6_5_sdhc1_card_dat_7to4: p6_5_sdhc1_card_dat_7to4 {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p6_6_sdhc1_card_dat_7to4: p6_6_sdhc1_card_dat_7to4 {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p6_7_sdhc1_card_dat_7to4: p6_7_sdhc1_card_dat_7to4 {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_detect_n */
+ /omit-if-no-ref/ p7_4_sdhc1_card_detect_n: p7_4_sdhc1_card_detect_n {
+ pinmux = <DT_CAT1_PINMUX(7, 4, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p21_1_sdhc0_card_detect_n: p21_1_sdhc0_card_detect_n {
+ pinmux = <DT_CAT1_PINMUX(21, 1, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_emmc_reset_n */
+ /omit-if-no-ref/
+ p7_2_sdhc1_card_emmc_reset_n: p7_2_sdhc1_card_emmc_reset_n {
+ pinmux = <DT_CAT1_PINMUX(7, 2, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_if_pwr_en */
+ /omit-if-no-ref/ p6_2_sdhc1_card_if_pwr_en: p6_2_sdhc1_card_if_pwr_en {
+ pinmux = <DT_CAT1_PINMUX(6, 2, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_card_mech_write_prot */
+ /omit-if-no-ref/
+ p3_0_sdhc1_card_mech_write_prot: p3_0_sdhc1_card_mech_write_prot {
+ pinmux = <DT_CAT1_PINMUX(3, 0, HSIOM_SEL_ACT_14)>;
+ };
+
+ /omit-if-no-ref/
+ p6_0_sdhc1_card_mech_write_prot: p6_0_sdhc1_card_mech_write_prot {
+ pinmux = <DT_CAT1_PINMUX(6, 0, HSIOM_SEL_ACT_14)>;
+ };
+
+ /omit-if-no-ref/
+ p21_2_sdhc0_card_mech_write_prot: p21_2_sdhc0_card_mech_write_prot {
+ pinmux = <DT_CAT1_PINMUX(21, 2, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_clk_card */
+ /omit-if-no-ref/ p7_1_sdhc1_clk_card: p7_1_sdhc1_clk_card {
+ pinmux = <DT_CAT1_PINMUX(7, 1, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p12_0_sdhc0_clk_card: p12_0_sdhc0_clk_card {
+ pinmux = <DT_CAT1_PINMUX(12, 0, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_io_volt_sel */
+ /omit-if-no-ref/ p6_3_sdhc1_io_volt_sel: p6_3_sdhc1_io_volt_sel {
+ pinmux = <DT_CAT1_PINMUX(6, 3, HSIOM_SEL_ACT_15)>;
+ };
+
+ /omit-if-no-ref/ p21_3_sdhc0_io_volt_sel: p21_3_sdhc0_io_volt_sel {
+ pinmux = <DT_CAT1_PINMUX(21, 3, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* sdhc_led_ctrl */
+ /omit-if-no-ref/ p6_1_sdhc1_led_ctrl: p6_1_sdhc1_led_ctrl {
+ pinmux = <DT_CAT1_PINMUX(6, 1, HSIOM_SEL_ACT_15)>;
+ };
+
+ /* PWM tcpwm_line*/
+ /omit-if-no-ref/ p1_0_pwm0_1: p1_0_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(1, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_2_pwm0_2: p1_2_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(1, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_4_pwm0_3: p1_4_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(1, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_6_pwm0_4: p1_6_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(1, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p2_0_pwm0_5: p2_0_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(2, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p3_1_pwm0_6: p3_1_pwm0_6 {
+ pinmux = <DT_CAT1_PINMUX(3, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_1_pwm0_7: p4_1_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(4, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_3_pwm0_0: p4_3_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(4, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_5_pwm0_1: p4_5_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(4, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_7_pwm0_2: p4_7_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(4, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_0_pwm0_3: p6_0_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(6, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_2_pwm0_4: p6_2_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(6, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_4_pwm0_5: p6_4_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_6_pwm0_6: p6_6_pwm0_6 {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_0_pwm0_7: p7_0_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(7, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_2_pwm0_0: p7_2_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(7, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_4_pwm0_1: p7_4_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(7, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_6_pwm0_2: p7_6_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(7, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_0_pwm0_3: p8_0_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(8, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_2_pwm0_4: p8_2_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(8, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_4_pwm0_5: p8_4_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(8, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p9_0_pwm0_7: p9_0_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(9, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p9_1_pwm0_0: p9_1_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(9, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_0_pwm0_1: p12_0_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(12, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_2_pwm0_2: p12_2_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(12, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_4_pwm0_3: p12_4_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(12, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p13_1_pwm0_4: p13_1_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p13_3_pwm0_5: p13_3_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(13, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p14_3_pwm0_0: p14_3_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_0_pwm0_2: p15_0_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_2_pwm0_3: p15_2_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(15, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_0_pwm0_0: p16_0_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_1_pwm0_1: p16_1_pwm0_1 {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_2_pwm0_2: p16_2_pwm0_2 {
+ pinmux = <DT_CAT1_PINMUX(16, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_3_pwm0_3: p16_3_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(16, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_4_pwm0_4: p16_4_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(16, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_5_pwm0_5: p16_5_pwm0_5 {
+ pinmux = <DT_CAT1_PINMUX(16, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_6_pwm0_6: p16_6_pwm0_6 {
+ pinmux = <DT_CAT1_PINMUX(16, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p16_7_pwm0_7: p16_7_pwm0_7 {
+ pinmux = <DT_CAT1_PINMUX(16, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p20_1_pwm0_0: p20_1_pwm0_0 {
+ pinmux = <DT_CAT1_PINMUX(20, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_0_pwm0_3: p21_0_pwm0_3 {
+ pinmux = <DT_CAT1_PINMUX(21, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_2_pwm0_4: p21_2_pwm0_4 {
+ pinmux = <DT_CAT1_PINMUX(21, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_0_pwm1_1: p1_0_pwm1_1 {
+ pinmux = <DT_CAT1_PINMUX(1, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_2_pwm1_2: p1_2_pwm1_2 {
+ pinmux = <DT_CAT1_PINMUX(1, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_4_pwm1_3: p1_4_pwm1_3 {
+ pinmux = <DT_CAT1_PINMUX(1, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_6_pwm1_4: p1_6_pwm1_4 {
+ pinmux = <DT_CAT1_PINMUX(1, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p2_0_pwm1_5: p2_0_pwm1_5 {
+ pinmux = <DT_CAT1_PINMUX(2, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p3_1_pwm1_6: p3_1_pwm1_6 {
+ pinmux = <DT_CAT1_PINMUX(3, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_1_pwm1_7: p4_1_pwm1_7 {
+ pinmux = <DT_CAT1_PINMUX(4, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_3_pwm1_8: p4_3_pwm1_8 {
+ pinmux = <DT_CAT1_PINMUX(4, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_5_pwm1_9: p4_5_pwm1_9 {
+ pinmux = <DT_CAT1_PINMUX(4, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_7_pwm1_10: p4_7_pwm1_10 {
+ pinmux = <DT_CAT1_PINMUX(4, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_0_pwm1_11: p6_0_pwm1_11 {
+ pinmux = <DT_CAT1_PINMUX(6, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_2_pwm1_12: p6_2_pwm1_12 {
+ pinmux = <DT_CAT1_PINMUX(6, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_4_pwm1_13: p6_4_pwm1_13 {
+ pinmux = <DT_CAT1_PINMUX(6, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_6_pwm1_14: p6_6_pwm1_14 {
+ pinmux = <DT_CAT1_PINMUX(6, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_0_pwm1_15: p7_0_pwm1_15 {
+ pinmux = <DT_CAT1_PINMUX(7, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_2_pwm1_16: p7_2_pwm1_16 {
+ pinmux = <DT_CAT1_PINMUX(7, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_4_pwm1_17: p7_4_pwm1_17 {
+ pinmux = <DT_CAT1_PINMUX(7, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_6_pwm1_18: p7_6_pwm1_18 {
+ pinmux = <DT_CAT1_PINMUX(7, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_0_pwm1_19: p8_0_pwm1_19 {
+ pinmux = <DT_CAT1_PINMUX(8, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_2_pwm1_20: p8_2_pwm1_20 {
+ pinmux = <DT_CAT1_PINMUX(8, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_4_pwm1_21: p8_4_pwm1_21 {
+ pinmux = <DT_CAT1_PINMUX(8, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p9_2_pwm1_23: p9_2_pwm1_23 {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p9_3_pwm1_0: p9_3_pwm1_0 {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_0_pwm1_9: p12_0_pwm1_9 {
+ pinmux = <DT_CAT1_PINMUX(12, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_2_pwm1_10: p12_2_pwm1_10 {
+ pinmux = <DT_CAT1_PINMUX(12, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_4_pwm1_11: p12_4_pwm1_11 {
+ pinmux = <DT_CAT1_PINMUX(12, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p13_1_pwm1_12: p13_1_pwm1_12 {
+ pinmux = <DT_CAT1_PINMUX(13, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p13_3_pwm1_13: p13_3_pwm1_13 {
+ pinmux = <DT_CAT1_PINMUX(13, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p14_3_pwm1_16: p14_3_pwm1_16 {
+ pinmux = <DT_CAT1_PINMUX(14, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_0_pwm1_18: p15_0_pwm1_18 {
+ pinmux = <DT_CAT1_PINMUX(15, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_2_pwm1_19: p15_2_pwm1_19 {
+ pinmux = <DT_CAT1_PINMUX(15, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_0_pwm1_0: p16_0_pwm1_0 {
+ pinmux = <DT_CAT1_PINMUX(16, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_1_pwm1_1: p16_1_pwm1_1 {
+ pinmux = <DT_CAT1_PINMUX(16, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_2_pwm1_2: p16_2_pwm1_2 {
+ pinmux = <DT_CAT1_PINMUX(16, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_3_pwm1_3: p16_3_pwm1_3 {
+ pinmux = <DT_CAT1_PINMUX(16, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_4_pwm1_4: p16_4_pwm1_4 {
+ pinmux = <DT_CAT1_PINMUX(16, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_5_pwm1_5: p16_5_pwm1_5 {
+ pinmux = <DT_CAT1_PINMUX(16, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_6_pwm1_22: p16_6_pwm1_22 {
+ pinmux = <DT_CAT1_PINMUX(16, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p16_7_pwm1_23: p16_7_pwm1_23 {
+ pinmux = <DT_CAT1_PINMUX(16, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_0_pwm1_11: p21_0_pwm1_11 {
+ pinmux = <DT_CAT1_PINMUX(21, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_2_pwm1_12: p21_2_pwm1_12 {
+ pinmux = <DT_CAT1_PINMUX(21, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /* PWM tcpwm_line_compl*/
+ /omit-if-no-ref/ p1_1_pwm0_1: p1_1_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_3_pwm0_2: p1_3_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_5_pwm0_3: p1_5_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_7_pwm0_4: p1_7_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p3_0_pwm0_5: p3_0_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(3, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_0_pwm0_6: p4_0_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_2_pwm0_7: p4_2_pwm0_7_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_4_pwm0_0: p4_4_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p4_6_pwm0_1: p4_6_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p5_0_pwm0_2: p5_0_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(5, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_1_pwm0_3: p6_1_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_3_pwm0_4: p6_3_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_5_pwm0_5: p6_5_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p6_7_pwm0_6: p6_7_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_1_pwm0_7: p7_1_pwm0_7_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_3_pwm0_0: p7_3_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_5_pwm0_1: p7_5_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p7_7_pwm0_2: p7_7_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_1_pwm0_3: p8_1_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p8_3_pwm0_4: p8_3_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p9_2_pwm0_7: p9_2_pwm0_7_compl {
+ pinmux = <DT_CAT1_PINMUX(9, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p9_3_pwm0_0: p9_3_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(9, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_1_pwm0_1: p12_1_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_3_pwm0_2: p12_3_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p12_5_pwm0_3: p12_5_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p13_2_pwm0_4: p13_2_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p13_4_pwm0_5: p13_4_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(13, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p14_4_pwm0_0: p14_4_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_1_pwm0_2: p15_1_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p15_3_pwm0_3: p15_3_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_0_pwm0_0: p17_0_pwm0_0_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_1_pwm0_1: p17_1_pwm0_1_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_2_pwm0_2: p17_2_pwm0_2_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_3_pwm0_3: p17_3_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_4_pwm0_4: p17_4_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 4, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_5_pwm0_5: p17_5_pwm0_5_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 5, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p17_6_pwm0_6: p17_6_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 6, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_1_pwm0_3: p21_1_pwm0_3_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 1, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_3_pwm0_4: p21_3_pwm0_4_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 3, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p21_7_pwm0_6: p21_7_pwm0_6_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 7, HSIOM_SEL_ACT_1)>;
+ };
+
+ /omit-if-no-ref/ p1_1_pwm1_1: p1_1_pwm1_1_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_3_pwm1_2: p1_3_pwm1_2_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_5_pwm1_3: p1_5_pwm1_3_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p1_7_pwm1_4: p1_7_pwm1_4_compl {
+ pinmux = <DT_CAT1_PINMUX(1, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p3_0_pwm1_5: p3_0_pwm1_5_compl {
+ pinmux = <DT_CAT1_PINMUX(3, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_0_pwm1_6: p4_0_pwm1_6_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_2_pwm1_7: p4_2_pwm1_7_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_4_pwm1_8: p4_4_pwm1_8_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p4_6_pwm1_9: p4_6_pwm1_9_compl {
+ pinmux = <DT_CAT1_PINMUX(4, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p5_0_pwm1_10: p5_0_pwm1_10_compl {
+ pinmux = <DT_CAT1_PINMUX(5, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_1_pwm1_11: p6_1_pwm1_11_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_3_pwm1_12: p6_3_pwm1_12_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_5_pwm1_13: p6_5_pwm1_13_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p6_7_pwm1_14: p6_7_pwm1_14_compl {
+ pinmux = <DT_CAT1_PINMUX(6, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_1_pwm1_15: p7_1_pwm1_15_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_3_pwm1_16: p7_3_pwm1_16_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_5_pwm1_17: p7_5_pwm1_17_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p7_7_pwm1_18: p7_7_pwm1_18_compl {
+ pinmux = <DT_CAT1_PINMUX(7, 7, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_1_pwm1_19: p8_1_pwm1_19_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p8_3_pwm1_20: p8_3_pwm1_20_compl {
+ pinmux = <DT_CAT1_PINMUX(8, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p9_0_pwm1_23: p9_0_pwm1_23_compl {
+ pinmux = <DT_CAT1_PINMUX(9, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p9_1_pwm1_0: p9_1_pwm1_0_compl {
+ pinmux = <DT_CAT1_PINMUX(9, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_1_pwm1_9: p12_1_pwm1_9_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_3_pwm1_10: p12_3_pwm1_10_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p12_5_pwm1_11: p12_5_pwm1_11_compl {
+ pinmux = <DT_CAT1_PINMUX(12, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p13_2_pwm1_12: p13_2_pwm1_12_compl {
+ pinmux = <DT_CAT1_PINMUX(13, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p13_4_pwm1_13: p13_4_pwm1_13_compl {
+ pinmux = <DT_CAT1_PINMUX(13, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p14_4_pwm1_16: p14_4_pwm1_16_compl {
+ pinmux = <DT_CAT1_PINMUX(14, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_1_pwm1_18: p15_1_pwm1_18_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p15_3_pwm1_19: p15_3_pwm1_19_compl {
+ pinmux = <DT_CAT1_PINMUX(15, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_0_pwm1_0: p17_0_pwm1_0_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 0, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_1_pwm1_1: p17_1_pwm1_1_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_2_pwm1_2: p17_2_pwm1_2_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 2, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_3_pwm1_3: p17_3_pwm1_3_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_4_pwm1_4: p17_4_pwm1_4_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 4, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_5_pwm1_5: p17_5_pwm1_5_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 5, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p17_6_pwm1_22: p17_6_pwm1_22_compl {
+ pinmux = <DT_CAT1_PINMUX(17, 6, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p20_1_pwm1_8: p20_1_pwm1_8_compl {
+ pinmux = <DT_CAT1_PINMUX(20, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_1_pwm1_11: p21_1_pwm1_11_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 1, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_3_pwm1_12: p21_3_pwm1_12_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 3, HSIOM_SEL_ACT_2)>;
+ };
+
+ /omit-if-no-ref/ p21_7_pwm1_14: p21_7_pwm1_14_compl {
+ pinmux = <DT_CAT1_PINMUX(21, 7, HSIOM_SEL_ACT_2)>;
+ };
+ };
+ };
+};
+
+&gpio_prt8 {
+ ngpios = <5>;
+};
+
+&gpio_prt13 {
+ ngpios = <6>;
+};
+
+&gpio_prt14 {
+ ngpios = <2>;
+};
+
+&gpio_prt15 {
+ ngpios = <4>;
+};
+
+&gpio_prt17 {
+ ngpios = <7>;
+};
+
+&gpio_prt20 {
+ ngpios = <1>;
+};
+
+&gpio_prt21 {
+ ngpios = <5>;
+};
diff --git a/dts/arm/infineon/edge/pse84/pse84_s.dtsi b/dts/arm/infineon/edge/pse84/pse84_s.dtsi
new file mode 100644
index 0000000..2d1553d
--- /dev/null
+++ b/dts/arm/infineon/edge/pse84/pse84_s.dtsi
@@ -0,0 +1,1106 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <mem.h>
+
+/ {
+ sram0: sram0@34000000 {
+ compatible = "mmio-sram";
+ reg = <0x34000000 0x100000>;
+ };
+
+ dtcm {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ dtcm_m33s: dtcm_m33s@58040000 {
+ compatible = "zephyr,memory-region", "arm,dtcm";
+ reg = <0x58040000 DT_SIZE_K(256)>;
+ zephyr,memory-region = "DTCM";
+ };
+ };
+
+ itcm {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ itcm_m33s: itcm_m33s@58000000 {
+ compatible = "zephyr,memory-region", "arm,itcm";
+ reg = <0x58000000 DT_SIZE_K(256)>;
+ zephyr,memory-region = "ITCM";
+ };
+ };
+
+ rram {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ rram: rram@32000000 {
+ compatible = "soc-nv-flash";
+ reg = <0x32000000 DT_SIZE_K(512)>;
+ };
+ };
+
+ socmem {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ socmem: socmem@36000000 {
+ reg = <0x36000000 DT_SIZE_M(5)>;
+ };
+ };
+
+ soc {
+ pinctrl: pinctrl@52800000 {
+ compatible = "infineon,cat1-pinctrl";
+ reg = <0x52800000 0x20000>;
+ };
+
+ hsiom: hsiom@52800000 {
+ compatible = "infineon,cat1-hsiom";
+ reg = <0x52800000 0x4000>;
+ interrupts = <42 4>, <40 4>;
+ status = "disabled";
+ };
+
+ gpio_prt0: gpio@52810000 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x52810000 0x80>;
+ interrupts = <20 4>;
+ gpio-controller;
+ ngpios = <2>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt1: gpio@52810080 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x52810080 0x80>;
+ gpio-controller;
+ ngpios = <8>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt2: gpio@52810100 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x52810100 0x80>;
+ interrupts = <21 4>;
+ gpio-controller;
+ ngpios = <1>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt3: gpio@52810180 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x52810180 0x80>;
+ interrupts = <22 4>;
+ gpio-controller;
+ ngpios = <2>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt4: gpio@52810200 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x52810200 0x80>;
+ gpio-controller;
+ ngpios = <8>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt5: gpio@52810280 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x52810280 0x80>;
+ interrupts = <23 4>;
+ gpio-controller;
+ ngpios = <1>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt6: gpio@52810300 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x52810300 0x80>;
+ interrupts = <24 4>;
+ gpio-controller;
+ ngpios = <8>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt7: gpio@52810380 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x52810380 0x80>;
+ interrupts = <25 4>;
+ gpio-controller;
+ ngpios = <8>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt8: gpio@52810400 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x52810400 0x80>;
+ interrupts = <26 4>;
+ gpio-controller;
+ ngpios = <8>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt9: gpio@52810480 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x52810480 0x80>;
+ interrupts = <27 4>;
+ gpio-controller;
+ ngpios = <4>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt10: gpio@52810500 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x52810500 0x80>;
+ interrupts = <28 4>;
+ gpio-controller;
+ ngpios = <8>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt11: gpio@52810580 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x52810580 0x80>;
+ interrupts = <29 4>;
+ gpio-controller;
+ ngpios = <8>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt12: gpio@52810600 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x52810600 0x80>;
+ interrupts = <30 4>;
+ gpio-controller;
+ ngpios = <6>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt13: gpio@52810680 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x52810680 0x80>;
+ interrupts = <31 4>;
+ gpio-controller;
+ ngpios = <8>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt14: gpio@52810700 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x52810700 0x80>;
+ interrupts = <32 4>;
+ gpio-controller;
+ ngpios = <8>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt15: gpio@52810780 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x52810780 0x80>;
+ interrupts = <33 4>;
+ gpio-controller;
+ ngpios = <8>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt16: gpio@52810800 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x52810800 0x80>;
+ interrupts = <34 4>;
+ gpio-controller;
+ ngpios = <8>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt17: gpio@52810880 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x52810880 0x80>;
+ interrupts = <35 4>;
+ gpio-controller;
+ ngpios = <8>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt18: gpio@52810900 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x52810900 0x80>;
+ interrupts = <36 4>;
+ gpio-controller;
+ ngpios = <2>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt19: gpio@52810980 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x52810980 0x80>;
+ interrupts = <37 4>;
+ gpio-controller;
+ ngpios = <2>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt20: gpio@52810a00 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x52810a00 0x80>;
+ interrupts = <38 4>;
+ gpio-controller;
+ ngpios = <8>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ gpio_prt21: gpio@52810a80 {
+ compatible = "infineon,cat1-gpio";
+ reg = <0x52810a80 0x80>;
+ interrupts = <39 4>;
+ gpio-controller;
+ ngpios = <8>;
+ status = "disabled";
+ #gpio-cells = <2>;
+ };
+
+ adc0: adc@52e80000 {
+ compatible = "infineon,autanalog-sar-adc";
+ reg = <0x52e80000 0xf20>;
+ interrupts = <57 4>;
+ status = "disabled";
+ #io-channel-cells = <1>;
+ };
+
+ ipc0: ipc@522a0000 {
+ compatible = "infineon,cat1-ipc";
+ reg = <0x522a0000 0x1200>;
+ status = "disabled";
+ #ipc-config-cells = <3>;
+ };
+
+ ipc1: ipc@541d0000 {
+ compatible = "infineon,cat1-ipc";
+ reg = <0x541d0000 0x1200>;
+ status = "disabled";
+ #ipc-config-cells = <3>;
+ };
+
+ scb0: scb@52990000 {
+ compatible = "infineon,cat1-scb";
+ reg = <0x52990000 0xfd0>;
+ interrupts = <43 4>;
+ status = "disabled";
+ };
+
+ scb2: scb@529a0000 {
+ compatible = "infineon,cat1-scb";
+ reg = <0x529a0000 0xfd0>;
+ interrupts = <143 4>;
+ status = "disabled";
+ };
+
+ scb3: scb@529b0000 {
+ compatible = "infineon,cat1-scb";
+ reg = <0x529b0000 0xfd0>;
+ interrupts = <144 4>;
+ status = "disabled";
+ };
+
+ scb4: scb@529c0000 {
+ compatible = "infineon,cat1-scb";
+ reg = <0x529c0000 0xfd0>;
+ interrupts = <145 4>;
+ status = "disabled";
+ };
+
+ scb5: scb@529d0000 {
+ compatible = "infineon,cat1-scb";
+ reg = <0x529d0000 0xfd0>;
+ interrupts = <146 4>;
+ status = "disabled";
+ };
+
+ scb6: scb@529e0000 {
+ compatible = "infineon,cat1-scb";
+ reg = <0x529e0000 0xfd0>;
+ interrupts = <147 4>;
+ status = "disabled";
+ };
+
+ scb7: scb@529f0000 {
+ compatible = "infineon,cat1-scb";
+ reg = <0x529f0000 0xfd0>;
+ interrupts = <148 4>;
+ status = "disabled";
+ };
+
+ scb8: scb@52a00000 {
+ compatible = "infineon,cat1-scb";
+ reg = <0x52a00000 0xfd0>;
+ interrupts = <149 4>;
+ status = "disabled";
+ };
+
+ scb9: scb@52a10000 {
+ compatible = "infineon,cat1-scb";
+ reg = <0x52a10000 0xfd0>;
+ interrupts = <150 4>;
+ status = "disabled";
+ };
+
+ scb10: scb@52a20000 {
+ compatible = "infineon,cat1-scb";
+ reg = <0x52a20000 0xfd0>;
+ interrupts = <151 4>;
+ status = "disabled";
+ };
+
+ scb11: scb@52a30000 {
+ compatible = "infineon,cat1-scb";
+ reg = <0x52a30000 0xfd0>;
+ interrupts = <152 4>;
+ status = "disabled";
+ };
+
+ scb1: scb@52d00000 {
+ compatible = "infineon,cat1-scb";
+ reg = <0x52d00000 0xfd0>;
+ interrupts = <142 4>;
+ status = "disabled";
+ };
+
+ i3c0: i3c@52a50000 {
+ compatible = "infineon,cat1-i3c";
+ reg = <0x52a50000 0x438>;
+ interrupts = <176 4>;
+ status = "disabled";
+ };
+
+ watchdog0: watchdog@5240c000 {
+ compatible = "infineon,cat1-watchdog";
+ reg = <0x5240c000 0x180>;
+ interrupts = <54 4>;
+ status = "disabled";
+ };
+
+ mcwdt0: mcwdt@5240d000 {
+ compatible = "infineon,cat1-lp-timer-pdl";
+ reg = <0x5240d000 0x40>;
+ interrupts = <55 4>;
+ status = "disabled";
+ };
+
+ mcwdt1: mcwdt@5240d040 {
+ compatible = "infineon,cat1-lp-timer-pdl";
+ reg = <0x5240d040 0x40>;
+ interrupts = <0 4>;
+ status = "disabled";
+ };
+
+ tcpwm0: tcpwm0@52860000 {
+ reg = <0x52860000 0x8000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ tcpwm0_0: tcpwm0_0@52860000 {
+ compatible = "infineon,tcpwm";
+ reg = <0x52860000 0x80>;
+ interrupts = <110 4>;
+ resolution = <32>;
+ status = "disabled";
+
+ pwm0_0: pwm0_0 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter0_0: counter0_0 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm0_1: tcpwm0_1@52860080 {
+ compatible = "infineon,tcpwm";
+ reg = <0x52860080 0x80>;
+ interrupts = <111 4>;
+ resolution = <32>;
+ status = "disabled";
+
+ pwm0_1: pwm0_1 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter0_1: counter0_1 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm0_2: tcpwm0_2@52860100 {
+ compatible = "infineon,tcpwm";
+ reg = <0x52860100 0x80>;
+ interrupts = <112 4>;
+ resolution = <32>;
+ status = "disabled";
+
+ pwm0_2: pwm0_2 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter0_2: counter0_2 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm0_3: tcpwm0_3@52860180 {
+ compatible = "infineon,tcpwm";
+ reg = <0x52860180 0x80>;
+ interrupts = <113 4>;
+ resolution = <32>;
+ status = "disabled";
+
+ pwm0_3: pwm0_3 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter0_3: counter0_3 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm0_4: tcpwm0_4@52860200 {
+ compatible = "infineon,tcpwm";
+ reg = <0x52860200 0x80>;
+ interrupts = <114 4>;
+ resolution = <32>;
+ status = "disabled";
+
+ pwm0_4: pwm0_4 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter0_4: counter0_4 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm0_5: tcpwm0_5@52860280 {
+ compatible = "infineon,tcpwm";
+ reg = <0x52860280 0x80>;
+ interrupts = <115 4>;
+ resolution = <32>;
+ status = "disabled";
+
+ pwm0_5: pwm0_5 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter0_5: counter0_5 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm0_6: tcpwm0_6@52860300 {
+ compatible = "infineon,tcpwm";
+ reg = <0x52860300 0x80>;
+ interrupts = <116 4>;
+ resolution = <32>;
+ status = "disabled";
+
+ pwm0_6: pwm0_6 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter0_6: counter0_6 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm0_7: tcpwm0_7@52860380 {
+ compatible = "infineon,tcpwm";
+ reg = <0x52860380 0x80>;
+ interrupts = <117 4>;
+ resolution = <32>;
+ status = "disabled";
+
+ pwm0_7: pwm0_7 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter0_7: counter0_7 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+ };
+
+ tcpwm1: tcpwm1@52868000 {
+ reg = <0x52868000 0x8000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ tcpwm1_0: tcpwm1_0@52868000 {
+ compatible = "infineon,tcpwm";
+ reg = <0x52868000 0x80>;
+ interrupts = <118 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_0: pwm1_0 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_0: counter1_0 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_1: tcpwm1_1@52868080 {
+ compatible = "infineon,tcpwm";
+ reg = <0x52868080 0x80>;
+ interrupts = <119 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_1: pwm1_1 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_1: counter1_1 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_2: tcpwm1_2@52868100 {
+ compatible = "infineon,tcpwm";
+ reg = <0x52868100 0x80>;
+ interrupts = <120 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_2: pwm1_2 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_2: counter1_2 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_3: tcpwm1_3@52868180 {
+ compatible = "infineon,tcpwm";
+ reg = <0x52868180 0x80>;
+ interrupts = <121 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_3: pwm1_3 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_3: counter1_3 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_4: tcpwm1_4@52868200 {
+ compatible = "infineon,tcpwm";
+ reg = <0x52868200 0x80>;
+ interrupts = <122 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_4: pwm1_4 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_4: counter1_4 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_5: tcpwm1_5@52868280 {
+ compatible = "infineon,tcpwm";
+ reg = <0x52868280 0x80>;
+ interrupts = <123 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_5: pwm1_5 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_5: counter1_5 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_6: tcpwm1_6@52868300 {
+ compatible = "infineon,tcpwm";
+ reg = <0x52868300 0x80>;
+ interrupts = <124 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_6: pwm1_6 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_6: counter1_6 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_7: tcpwm1_7@52868380 {
+ compatible = "infineon,tcpwm";
+ reg = <0x52868380 0x80>;
+ interrupts = <125 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_7: pwm1_7 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_7: counter1_7 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_8: tcpwm1_8@52868400 {
+ compatible = "infineon,tcpwm";
+ reg = <0x52868400 0x80>;
+ interrupts = <126 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_8: pwm1_8 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_8: counter1_8 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_9: tcpwm1_9@52868480 {
+ compatible = "infineon,tcpwm";
+ reg = <0x52868480 0x80>;
+ interrupts = <127 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_9: pwm1_9 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_9: counter1_9 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_10: tcpwm1_10@52868500 {
+ compatible = "infineon,tcpwm";
+ reg = <0x52868500 0x80>;
+ interrupts = <128 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_10: pwm1_10 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_10: counter1_10 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_11: tcpwm1_11@52868580 {
+ compatible = "infineon,tcpwm";
+ reg = <0x52868580 0x80>;
+ interrupts = <129 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_11: pwm1_11 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_11: counter1_11 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_12: tcpwm1_12@52868600 {
+ compatible = "infineon,tcpwm";
+ reg = <0x52868600 0x80>;
+ interrupts = <130 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_12: pwm1_12 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_12: counter1_12 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_13: tcpwm1_13@52868680 {
+ compatible = "infineon,tcpwm";
+ reg = <0x52868680 0x80>;
+ interrupts = <131 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_13: pwm1_13 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_13: counter1_13 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_14: tcpwm1_14@52868700 {
+ compatible = "infineon,tcpwm";
+ reg = <0x52868700 0x80>;
+ interrupts = <132 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_14: pwm1_14 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_14: counter1_14 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_15: tcpwm1_15@52868780 {
+ compatible = "infineon,tcpwm";
+ reg = <0x52868780 0x80>;
+ interrupts = <133 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_15: pwm1_15 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_15: counter1_15 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_16: tcpwm1_16@52868800 {
+ compatible = "infineon,tcpwm";
+ reg = <0x52868800 0x80>;
+ interrupts = <134 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_16: pwm1_16 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_16: counter1_16 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_17: tcpwm1_17@52868880 {
+ compatible = "infineon,tcpwm";
+ reg = <0x52868880 0x80>;
+ interrupts = <135 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_17: pwm1_17 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_17: counter1_17 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_18: tcpwm1_18@52868900 {
+ compatible = "infineon,tcpwm";
+ reg = <0x52868900 0x80>;
+ interrupts = <136 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_18: pwm1_18 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_18: counter1_18 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_19: tcpwm1_19@52868980 {
+ compatible = "infineon,tcpwm";
+ reg = <0x52868980 0x80>;
+ interrupts = <137 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_19: pwm1_19 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_19: counter1_19 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_20: tcpwm1_20@52868a00 {
+ compatible = "infineon,tcpwm";
+ reg = <0x52868a00 0x80>;
+ interrupts = <138 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_20: pwm1_20 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_20: counter1_20 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_21: tcpwm1_21@52868a80 {
+ compatible = "infineon,tcpwm";
+ reg = <0x52868a80 0x80>;
+ interrupts = <139 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_21: pwm1_21 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_21: counter1_21 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_22: tcpwm1_22@52868b00 {
+ compatible = "infineon,tcpwm";
+ reg = <0x52868b00 0x80>;
+ interrupts = <140 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_22: pwm1_22 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_22: counter1_22 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+
+ tcpwm1_23: tcpwm1_23@52868b80 {
+ compatible = "infineon,tcpwm";
+ reg = <0x52868b80 0x80>;
+ interrupts = <141 4>;
+ resolution = <16>;
+ status = "disabled";
+
+ pwm1_23: pwm1_23 {
+ compatible = "infineon,tcpwm-pwm";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ counter1_23: counter1_23 {
+ compatible = "infineon,tcpwm-counter";
+ status = "disabled";
+ };
+ };
+ };
+
+ dma0: dw@52270000 {
+ #dma-cells = <1>;
+ compatible = "infineon,cat1-dma-pdl";
+ reg = <0x52270000 0x10000>;
+ dma-channels = <16>;
+ interrupts = <82 4>, /* CH0 */
+ <83 4>, /* CH1 */
+ <84 4>, /* CH2 */
+ <85 4>, /* CH3 */
+ <86 4>, /* CH4 */
+ <87 4>, /* CH5 */
+ <88 4>, /* CH6 */
+ <89 4>, /* CH7 */
+ <90 4>, /* CH8 */
+ <91 4>, /* CH9 */
+ <92 4>, /* CH10 */
+ <93 4>, /* CH11 */
+ <94 4>, /* CH12 */
+ <95 4>, /* CH13 */
+ <96 4>, /* CH14 */
+ <97 4>; /* CH15 */
+ status = "disabled";
+ };
+
+ dma1: dw@52280000 {
+ #dma-cells = <1>;
+ compatible = "infineon,cat1-dma-pdl";
+ reg = <0x52280000 0x10000>;
+ dma-channels = <16>;
+ interrupts = <181 4>, /* CH0 */
+ <182 4>, /* CH1 */
+ <183 4>, /* CH2 */
+ <184 4>, /* CH3 */
+ <185 4>, /* CH4 */
+ <186 4>, /* CH5 */
+ <187 4>, /* CH6 */
+ <188 4>, /* CH7 */
+ <189 4>, /* CH8 */
+ <190 4>, /* CH9 */
+ <191 4>, /* CH10 */
+ <192 4>, /* CH11 */
+ <193 4>, /* CH12 */
+ <194 4>, /* CH13 */
+ <195 4>, /* CH14 */
+ <196 4>; /* CH15 */
+ status = "disabled";
+ };
+
+ sdhc0: sdhc@54810000 {
+ compatible = "infineon,cat1-sdhc-sdio";
+ reg = <0x54810000 0x2000>;
+ interrupts = <155 4>, /* SDIO wakeup interrupt for mxsdhc */
+ <154 6>; /* Consolidated interrupt for mxsdhc */
+ status = "disabled";
+ };
+
+ sdhc1: sdhc@54820000 {
+ compatible = "infineon,cat1-sdhc-sdio";
+ reg = <0x54820000 0x2000>;
+ interrupts = <157 4>, /* SDIO wakeup interrupt for mxsdhc */
+ <156 6>; /* Consolidated interrupt for mxsdhc */
+ status = "disabled";
+ };
+ };
+};
diff --git a/dts/arm/infineon/edge/pse84/system_clocks.dtsi b/dts/arm/infineon/edge/pse84/system_clocks.dtsi
new file mode 100644
index 0000000..368f9fc
--- /dev/null
+++ b/dts/arm/infineon/edge/pse84/system_clocks.dtsi
@@ -0,0 +1,385 @@
+/*
+ * Copyright (c) 2025 Infineon Technologies AG,
+ * or an affiliate of Infineon Technologies AG.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#define DIV_8_BIT 00
+#define DIV_16_BIT 01
+#define DIV_16_5_BIT 02
+#define DIV_24_5_BIT 03
+
+#include <dt-bindings/clock/ifx_clock_source_common.h>
+#include <dt-bindings/clock/ifx_clock_source_pse8xx.h>
+/ {
+ /* iho */
+ clk_iho: clk_iho {
+ #clock-cells = <0>;
+ compatible = "infineon,fixed-clock";
+ clock-frequency = <12000000>;
+ system-clock = <IFX_IHO>;
+ status = "okay";
+ };
+
+ /* pilo */
+ clk_pilo: clk_pilo {
+ #clock-cells = <0>;
+ compatible = "infineon,fixed-clock";
+ clock-frequency = <32768>;
+ system-clock = <IFX_PILO>;
+ status = "okay";
+ };
+
+ dpll_hp: dpll_hp {
+ #clock-cells = <0>;
+ compatible = "infineon,fixed-clock";
+ clock-frequency = <100000000>;
+ system-clock = <IFX_DPLL500>;
+ status = "disabled";
+ };
+
+ path_mux0: path_mux0 {
+ #clock-cells = <0>;
+ compatible = "infineon,fixed-factor-clock";
+ clocks = <&clk_iho>;
+ system-clock = <IFX_PATHMUX>;
+ instance = <0>;
+ source-path = <IFX_CAT1_CLKPATH_IN_IHO>;
+ status = "disabled";
+ };
+
+ path_mux1: path_mux1 {
+ #clock-cells = <0>;
+ compatible = "infineon,fixed-factor-clock";
+ clocks = <&clk_iho>;
+ system-clock = <IFX_PATHMUX>;
+ instance = <1>;
+ source-path = <IFX_CAT1_CLKPATH_IN_IHO>;
+ status = "disabled";
+ };
+
+ path_mux2: path_mux2 {
+ #clock-cells = <0>;
+ compatible = "infineon,fixed-factor-clock";
+ clocks = <&clk_iho>;
+ system-clock = <IFX_PATHMUX>;
+ instance = <2>;
+ source-path = <IFX_CAT1_CLKPATH_IN_IHO>;
+ status = "disabled";
+ };
+
+ path_mux3: path_mux3 {
+ #clock-cells = <0>;
+ compatible = "infineon,fixed-factor-clock";
+ clocks = <&clk_iho>;
+ system-clock = <IFX_PATHMUX>;
+ instance = <3>;
+ source-path = <IFX_CAT1_CLKPATH_IN_IHO>;
+ status = "disabled";
+ };
+
+ path_mux4: path_mux4 {
+ #clock-cells = <0>;
+ compatible = "infineon,fixed-factor-clock";
+ clocks = <&clk_iho>;
+ system-clock = <IFX_PATHMUX>;
+ instance = <4>;
+ source-path = <IFX_CAT1_CLKPATH_IN_IHO>;
+ status = "disabled";
+ };
+
+ path_mux5: path_mux5 {
+ #clock-cells = <0>;
+ compatible = "infineon,fixed-factor-clock";
+ clocks = <&clk_iho>;
+ system-clock = <IFX_PATHMUX>;
+ instance = <5>;
+ source-path = <IFX_CAT1_CLKPATH_IN_IHO>;
+ status = "disabled";
+ };
+
+ clk_hf0: clk_hf0 {
+ #clock-cells = <0>;
+ compatible = "infineon,fixed-factor-clock";
+ clocks = <&path_mux0>;
+ clock-div = <IFX_CLK_HF_NO_DIVIDE>;
+ system-clock = <IFX_HF>;
+ instance = <0>;
+ status = "disabled";
+ };
+
+ clk_hf1: clk_hf1 {
+ #clock-cells = <0>;
+ compatible = "infineon,fixed-factor-clock";
+ clocks = <&path_mux0>;
+ clock-div = <IFX_CLK_HF_NO_DIVIDE>;
+ system-clock = <IFX_HF>;
+ instance = <1>;
+ status = "disabled";
+ };
+
+ clk_hf2: clk_hf2 {
+ #clock-cells = <0>;
+ compatible = "infineon,fixed-factor-clock";
+ clocks = <&path_mux0>;
+ clock-div = <IFX_CLK_HF_NO_DIVIDE>;
+ system-clock = <IFX_HF>;
+ instance = <2>;
+ status = "disabled";
+ };
+
+ clk_hf3: clk_hf3 {
+ #clock-cells = <0>;
+ compatible = "infineon,fixed-factor-clock";
+ clocks = <&path_mux0>;
+ clock-div = <IFX_CLK_HF_NO_DIVIDE>;
+ system-clock = <IFX_HF>;
+ instance = <3>;
+ status = "disabled";
+ };
+
+ clk_hf4: clk_hf4 {
+ #clock-cells = <0>;
+ compatible = "infineon,fixed-factor-clock";
+ clocks = <&path_mux0>;
+ clock-div = <IFX_CLK_HF_NO_DIVIDE>;
+ system-clock = <IFX_HF>;
+ instance = <4>;
+ status = "disabled";
+ };
+
+ clk_hf5: clk_hf5 {
+ #clock-cells = <0>;
+ compatible = "infineon,fixed-factor-clock";
+ clocks = <&path_mux0>;
+ clock-div = <IFX_CLK_HF_NO_DIVIDE>;
+ system-clock = <IFX_HF>;
+ instance = <5>;
+ status = "disabled";
+ };
+
+ clk_hf6: clk_hf6 {
+ #clock-cells = <0>;
+ compatible = "infineon,fixed-factor-clock";
+ clocks = <&path_mux0>;
+ clock-div = <IFX_CLK_HF_NO_DIVIDE>;
+ system-clock = <IFX_HF>;
+ instance = <6>;
+ status = "disabled";
+ };
+
+ clk_hf7: clk_hf7 {
+ #clock-cells = <0>;
+ compatible = "infineon,fixed-factor-clock";
+ clocks = <&path_mux0>;
+ clock-div = <IFX_CLK_HF_NO_DIVIDE>;
+ system-clock = <IFX_HF>;
+ instance = <7>;
+ status = "disabled";
+ };
+
+ clk_hf8: clk_hf8 {
+ #clock-cells = <0>;
+ compatible = "infineon,fixed-factor-clock";
+ clocks = <&path_mux0>;
+ clock-div = <IFX_CLK_HF_NO_DIVIDE>;
+ system-clock = <IFX_HF>;
+ instance = <8>;
+ status = "disabled";
+ };
+
+ clk_hf9: clk_hf9 {
+ #clock-cells = <0>;
+ compatible = "infineon,fixed-factor-clock";
+ clocks = <&path_mux0>;
+ clock-div = <IFX_CLK_HF_NO_DIVIDE>;
+ system-clock = <IFX_HF>;
+ instance = <9>;
+ status = "disabled";
+ };
+
+ clk_hf10: clk_hf10 {
+ #clock-cells = <0>;
+ compatible = "infineon,fixed-factor-clock";
+ clocks = <&path_mux0>;
+ clock-div = <IFX_CLK_HF_NO_DIVIDE>;
+ system-clock = <IFX_HF>;
+ instance = <10>;
+ status = "disabled";
+ };
+
+ clk_hf11: clk_hf11 {
+ #clock-cells = <0>;
+ compatible = "infineon,fixed-factor-clock";
+ clocks = <&path_mux0>;
+ clock-div = <IFX_CLK_HF_NO_DIVIDE>;
+ system-clock = <IFX_HF>;
+ instance = <11>;
+ status = "disabled";
+ };
+
+ clk_hf12: clk_hf12 {
+ #clock-cells = <0>;
+ compatible = "infineon,fixed-factor-clock";
+ clocks = <&path_mux0>;
+ clock-div = <IFX_CLK_HF_NO_DIVIDE>;
+ system-clock = <IFX_HF>;
+ instance = <12>;
+ status = "disabled";
+ };
+
+ clk_hf13: clk_hf13 {
+ #clock-cells = <0>;
+ compatible = "infineon,fixed-factor-clock";
+ clocks = <&path_mux0>;
+ clock-div = <IFX_CLK_HF_NO_DIVIDE>;
+ system-clock = <IFX_HF>;
+ instance = <13>;
+ status = "disabled";
+ };
+
+ peri0: peri0 {
+ /* Peripheral clock dividers Group 1 */
+ peri0_group1_8bit_0: peri0_group1_8bit_0 {
+ #clock-cells = <0>;
+ compatible = "infineon,peri-div";
+ peri-group = [00 01]; /* inst#, group# */
+ div-type = <DIV_8_BIT>;
+ channel = <0>;
+ clock-div = <1>;
+ status = "disabled";
+ };
+
+ peri0_group1_8bit_1: peri0_group1_8bit_1 {
+ #clock-cells = <0>;
+ compatible = "infineon,peri-div";
+ peri-group = [00 01]; /* inst#, group# */
+ div-type = <DIV_8_BIT>;
+ channel = <1>;
+ clock-div = <1>;
+ status = "disabled";
+ };
+
+ peri0_group1_8bit_2: peri0_group1_8bit_2 {
+ #clock-cells = <0>;
+ compatible = "infineon,peri-div";
+ peri-group = [00 01]; /* inst#, group# */
+ div-type = <DIV_8_BIT>;
+ channel = <2>;
+ clock-div = <1>;
+ status = "disabled";
+ };
+
+ peri0_group1_8bit_3: peri0_group1_8bit_3 {
+ #clock-cells = <0>;
+ compatible = "infineon,peri-div";
+ peri-group = [00 01]; /* inst#, group# */
+ div-type = <DIV_8_BIT>;
+ channel = <3>;
+ clock-div = <1>;
+ status = "disabled";
+ };
+
+ peri0_group1_8bit_4: peri0_group1_8bit_4 {
+ #clock-cells = <0>;
+ compatible = "infineon,peri-div";
+ peri-group = [00 01]; /* inst#, group# */
+ div-type = <DIV_8_BIT>;
+ channel = <4>;
+ clock-div = <1>;
+ status = "disabled";
+ };
+
+ peri0_group1_16bit_0: peri0_group1_16bit_0 {
+ #clock-cells = <0>;
+ compatible = "infineon,peri-div";
+ peri-group = [00 01]; /* inst#, group# */
+ div-type = <DIV_16_BIT>;
+ channel = <0>;
+ clock-div = <1>;
+ status = "disabled";
+ };
+
+ peri0_group1_16bit_1: peri0_group1_16bit_1 {
+ #clock-cells = <0>;
+ compatible = "infineon,peri-div";
+ peri-group = [00 01]; /* inst#, group# */
+ div-type = <DIV_16_BIT>;
+ channel = <1>;
+ clock-div = <1>;
+ status = "disabled";
+ };
+
+ peri0_group1_16bit_2: peri0_group1_16bit_2 {
+ #clock-cells = <0>;
+ compatible = "infineon,peri-div";
+ peri-group = [00 01]; /* inst#, group# */
+ div-type = <DIV_16_BIT>;
+ channel = <2>;
+ clock-div = <1>;
+ status = "disabled";
+ };
+
+ peri0_group1_16bit_3: peri0_group1_16bit_3 {
+ #clock-cells = <0>;
+ compatible = "infineon,peri-div";
+ peri-group = [00 01]; /* inst#, group# */
+ div-type = <DIV_16_BIT>;
+ channel = <3>;
+ clock-div = <1>;
+ status = "disabled";
+ };
+
+ peri0_group1_16_5bit_0: peri0_group1_16_5bit_0 {
+ #clock-cells = <0>;
+ compatible = "infineon,peri-div";
+ peri-group = [00 01]; /* inst#, group# */
+ div-type = <DIV_16_5_BIT>;
+ channel = <0>;
+ clock-div = <1>;
+ status = "disabled";
+ };
+
+ peri0_group1_16_5bit_1: peri0_group1_16_5bit_1 {
+ #clock-cells = <0>;
+ compatible = "infineon,peri-div";
+ peri-group = [00 01]; /* inst#, group# */
+ div-type = <DIV_16_5_BIT>;
+ channel = <1>;
+ clock-div = <1>;
+ status = "disabled";
+ };
+
+ peri0_group1_24_5bit_0: peri0_group1_24_5bit_0 {
+ #clock-cells = <0>;
+ compatible = "infineon,peri-div";
+ peri-group = [00 01]; /* inst#, group# */
+ div-type = <DIV_24_5_BIT>;
+ channel = <0>;
+ clock-div = <1>;
+ status = "disabled";
+ };
+
+ peri0_group1_24_5bit_1: peri0_group1_24_5bit_1 {
+ #clock-cells = <0>;
+ compatible = "infineon,peri-div";
+ peri-group = [00 01]; /* inst#, group# */
+ div-type = <DIV_24_5_BIT>;
+ channel = <1>;
+ clock-div = <1>;
+ status = "disabled";
+ };
+
+ /* Peripheral clock deviders Group 8 (Use for SCB1) */
+ peri0_group8_16bit_0: peri0_group8_16bit_0 {
+ #clock-cells = <0>;
+ compatible = "infineon,peri-div";
+ peri-group = [00 08]; /* inst#, group# */
+ div-type = <DIV_16_BIT>;
+ channel = <0>;
+ clock-div = <1>;
+ status = "disabled";
+ };
+ };
+};
