| commit | 3751c396cd02703589d244c05e730f3b264a7da9 | [log] [tgz] |
|---|---|---|
| author | Daniel Leung <daniel.leung@intel.com> | Thu Feb 21 15:05:29 2019 -0800 |
| committer | Anas Nashif <anas.nashif@intel.com> | Wed Mar 25 19:07:28 2020 -0400 |
| tree | 5a5b8bd394d16c5ca0fdddc69280231994ea4aa9 | |
| parent | 6d49e7c6924d1326a142f50a70810ed840c6f296 [diff] |
soc: intel_s1000: use CAVS DSP wall clock timer for SMP The DSP wall clock timer is a timer driven directly by external oscillator and is external to the CPU core(s). It provides a common and synchronized counter for all CPU cores (which is useful for SMP), instead of indepedently running local core timer (xtensa_timer). Signed-off-by: Daniel Leung <daniel.leung@intel.com>