soc/intel_adsp: Add hardware race workaround to cavstool

On cAVS 1.8 (specifically) there seems to be a propagation delay on
the IPC registers.  Hitting the TDA register to signal DONE too soon
after clearing the interrupt via TDR can cause the interrupt to be
dropped.  Merely polling for it to read back correctly isn't
sufficient, we need an actual sleep here.

(The behavior that a message won't send while an existing message is
in progress is actually a hardware feature that is new with 1.8.  My
guess is it's a little glitchy in its first version.)

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
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