| commit | 3f9131ff5f88304ce87f06d2f73911a48e813b46 | [log] [tgz] |
|---|---|---|
| author | Hu Zhenyu <zhenyu.hu@intel.com> | Tue Aug 30 15:52:38 2022 +0800 |
| committer | Anas Nashif <anas.nashif@intel.com> | Fri Sep 09 16:32:07 2022 -0400 |
| tree | 6434427106585a5cff2d3288670793be1842f505 | |
| parent | dd1d367f34ccee84812bd3ef6a44edf0b67518df [diff] |
tests: Enable the counter_basic_api test on mec172x board 1. enable timer5 on dts 2. Replace all BTMR_Type with struct btmr_regs, to make it compatiable on both mec 15 and 17 3. As MEC15 and MEC17 have different ways to access the register, use "#if defined" to access counter_cfg->girq_id on different board. Signed-off-by: Hu Zhenyu <zhenyu.hu@intel.com>