| commit | 42fb9067e47312b46c9daf0ab34127a5a156a1ad | [log] [tgz] |
|---|---|---|
| author | Chen Xingyu <hi@xingrz.me> | Mon May 12 23:21:41 2025 +0800 |
| committer | Benjamin Cabé <kartben@gmail.com> | Tue May 27 19:04:22 2025 +0200 |
| tree | 395d7152fbb36f93925fc96c7c01ca827073cca3 | |
| parent | 7db4b5e647c30d0a44b551780df39e48b976082f [diff] |
drivers: timer: riscv_machine_timer: Use reg-names to access registers This commit updates the riscv_machine_timer driver to resolve MTIME and MTIMECMP register addresses by their `reg-names` instead of relying on index order. This improves clarity and robustness in DTS bindings, and is a prerequisite for handling cases where not both MTIME and MTIMECMP registers are present or accessible. Signed-off-by: Chen Xingyu <hi@xingrz.me>