| commit | 4495f43dca440de4e1aa810f7448625a351f61da | [log] [tgz] |
|---|---|---|
| author | Jay Vasanth <jay.vasanth@microchip.com> | Thu Dec 16 16:52:07 2021 -0500 |
| committer | Anas Nashif <anas.nashif@intel.com> | Thu Jan 20 13:42:16 2022 -0500 |
| tree | f09ec6e8032a8646b8ea31d31b8c077e1d4ca7ce | |
| parent | eec068b8a51cc618c171f89d381ddb61fddbf272 [diff] |
soc arm: MEC172x soc.h - Include custom IRQn_Type Fix for issue #41012 to allow compiler to treat IRQn_Type to be more than 8-bit. This will ensure NVIC numbers more than 127 (required for MEC172x device) will work correctly with irq_enable() API Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>