46efefbbe5f94209499712f7c20043349a30f24a - third_party/github/zephyrproject-rtos/zephyr

commit	46efefbbe5f94209499712f7c20043349a30f24a	[log] [tgz]
author	Cheryl Su <cheryl.su@ite.com.tw>	Wed Sep 09 16:45:45 2020 +0800
committer	Anas Nashif <anas.nashif@intel.com>	Wed Dec 16 08:47:36 2020 -0500
tree	c9ba2c3db356aae75b8c89bc58972734eb4fd4bd
parent	df6125f70d942ef21ad88d4d462a62c92b4d74cd [diff]

soc/riscv: it8xxx2 soc system

A new platform soc for it8xxx2.
Revising the test/kernel/context/src/main.c for it8xxx2 test case.

Signed-off-by: Cheryl Su <cheryl.su@ite.com.tw>

soc/riscv/riscv-ite/CMakeLists.txt[Added - diff]
soc/riscv/riscv-ite/Kconfig[Added - diff]
soc/riscv/riscv-ite/Kconfig.defconfig[Added - diff]
soc/riscv/riscv-ite/Kconfig.soc[Added - diff]
soc/riscv/riscv-ite/common/CMakeLists.txt[Added - diff]
soc/riscv/riscv-ite/common/chip_chipregs.h[Added - diff]
soc/riscv/riscv-ite/common/encoding.h[Added - diff]
soc/riscv/riscv-ite/common/soc_common.h[Added - diff]
soc/riscv/riscv-ite/common/soc_common_irq.c[Added - diff]
soc/riscv/riscv-ite/common/soc_irq.S[Added - diff]
soc/riscv/riscv-ite/common/vector.S[Added - diff]
soc/riscv/riscv-ite/it8xxx2/CMakeLists.txt[Added - diff]
soc/riscv/riscv-ite/it8xxx2/Kconfig.defconfig.series[Added - diff]
soc/riscv/riscv-ite/it8xxx2/Kconfig.series[Added - diff]
soc/riscv/riscv-ite/it8xxx2/Kconfig.soc[Added - diff]
soc/riscv/riscv-ite/it8xxx2/linker.ld[Added - diff]
soc/riscv/riscv-ite/it8xxx2/soc.c[Added - diff]
soc/riscv/riscv-ite/it8xxx2/soc.h[Added - diff]
tests/kernel/context/src/main.c[diff]

19 files changed