| commit | 482198bf79874ebea1730cd16f8e1b263e207d28 | [log] [tgz] |
|---|---|---|
| author | Alexandre Bourdiol <alexandre.bourdiol@st.com> | Wed Aug 18 17:12:33 2021 +0200 |
| committer | Kumar Gala <kumar.gala@gmail.com> | Thu Aug 19 08:51:10 2021 -0500 |
| tree | 9de0179c977794feeda4cad3bc0a47e8bc0439d4 | |
| parent | 682aea8b3b5485cb17537a94c373f7a69a05643b [diff] |
drivers: clock_control: stm32: enable PWR clock unconditionally Enable PWR clock unconditionally for L4, L5 and U5 like it is done on other stm32 series Fixes #37781 Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>