| commit | 4ae030c7b8bb8f05067dd7f3c590fba69fab7929 | [log] [tgz] |
|---|---|---|
| author | Jean-Paul Etienne <fractalclone@gmail.com> | Tue Mar 14 22:15:59 2017 +0100 |
| committer | Anas Nashif <nashif@linux.intel.com> | Sun Apr 02 15:15:07 2017 +0000 |
| tree | b0eaac459d94b17cdb79dc5594aba8e4cac06eaa | |
| parent | cd14317c414fd2c61e1be351f19d07170c3ebf65 [diff] |
riscv32: added support for the SiFive Freedom E310 SOC The SiFive Freedom E310 SOC follows the riscv privilege architecture specification and hence is declared within the riscv privilege SOC family. It also provides support for a riscv Platform Level Interrupt Controller (PLIC) Change-Id: I19ff0997eacc248f48444fc96566a105c6c02663 Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>