tests: drivers: uart async testing on the stm32f103 nucleo

Configure the overlay to have DMA transfer with high priority
when running the tests/drivers/uart/uart_async_api on nucleo_f103rb.

Signed-off-by: Francois Ramu <francois.ramu@st.com>

tests/drivers/uart/uart_async_api/boards/nucleo_f103rb.overlay

diff --git a/tests/drivers/uart/uart_async_api/boards/nucleo_f103rb.overlay b/tests/drivers/uart/uart_async_api/boards/nucleo_f103rb.overlay
index 034670e..aa2b0f7 100644
--- a/tests/drivers/uart/uart_async_api/boards/nucleo_f103rb.overlay
+++ b/tests/drivers/uart/uart_async_api/boards/nucleo_f103rb.overlay
@@ -1,8 +1,9 @@
 /* SPDX-License-Identifier: Apache-2.0 */
 
+/* Connect pin (PA10) D2 of the CN9:2 to D8 (PA9) of the CN5:1 */
 dut: &usart1 {
-	dmas = <&dma1 4 STM32_DMA_PERIPH_TX>,
-	       <&dma1 5 STM32_DMA_PERIPH_RX>;
+	dmas = <&dma1 4 (STM32_DMA_PERIPH_TX | STM32_DMA_PRIORITY_HIGH)>,
+	       <&dma1 5 (STM32_DMA_PERIPH_RX | STM32_DMA_PRIORITY_HIGH)>;
 	dma-names = "tx", "rx";
 };