commit | 4f868cd9fa556cff8e082adbc4673be672a292e1 | [log] [tgz] |
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author | Marcin Niestroj <m.niestroj@grinn-global.com> | Mon Oct 26 22:28:10 2020 +0100 |
committer | Carles Cufí <carles.cufi@nordicsemi.no> | Tue Dec 15 15:19:43 2020 +0100 |
tree | 5886ab125e0760f45c73fe94de611240dfa8f2c2 | |
parent | 6808d29baf53c1c6e376ff72047d8aeb421e2140 [diff] |
drivers: pwm: nrf_sw: drop broken runtime timer clock scaling There is some kind of runtime clock scaling implemented when period cycles exceed 16-bit value. This is broken, because configured PWM has far higher frequency in that case. Replace that mechanism with simply veryfying if requested PWM period does not exceed 16-bit value. Suggested-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no> Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>