aarch64: introduce explicit instructions to access MMIO
With classic volatile pointer access gcc something generates
access instructions with immediate offset value, like
str w4, [x1], #4
Such instructions produce invalid syndrome in HSR register when are
trapped by hypervisor. This leads to inability to emulate device access
in hypervisor.
So we need to make sure that any access to device memory is done
with plain str/ldr instructions without offset.
Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
1 file changed
