dts: gpio: create gpio dt-bingings and inlude in stm32 dtsi files
Create a dt-bindings/gpio.h file.
Bindings definitions are extracted from existing gpio.h.
gpio dt-bindings file is required because existing gpio.h file could
not be parsed by dts parser.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
diff --git a/dts/arm/st/stm32f0.dtsi b/dts/arm/st/stm32f0.dtsi
index a6d8108..a81691c 100644
--- a/dts/arm/st/stm32f0.dtsi
+++ b/dts/arm/st/stm32f0.dtsi
@@ -9,6 +9,7 @@
#include <st/mem.h>
#include <dt-bindings/clock/stm32_clock.h>
#include <dt-bindings/i2c/i2c.h>
+#include <dt-bindings/gpio/gpio.h>
/ {
cpus {
diff --git a/dts/arm/st/stm32f1.dtsi b/dts/arm/st/stm32f1.dtsi
index 6ba5f2a..d1b876f 100644
--- a/dts/arm/st/stm32f1.dtsi
+++ b/dts/arm/st/stm32f1.dtsi
@@ -9,6 +9,7 @@
#include <st/mem.h>
#include <dt-bindings/clock/stm32_clock.h>
#include <dt-bindings/i2c/i2c.h>
+#include <dt-bindings/gpio/gpio.h>
/ {
cpus {
diff --git a/dts/arm/st/stm32f3.dtsi b/dts/arm/st/stm32f3.dtsi
index 7540840..5dc8402 100644
--- a/dts/arm/st/stm32f3.dtsi
+++ b/dts/arm/st/stm32f3.dtsi
@@ -9,6 +9,7 @@
#include <st/mem.h>
#include <dt-bindings/clock/stm32_clock.h>
#include <dt-bindings/i2c/i2c.h>
+#include <dt-bindings/gpio/gpio.h>
/ {
cpus {
diff --git a/dts/arm/st/stm32f4.dtsi b/dts/arm/st/stm32f4.dtsi
index 12c263a..abe852f 100644
--- a/dts/arm/st/stm32f4.dtsi
+++ b/dts/arm/st/stm32f4.dtsi
@@ -9,6 +9,7 @@
#include <st/mem.h>
#include <dt-bindings/clock/stm32_clock.h>
#include <dt-bindings/i2c/i2c.h>
+#include <dt-bindings/gpio/gpio.h>
/ {
cpus {
diff --git a/dts/arm/st/stm32l4.dtsi b/dts/arm/st/stm32l4.dtsi
index 3c45278..4830a4b 100644
--- a/dts/arm/st/stm32l4.dtsi
+++ b/dts/arm/st/stm32l4.dtsi
@@ -10,6 +10,7 @@
#include <st/mem.h>
#include <dt-bindings/clock/stm32_clock.h>
#include <dt-bindings/i2c/i2c.h>
+#include <dt-bindings/gpio/gpio.h>
/ {
cpus {
diff --git a/include/dt-bindings/gpio/gpio.h b/include/dt-bindings/gpio/gpio.h
new file mode 100644
index 0000000..01719a4
--- /dev/null
+++ b/include/dt-bindings/gpio/gpio.h
@@ -0,0 +1,181 @@
+/*
+ * Copyright (c) 2018 Linaro Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef __DT_BINDINGS_GPIO_GPIO_H
+#define __DT_BINDINGS_GPIO_GPIO_H
+
+
+/**
+ * @name GPIO direction flags
+ * The `GPIO_DIR_*` flags are used with `gpio_pin_configure` or `gpio_port_configure`,
+ * to specify whether a GPIO pin will be used for input or output.
+ * @{
+ */
+/** GPIO pin to be input. */
+#define GPIO_DIR_IN (0 << 0)
+
+/** GPIO pin to be output. */
+#define GPIO_DIR_OUT (1 << 0)
+
+/** @cond INTERNAL_HIDDEN */
+#define GPIO_DIR_MASK 0x1
+/** @endcond */
+/** @} */
+
+
+/**
+ * @name GPIO interrupt flags
+ * The `GPIO_INT_*` flags are used with `gpio_pin_configure` or `gpio_port_configure`,
+ * to specify how input GPIO pins will trigger interrupts.
+ * @{
+ */
+/** GPIO pin to trigger interrupt. */
+#define GPIO_INT (1 << 1)
+
+/** GPIO pin trigger on level low or falling edge. */
+#define GPIO_INT_ACTIVE_LOW (0 << 2)
+
+/** GPIO pin trigger on level high or rising edge. */
+#define GPIO_INT_ACTIVE_HIGH (1 << 2)
+
+/** GPIO pin trigger to be synchronized to clock pulses. */
+#define GPIO_INT_CLOCK_SYNC (1 << 3)
+
+/** Enable GPIO pin debounce. */
+#define GPIO_INT_DEBOUNCE (1 << 4)
+
+/** Do Level trigger. */
+#define GPIO_INT_LEVEL (0 << 5)
+
+/** Do Edge trigger. */
+#define GPIO_INT_EDGE (1 << 5)
+
+/** Interrupt triggers on both rising and falling edge. */
+#define GPIO_INT_DOUBLE_EDGE (1 << 6)
+/** @} */
+
+
+/**
+ * @name GPIO polarity flags
+ * The `GPIO_POL_*` flags are used with `gpio_pin_configure` or `gpio_port_configure`,
+ * to specify the polarity of a GPIO pin.
+ * @{
+ */
+/** @cond INTERNAL_HIDDEN */
+#define GPIO_POL_POS 7
+/** @endcond */
+
+/** GPIO pin polarity is normal. */
+#define GPIO_POL_NORMAL (0 << GPIO_POL_POS)
+
+/** GPIO pin polarity is inverted. */
+#define GPIO_POL_INV (1 << GPIO_POL_POS)
+
+/** @cond INTERNAL_HIDDEN */
+#define GPIO_POL_MASK (1 << GPIO_POL_POS)
+/** @endcond */
+/** @} */
+
+
+/**
+ * @name GPIO pull flags
+ * The `GPIO_PUD_*` flags are used with `gpio_pin_configure` or `gpio_port_configure`,
+ * to specify the pull-up or pull-down electrical configuration of a GPIO pin.
+ * @{
+ */
+/** @cond INTERNAL_HIDDEN */
+#define GPIO_PUD_POS 8
+/** @endcond */
+
+/** Pin is neither pull-up nor pull-down. */
+#define GPIO_PUD_NORMAL (0 << GPIO_PUD_POS)
+
+/** Enable GPIO pin pull-up. */
+#define GPIO_PUD_PULL_UP (1 << GPIO_PUD_POS)
+
+/** Enable GPIO pin pull-down. */
+#define GPIO_PUD_PULL_DOWN (2 << GPIO_PUD_POS)
+
+/** @cond INTERNAL_HIDDEN */
+#define GPIO_PUD_MASK (3 << GPIO_PUD_POS)
+/** @endcond */
+/** @} */
+
+
+/**
+ * @name GPIO drive strength flags
+ * The `GPIO_DS_*` flags are used with `gpio_pin_configure` or `gpio_port_configure`,
+ * to specify the drive strength configuration of a GPIO pin.
+ *
+ * The drive strength of individual pins can be configured
+ * independently for when the pin output is low and high.
+ *
+ * The `GPIO_DS_*_LOW` enumerations define the drive strength of a pin
+ * when output is low.
+
+ * The `GPIO_DS_*_HIGH` enumerations define the drive strength of a pin
+ * when output is high.
+ *
+ * The `DISCONNECT` drive strength indicates that the pin is placed in a
+ * high impedance state and not driven, this option is used to
+ * configure hardware that supports a open collector drive mode.
+ *
+ * The interface supports two different drive strengths:
+ * `DFLT` - The lowest drive strength supported by the HW
+ * `ALT` - The highest drive strength supported by the HW
+ *
+ * On hardware that supports only one standard drive strength, both
+ * `DFLT` and `ALT` have the same behavior.
+ *
+ * On hardware that does not support a disconnect mode, `DISCONNECT`
+ * will behave the same as `DFLT`.
+ * @{
+ */
+/** @cond INTERNAL_HIDDEN */
+#define GPIO_DS_LOW_POS 12
+#define GPIO_DS_LOW_MASK (0x3 << GPIO_DS_LOW_POS)
+/** @endcond */
+
+/** Default drive strength standard when GPIO pin output is low.
+ */
+#define GPIO_DS_DFLT_LOW (0x0 << GPIO_DS_LOW_POS)
+
+/** Alternative drive strength when GPIO pin output is low.
+ * For hardware that does not support configurable drive strength
+ * use the default drive strength.
+ */
+#define GPIO_DS_ALT_LOW (0x1 << GPIO_DS_LOW_POS)
+
+/** Disconnect pin when GPIO pin output is low.
+ * For hardware that does not support disconnect use the default
+ * drive strength.
+ */
+#define GPIO_DS_DISCONNECT_LOW (0x3 << GPIO_DS_LOW_POS)
+
+/** @cond INTERNAL_HIDDEN */
+#define GPIO_DS_HIGH_POS 14
+#define GPIO_DS_HIGH_MASK (0x3 << GPIO_DS_HIGH_POS)
+/** @endcond */
+
+/** Default drive strength when GPIO pin output is high.
+ */
+#define GPIO_DS_DFLT_HIGH (0x0 << GPIO_DS_HIGH_POS)
+
+/** Alternative drive strength when GPIO pin output is high.
+ * For hardware that does not support configurable drive strengths
+ * use the default drive strength.
+ */
+#define GPIO_DS_ALT_HIGH (0x1 << GPIO_DS_HIGH_POS)
+
+/** Disconnect pin when GPIO pin output is high.
+ * For hardware that does not support disconnect use the default
+ * drive strength.
+ */
+#define GPIO_DS_DISCONNECT_HIGH (0x3 << GPIO_DS_HIGH_POS)
+/** @} */
+
+
+
+#endif /* __DT_BINDINGS_GPIO_GPIO_H */
diff --git a/include/gpio.h b/include/gpio.h
index e2458e7..0d8b566 100644
--- a/include/gpio.h
+++ b/include/gpio.h
@@ -19,6 +19,7 @@
#include <zephyr/types.h>
#include <stddef.h>
#include <device.h>
+#include <dt-bindings/gpio/gpio.h>
#ifdef __cplusplus
extern "C" {
@@ -35,99 +36,6 @@
#define GPIO_ACCESS_BY_PIN 0
#define GPIO_ACCESS_BY_PORT 1
/** @endcond */
-
-/**
- * @name GPIO direction flags
- * The `GPIO_DIR_*` flags are used with `gpio_pin_configure` or `gpio_port_configure`,
- * to specify whether a GPIO pin will be used for input or output.
- * @{
- */
-/** GPIO pin to be input. */
-#define GPIO_DIR_IN (0 << 0)
-
-/** GPIO pin to be output. */
-#define GPIO_DIR_OUT (1 << 0)
-
-/** @cond INTERNAL_HIDDEN */
-#define GPIO_DIR_MASK 0x1
-/** @endcond */
-/** @} */
-
-/**
- * @name GPIO interrupt flags
- * The `GPIO_INT_*` flags are used with `gpio_pin_configure` or `gpio_port_configure`,
- * to specify how input GPIO pins will trigger interrupts.
- * @{
- */
-/** GPIO pin to trigger interrupt. */
-#define GPIO_INT (1 << 1)
-
-/** GPIO pin trigger on level low or falling edge. */
-#define GPIO_INT_ACTIVE_LOW (0 << 2)
-
-/** GPIO pin trigger on level high or rising edge. */
-#define GPIO_INT_ACTIVE_HIGH (1 << 2)
-
-/** GPIO pin trigger to be synchronized to clock pulses. */
-#define GPIO_INT_CLOCK_SYNC (1 << 3)
-
-/** Enable GPIO pin debounce. */
-#define GPIO_INT_DEBOUNCE (1 << 4)
-
-/** Do Level trigger. */
-#define GPIO_INT_LEVEL (0 << 5)
-
-/** Do Edge trigger. */
-#define GPIO_INT_EDGE (1 << 5)
-
-/** Interrupt triggers on both rising and falling edge. */
-#define GPIO_INT_DOUBLE_EDGE (1 << 6)
-/** @} */
-
-/**
- * @name GPIO polarity flags
- * The `GPIO_POL_*` flags are used with `gpio_pin_configure` or `gpio_port_configure`,
- * to specify the polarity of a GPIO pin.
- * @{
- */
-/** @cond INTERNAL_HIDDEN */
-#define GPIO_POL_POS 7
-/** @endcond */
-
-/** GPIO pin polarity is normal. */
-#define GPIO_POL_NORMAL (0 << GPIO_POL_POS)
-
-/** GPIO pin polarity is inverted. */
-#define GPIO_POL_INV (1 << GPIO_POL_POS)
-
-/** @cond INTERNAL_HIDDEN */
-#define GPIO_POL_MASK (1 << GPIO_POL_POS)
-/** @endcond */
-/** @} */
-
-
-/**
- * @name GPIO pull flags
- * The `GPIO_PUD_*` flags are used with `gpio_pin_configure` or `gpio_port_configure`,
- * to specify the pull-up or pull-down electrical configuration of a GPIO pin.
- * @{
- */
-/** @cond INTERNAL_HIDDEN */
-#define GPIO_PUD_POS 8
-/** @endcond */
-
-/** Pin is neither pull-up nor pull-down. */
-#define GPIO_PUD_NORMAL (0 << GPIO_PUD_POS)
-
-/** Enable GPIO pin pull-up. */
-#define GPIO_PUD_PULL_UP (1 << GPIO_PUD_POS)
-
-/** Enable GPIO pin pull-down. */
-#define GPIO_PUD_PULL_DOWN (2 << GPIO_PUD_POS)
-
-/** @cond INTERNAL_HIDDEN */
-#define GPIO_PUD_MASK (3 << GPIO_PUD_POS)
-/** @endcond */
/** @} */
/**
@@ -142,77 +50,6 @@
*/
#define GPIO_PIN_DISABLE (0 __DEPRECATED_MACRO)
-/**
- * @name GPIO drive strength flags
- * The `GPIO_DS_*` flags are used with `gpio_pin_configure` or `gpio_port_configure`,
- * to specify the drive strength configuration of a GPIO pin.
- *
- * The drive strength of individual pins can be configured
- * independently for when the pin output is low and high.
- *
- * The `GPIO_DS_*_LOW` enumerations define the drive strength of a pin
- * when output is low.
-
- * The `GPIO_DS_*_HIGH` enumerations define the drive strength of a pin
- * when output is high.
- *
- * The `DISCONNECT` drive strength indicates that the pin is placed in a
- * high impedance state and not driven, this option is used to
- * configure hardware that supports a open collector drive mode.
- *
- * The interface supports two different drive strengths:
- * `DFLT` - The lowest drive strength supported by the HW
- * `ALT` - The highest drive strength supported by the HW
- *
- * On hardware that supports only one standard drive strength, both
- * `DFLT` and `ALT` have the same behavior.
- *
- * On hardware that does not support a disconnect mode, `DISCONNECT`
- * will behave the same as `DFLT`.
- * @{
- */
-/** @cond INTERNAL_HIDDEN */
-#define GPIO_DS_LOW_POS 12
-#define GPIO_DS_LOW_MASK (0x3 << GPIO_DS_LOW_POS)
-/** @endcond */
-
-/** Default drive strength standard when GPIO pin output is low.
- */
-#define GPIO_DS_DFLT_LOW (0x0 << GPIO_DS_LOW_POS)
-
-/** Alternative drive strength when GPIO pin output is low.
- * For hardware that does not support configurable drive strength
- * use the default drive strength.
- */
-#define GPIO_DS_ALT_LOW (0x1 << GPIO_DS_LOW_POS)
-
-/** Disconnect pin when GPIO pin output is low.
- * For hardware that does not support disconnect use the default
- * drive strength.
- */
-#define GPIO_DS_DISCONNECT_LOW (0x3 << GPIO_DS_LOW_POS)
-
-/** @cond INTERNAL_HIDDEN */
-#define GPIO_DS_HIGH_POS 14
-#define GPIO_DS_HIGH_MASK (0x3 << GPIO_DS_HIGH_POS)
-/** @endcond */
-
-/** Default drive strength when GPIO pin output is high.
- */
-#define GPIO_DS_DFLT_HIGH (0x0 << GPIO_DS_HIGH_POS)
-
-/** Alternative drive strength when GPIO pin output is high.
- * For hardware that does not support configurable drive strengths
- * use the default drive strength.
- */
-#define GPIO_DS_ALT_HIGH (0x1 << GPIO_DS_HIGH_POS)
-
-/** Disconnect pin when GPIO pin output is high.
- * For hardware that does not support disconnect use the default
- * drive strength.
- */
-#define GPIO_DS_DISCONNECT_HIGH (0x3 << GPIO_DS_HIGH_POS)
-/** @} */
struct gpio_callback;
