| commit | 50a08d9e8b1bc17867d74056ce5b3d50a1d3dfe6 | [log] [tgz] |
|---|---|---|
| author | Zide Chen <zide.chen@intel.com> | Thu Jul 19 12:40:22 2018 -0700 |
| committer | Anas Nashif <anas.nashif@intel.com> | Tue Jul 24 09:19:33 2018 -0400 |
| tree | 6339206874a732de011b8bf0f9b448fbe499c0f6 | |
| parent | 07e913a1e5865d49a3c07512414a17865dd86384 [diff] |
loapic timer: LVTT should be programmed before ICR Intel SDM Vol3 10.5.4.1 states that "A write to LVT Timer Register that changes the timer mode disarms the local APIC timer". This implies that LVT Timer register needs to be programmed before Initial Count register, otherwise the LOAPIC timer could not be armed. Signed-off-by: Zide Chen <zide.chen@intel.com>