soc/intel_adsp: Remove dead bootloader framework
Now that the IMR boot code is built as part of the main Zephyr
executable, remove the old stuff and its directory. The C file
becomes "boot.c" in the common directory and the two
bootloader-specific headers move into common/include.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
diff --git a/soc/xtensa/intel_adsp/common/CMakeLists.txt b/soc/xtensa/intel_adsp/common/CMakeLists.txt
index a9a6697..7b7af4b 100644
--- a/soc/xtensa/intel_adsp/common/CMakeLists.txt
+++ b/soc/xtensa/intel_adsp/common/CMakeLists.txt
@@ -16,7 +16,7 @@
zephyr_library_sources(soc_mp.c)
zephyr_library_sources(trace_out.c)
zephyr_library_sources(rimage_modules.c)
-zephyr_library_sources(bootloader/boot_loader.c)
+zephyr_library_sources(boot.c)
zephyr_library_link_libraries(INTEL_ADSP_COMMON)
diff --git a/soc/xtensa/intel_adsp/common/bootloader/boot_loader.c b/soc/xtensa/intel_adsp/common/boot.c
similarity index 95%
rename from soc/xtensa/intel_adsp/common/bootloader/boot_loader.c
rename to soc/xtensa/intel_adsp/common/boot.c
index ea41902..9510f57 100644
--- a/soc/xtensa/intel_adsp/common/bootloader/boot_loader.c
+++ b/soc/xtensa/intel_adsp/common/boot.c
@@ -1,17 +1,7 @@
-/*
- * Copyright(c) 2016 Intel Corporation. All rights reserved.
- *
+/* Copyright(c) 2021 Intel Corporation. All rights reserved.
* SPDX-License-Identifier: Apache-2.0
- *
- * Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
*/
-/* Older (GCC 4.2-based) XCC variants need a fixup file. */
-#if defined(__XCC__) && (__GNUC__ == 4)
-#include <toolchain/xcc_missing_defs.h>
-#endif
-
-#include <autoconf.h> /* not built by zephyr */
#include <devicetree.h>
#include <stddef.h>
#include <stdint.h>
diff --git a/soc/xtensa/intel_adsp/common/bootloader.cmake b/soc/xtensa/intel_adsp/common/bootloader.cmake
deleted file mode 100644
index c830902..0000000
--- a/soc/xtensa/intel_adsp/common/bootloader.cmake
+++ /dev/null
@@ -1,25 +0,0 @@
-# Copyright (c) 2019 Intel Corporation
-#
-# SPDX-License-Identifier: Apache-2.0
-
-set(SOC_FAMILY intel_adsp)
-add_subdirectory(bootloader)
-set(ELF_FIX ${SOC_DIR}/${ARCH}/${SOC_FAMILY}/common/fix_elf_addrs.py)
-
-add_custom_target(
- process_elf ALL
- DEPENDS base_module
- DEPENDS ${ZEPHYR_FINAL_EXECUTABLE}
- COMMAND ${CMAKE_OBJCOPY} -O binary $<TARGET_OBJECTS:base_module> mod-apl.bin
- COMMAND ${CMAKE_OBJCOPY} --add-section .module=mod-apl.bin --set-section-flags .module=load,readonly ${CMAKE_BINARY_DIR}/zephyr/${KERNEL_ELF_NAME} ${CMAKE_BINARY_DIR}/zephyr/${KERNEL_ELF_NAME}.mod
-
- # Adjust final section addresses so they all appear in the cached region.
- COMMAND ${ELF_FIX} ${CMAKE_OBJCOPY} ${CMAKE_BINARY_DIR}/zephyr/${KERNEL_ELF_NAME}.mod
- )
-
-add_custom_target(
- process_bootloader ALL
- DEPENDS bootloader boot_module
- COMMAND ${CMAKE_OBJCOPY} -O binary $<TARGET_OBJECTS:boot_module> mod-boot.bin
- COMMAND ${CMAKE_OBJCOPY} --add-section .module=mod-boot.bin --set-section-flags .module=load,readonly $<TARGET_FILE:bootloader> ${CMAKE_BINARY_DIR}/zephyr/bootloader.elf.mod
- )
diff --git a/soc/xtensa/intel_adsp/common/bootloader/CMakeLists.txt b/soc/xtensa/intel_adsp/common/bootloader/CMakeLists.txt
deleted file mode 100644
index 5aa3d26..0000000
--- a/soc/xtensa/intel_adsp/common/bootloader/CMakeLists.txt
+++ /dev/null
@@ -1,82 +0,0 @@
-# Copyright (c) 2019 Intel Corporation
-#
-# SPDX-License-Identifier: Apache-2.0
-#
-add_library(base_module OBJECT base_module.c)
-target_include_directories(base_module PUBLIC
- ${SOC_DIR}/${ARCH}/${SOC_PATH}/
- ${SOC_DIR}/${ARCH}/${SOC_PATH}/include
- ${SOC_DIR}/${ARCH}/${SOC_FAMILY}/common/include
- ${PROJECT_BINARY_DIR}/include/generated
- ${ZEPHYR_BASE}/include
- ../include
- )
-
-add_library(boot_module OBJECT boot_module.c)
-target_include_directories(boot_module PUBLIC
- ${SOC_DIR}/${ARCH}/${SOC_PATH}/
- ${SOC_DIR}/${ARCH}/${SOC_PATH}/include
- ${SOC_DIR}/${ARCH}/${SOC_FAMILY}/common/include
- ${PROJECT_BINARY_DIR}/include/generated
- ${ZEPHYR_BASE}/include
- ../include
- )
-
-add_executable(bootloader
- boot_loader.c
- )
-
-add_dependencies(bootloader ${SYSCALL_LIST_H_TARGET})
-
-target_include_directories(bootloader PUBLIC
- ./
- ${SOC_DIR}/${ARCH}/${SOC_PATH}/
- ${SOC_DIR}/${ARCH}/${SOC_PATH}/include
- ${SOC_DIR}/${ARCH}/${SOC_FAMILY}/common/include
- ${PROJECT_BINARY_DIR}/include/generated
- ${ZEPHYR_BASE}/include
- )
-
-# TODO: pre-process linker script. How do we use toplevel infrastructure ??
-set(bootloader_linker_script "boot_ldr")
-add_custom_command(TARGET bootloader
- PRE_LINK
- DEPENDS ${bootloader_linker_script}.x
- COMMENT "Generating Bootloader!!!!!!!"
- COMMAND ${CMAKE_C_COMPILER}
- -x assembler-with-cpp
- ${NOSYSDEF_CFLAG}
- -MD
- -D_LINKER
- -D_ASMLANGUAGE
- -I ${SOC_DIR}/${ARCH}/${SOC_PATH}/
- -I ${SOC_DIR}/${ARCH}/${SOC_PATH}/include
- -I ${SOC_DIR}/${ARCH}/${SOC_FAMILY}/common/include
- -I ${PROJECT_BINARY_DIR}/include/generated
- -I ${ZEPHYR_BASE}/include
- ${current_defines}
- ${linker_pass_define}
- -E ${SOC_DIR}/${ARCH}/${SOC_FAMILY}/common/bootloader/${bootloader_linker_script}.x
- -P # Prevent generation of debug `#line' directives.
- -o ${bootloader_linker_script}.ld
- VERBATIM
- WORKING_DIRECTORY ${PROJECT_BINARY_DIR}
- )
-
-set_source_files_properties(boot_entry.S PROPERTIES COMPILE_FLAGS "-DASSEMBLY -D_ASMLANGUAGE")
-
-target_compile_options(bootloader PUBLIC
- -fno-inline-functions
- -mlongcalls
- -mtext-section-literals
- -imacros${CMAKE_BINARY_DIR}/zephyr/include/generated/autoconf.h
- -D__SIZEOF_LONG__=4
-)
-
-target_link_libraries(bootloader PUBLIC -Wl,--no-check-sections -ucall_user_start -Wl,-static -nostdlib)
-target_link_libraries(bootloader PRIVATE -T${CMAKE_BINARY_DIR}/zephyr/${bootloader_linker_script}.ld)
-
-if(CONFIG_XTENSA_HAL)
- target_link_libraries(bootloader PRIVATE XTENSA_HAL)
- target_link_libraries(bootloader PRIVATE modules_xtensa_hal)
-endif()
diff --git a/soc/xtensa/intel_adsp/common/bootloader/base_module.c b/soc/xtensa/intel_adsp/common/bootloader/base_module.c
deleted file mode 100644
index 994879a..0000000
--- a/soc/xtensa/intel_adsp/common/bootloader/base_module.c
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * Copyright(c) 2018 Intel Corporation. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
- */
-
-/* Older (GCC 4.2-based) XCC variants need a fixup file. */
-#if defined(__XCC__) && (__GNUC__ == 4)
-#include <toolchain/xcc_missing_defs.h>
-#endif
-
-#include <autoconf.h> /* Not built as a zephyr file, must include manually */
-#include "manifest.h"
-#include <cavs-mem.h>
-
-/*
- * Each module has an entry in the FW manifest header. This is NOT part of
- * the SOF executable image but is inserted by object copy as a ELF section
- * for parsing by rimage (to genrate the manifest).
- */
-struct sof_man_module_manifest apl_manifest = {
- .module = {
- .name = "BASEFW",
- .uuid = {0x2e, 0x9e, 0x86, 0xfc, 0xf8, 0x45, 0x45, 0x40,
- 0xa4, 0x16, 0x89, 0x88, 0x0a, 0xe3, 0x20, 0xa9},
- .entry_point = RAM_BASE,
- .type = {
- .load_type = SOF_MAN_MOD_TYPE_MODULE,
- .domain_ll = 1,
- },
- .affinity_mask = 3,
- },
-};
-
-/* not used, but stops linker complaining */
-int _start;
diff --git a/soc/xtensa/intel_adsp/common/bootloader/boot_ldr.x b/soc/xtensa/intel_adsp/common/bootloader/boot_ldr.x
deleted file mode 100644
index d0c5d7e..0000000
--- a/soc/xtensa/intel_adsp/common/bootloader/boot_ldr.x
+++ /dev/null
@@ -1,83 +0,0 @@
-OUTPUT_ARCH(xtensa)
-ENTRY(rom_entry)
-
-#include <autoconf.h> /* Not a "zephyr" file, need this explicitly */
-#include <cavs-mem.h>
-
-/* Offset of the entry point from the manifest start in IMR. Magic
- * number must be synchronized with the module and rimage configuration!
- */
-#define ENTRY_POINT_OFF 0x6000
-
-/* These are legacy; needed by xtensa arch bootstrap code, but not by the
- * bootloader per se which isn't responsible for handling exception
- * setup or region protection option configuration.
- */
-PROVIDE(_memmap_vecbase_reset = 0xbe010000);
-PROVIDE(_memmap_cacheattr_reset = 0xff42fff2);
-
-MEMORY {
- imr :
- org = CONFIG_IMR_MANIFEST_ADDR + ENTRY_POINT_OFF,
- len = 0x100000
-}
-
-PHDRS {
- imr_phdr PT_LOAD;
-}
-
-SECTIONS {
- .text : {
- /* Entry point MUST be here per external configuration */
- KEEP (*(.boot_entry.text))
- *(.imr .imr.*)
- } >imr :imr_phdr
-
- /* The data sections come last. This is because rimage seems to
- * want this page-aligned or it will throw an error, not sure why
- * since all the ROM cares about is a contiguous region. And it's
- * particularly infuriating as it precludes linker .rodata next to
- * .text.
- */
- .rodata : ALIGN(4096) {
- *(.imrdata .imrdata.*)
- } >imr :imr_phdr
-
- .comment 0 : { *(.comment) }
- .debug 0 : { *(.debug) }
- .debug_ranges 0 : { *(.debug_ranges) }
- .line 0 : { *(.line) }
- .debug_srcinfo 0 : { *(.debug_srcinfo) }
- .debug_sfnames 0 : { *(.debug_sfnames) }
- .debug_aranges 0 : { *(.debug_aranges) }
- .debug_pubnames 0 : { *(.debug_pubnames) }
- .debug_info 0 : { *(.debug_info) }
- .debug_abbrev 0 : { *(.debug_abbrev) }
- .debug_line 0 : { *(.debug_line) }
- .debug_frame 0 : { *(.debug_frame) }
- .debug_str 0 : { *(.debug_str) }
- .debug_loc 0 : { *(.debug_loc) }
- .debug_macinfo 0 : { *(.debug_macinfo) }
- .debug_weaknames 0 : { *(.debug_weaknames) }
- .debug_funcnames 0 : { *(.debug_funcnames) }
- .debug_typenames 0 : { *(.debug_typenames) }
- .debug_varnames 0 : { *(.debug_varnames) }
- .xtensa.info 0 : { *(.xtensa.info) }
- .xt.insn 0 : {
- KEEP (*(.xt.insn))
- KEEP (*(.gnu.linkonce.x.*))
- }
- .xt.prop 0 : {
- KEEP (*(.xt.prop))
- KEEP (*(.xt.prop.*))
- KEEP (*(.gnu.linkonce.prop.*))
- }
- .xt.lit 0 : {
- KEEP (*(.xt.lit))
- KEEP (*(.xt.lit.*))
- KEEP (*(.gnu.linkonce.p.*))
- }
- .debug.xt.callgraph 0 : {
- KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
- }
-}
diff --git a/soc/xtensa/intel_adsp/common/bootloader/boot_module.c b/soc/xtensa/intel_adsp/common/bootloader/boot_module.c
deleted file mode 100644
index 2fe425d..0000000
--- a/soc/xtensa/intel_adsp/common/bootloader/boot_module.c
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * Copyright(c) 2018 Intel Corporation. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Author: Marcin Maka <marcin.maka@linux.intel.com>
- */
-
-/* Older (GCC 4.2-based) XCC variants need a fixup file. */
-#if defined(__XCC__) && (__GNUC__ == 4)
-#include <toolchain/xcc_missing_defs.h>
-#endif
-
-#include <autoconf.h> /* not built by zephyr */
-#include "manifest.h"
-#include <cavs-mem.h>
-
-/*
- * Each module has an entry in the FW manifest header. This is NOT part of
- * the SOF executable image but is inserted by object copy as a ELF section
- * for parsing by rimage (to generate the manifest).
- */
-struct sof_man_module_manifest apl_bootldr_manifest = {
- .module = {
- .name = "BRNGUP",
- .uuid = {
- 0xcc, 0x48, 0x7b, 0x0d, 0xa9, 0x1e, 0x0a, 0x47,
- 0xa8, 0xc1, 0x53, 0x34, 0x24, 0x52, 0x8a, 0x17
- },
- .entry_point = IMR_BOOT_LDR_TEXT_ENTRY_BASE,
- .type = {
- .load_type = SOF_MAN_MOD_TYPE_MODULE,
- .domain_ll = 1,
- },
- .affinity_mask = 3,
- },
-};
-
-/* not used, but stops linker complaining */
-int _start;
diff --git a/soc/xtensa/intel_adsp/common/bootloader/manifest.h b/soc/xtensa/intel_adsp/common/include/manifest.h
similarity index 100%
rename from soc/xtensa/intel_adsp/common/bootloader/manifest.h
rename to soc/xtensa/intel_adsp/common/include/manifest.h
diff --git a/soc/xtensa/intel_adsp/common/bootloader/platform.h b/soc/xtensa/intel_adsp/common/include/platform.h
similarity index 100%
rename from soc/xtensa/intel_adsp/common/bootloader/platform.h
rename to soc/xtensa/intel_adsp/common/include/platform.h
diff --git a/soc/xtensa/intel_adsp/common/rimage_modules.c b/soc/xtensa/intel_adsp/common/rimage_modules.c
index 39188a6..be9f3c9 100644
--- a/soc/xtensa/intel_adsp/common/rimage_modules.c
+++ b/soc/xtensa/intel_adsp/common/rimage_modules.c
@@ -1,4 +1,4 @@
-#include "bootloader/manifest.h"
+#include <manifest.h>
#include <cavs-mem.h>
/* These data structures define "module manifest" headers. They
