commit | 54283efcced9906eca84cd953e9f98c9c0232021 | [log] [tgz] |
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author | Daniel Leung <daniel.leung@intel.com> | Tue Apr 27 10:27:47 2021 -0700 |
committer | Anas Nashif <anas.nashif@intel.com> | Thu Apr 29 21:17:24 2021 -0400 |
tree | c25cef3f95bdc3f4148b3701a4d976cb23ac6f9a | |
parent | 0ab8dc4d494e25056820892a76ed442e03d8f3f5 [diff] |
x86: mmu: allow page table extra mappings to have cache disabled This adds the bits to the gen_mmu.py script so that extra mappings can be added with caching disabled. This is useful for mapping MMIO regions where caching is not desired. Signed-off-by: Daniel Leung <daniel.leung@intel.com>