| commit | 5854670b9862624bf082766f202aebaecac497d3 | [log] [tgz] |
|---|---|---|
| author | Siyuan Cheng <siyuanc@synopsys.com> | Mon Oct 17 16:08:29 2022 +0800 |
| committer | Carles Cufí <carles.cufi@nordicsemi.no> | Mon Dec 19 11:56:55 2022 +0100 |
| tree | 96e9ac2d652346dbdd7fa80b61f95c1c4ca005a8 | |
| parent | a147a26a2b09790364cc3d2490c88ccc74e4538a [diff] |
DSP: add dsp unit test add dsp context switch test add complex multiplication test for ARC processor Signed-off-by: Siyuan Cheng <siyuanc@synopsys.com>