arch: arc: refactor the soc part of em_starterkit
The original em7d, em9d and em11d are different configurations of
em_starterkit. They have the same peripherals, e.g. uart, spi, gpio
, ddr. The differences of them are in arc core configurations, interrupt
number assignment.
So em7d, em9d and em11d can be viewed in the same SoC family or SoC
series.
Referring other arch's implementation, this commit merges em7d, em9d
and em11d into the same SoC, named snps_emsk. This will eliminate
unnecessary duplication and make it easier for future maintainment.
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
diff --git a/arch/arc/soc/em11d/CMakeLists.txt b/arch/arc/soc/em11d/CMakeLists.txt
deleted file mode 100644
index 5216d58..0000000
--- a/arch/arc/soc/em11d/CMakeLists.txt
+++ /dev/null
@@ -1,14 +0,0 @@
-zephyr_library_include_directories(${PROJECT_SOURCE_DIR}/drivers)
-
-zephyr_cc_option(-mcpu=em4_fpuda -mno-sdata -mdiv-rem -mswap -mnorm)
-zephyr_cc_option(-mmpy-option=6 -mbarrel-shifter)
-zephyr_cc_option(--param l1-cache-size=16384)
-zephyr_cc_option(--param l1-cache-line-size=32)
-zephyr_cc_option_ifdef(CONFIG_CODE_DENSITY -mcode-density)
-zephyr_cc_option_ifdef(CONFIG_FLOAT -mfpu=fpuda_all)
-
-
-zephyr_sources(
- soc.c
- soc_config.c
- )
diff --git a/arch/arc/soc/em11d/Kconfig.soc b/arch/arc/soc/em11d/Kconfig.soc
deleted file mode 100644
index dd931a5..0000000
--- a/arch/arc/soc/em11d/Kconfig.soc
+++ /dev/null
@@ -1,5 +0,0 @@
-
-config SOC_EM11D
- bool "Synopsys ARC EM11D"
- select CPU_HAS_FPU
-
diff --git a/arch/arc/soc/em11d/soc.h b/arch/arc/soc/em11d/soc.h
deleted file mode 100644
index 0052b64..0000000
--- a/arch/arc/soc/em11d/soc.h
+++ /dev/null
@@ -1,138 +0,0 @@
-/*
- * Copyright (c) 2016-2017 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-/**
- * @brief Board configuration macros for EM Starter kit board
- *
- * This header file is used to specify and describe board-level
- * aspects for the target.
- */
-
-#ifndef _SOC__H_
-#define _SOC__H_
-
-#include <misc/util.h>
-
-/* default system clock */
-/* On the EM Starter Kit board, the peripheral bus clock frequency is 50Mhz */
-#define SYSCLK_DEFAULT_IOSC_HZ MHZ(50)
-
-
-/* ARC EM Core IRQs */
-#define IRQ_TIMER0 16
-#define IRQ_TIMER1 17
-
-#define IRQ_CORE_DMA_COMPLETE 20
-#define IRQ_CORE_DMA_ERROR 21
-
-#ifndef _ASMLANGUAGE
-
-#include <misc/util.h>
-#include <random/rand32.h>
-
-#define ARCV2_TIMER0_INT_LVL IRQ_TIMER0
-#define ARCV2_TIMER0_INT_PRI 0
-
-#define ARCV2_TIMER1_INT_LVL IRQ_TIMER1
-#define ARCV2_TIMER1_INT_PRI 1
-
-#define CONFIG_ARCV2_TIMER1_INT_LVL IRQ_TIMER1
-#define CONFIG_ARCV2_TIMER1_INT_PRI 1
-
-#define INT_ENABLE_ARC ~(0x00000001 << 8)
-#define INT_ENABLE_ARC_BIT_POS (8)
-
-/* I2C */
-/* I2C_0 is on Pmod2 connector */
-#define CONFIG_I2C_0_BASE_ADDR 0xF0004000
-#define CONFIG_I2C_0_IRQ_FLAGS 0
-
-/* I2C_1 is on Pmod4 connector */
-#define CONFIG_I2C_1_BASE_ADDR 0xF0005000
-#define CONFIG_I2C_1_IRQ_FLAGS 0
-
-
-/* GPIO */
-#define GPIO_DW_0_BASE_ADDR 0xF0002000 /* GPIO 0 : PORTA */
-#define GPIO_DW_0_BITS 32
-#define GPIO_DW_PORT_0_INT_MASK 0 /* n/a */
-#define GPIO_DW_0_IRQ_FLAGS 0 /* Defaults */
-
-#define GPIO_DW_1_BASE_ADDR 0xF000200C /* GPIO 1 : PORTB */
-#define GPIO_DW_1_BITS 9 /* 9 LEDs on board */
-#define GPIO_DW_PORT_1_INT_MASK 0 /* n/a */
-
-#define GPIO_DW_2_BASE_ADDR 0xF0002018 /* GPIO 2 : PORTC */
-#define GPIO_DW_2_BITS 32
-#define GPIO_DW_PORT_2_INT_MASK 0 /* n/a */
-
-#define GPIO_DW_3_BASE_ADDR 0xF0002024 /* GPIO 3 : PORTD */
-#define GPIO_DW_3_BITS 12
-#define GPIO_DW_PORT_3_INT_MASK 0 /* n/a */
-
-/* SPI */
-#define SPI_DW_SPI_CLOCK SYSCLK_DEFAULT_IOSC_HZ
-
-#define SPI_DW_PORT_0_REGS 0xF0006000
-#define SPI_DW_PORT_1_REGS 0xF0007000
-
-#define SPI_DW_IRQ_FLAGS 0
-
-/*
- * SPI Chip Select Assignments on EM Starter Kit
- *
- * CS0 Pmod6 - pin 1 - J6
- * CS1 Pmod5 - pin 1 - J5 & Pmod 6 - pin 7 - J6
- * CS2 Pmod6 - pin 8 - J6
- * CS3 SDCard (onboard)
- * CS4 Internal SPI Slave - loopback
- * CS5 SPI-Flash (onboard)
- */
-
-/*
- * UARTs: UART0 & UART1 & UART2
- */
-#define UART_NS16550_PORT_0_BASE_ADDR 0xF0008000
-#define UART_NS16550_PORT_0_CLK_FREQ SYSCLK_DEFAULT_IOSC_HZ
-
-#define UART_NS16550_PORT_1_BASE_ADDR 0xF0009000
-#define UART_NS16550_PORT_1_CLK_FREQ SYSCLK_DEFAULT_IOSC_HZ
-
-#define UART_NS16550_PORT_2_BASE_ADDR 0xF000A000
-#define UART_NS16550_PORT_2_CLK_FREQ SYSCLK_DEFAULT_IOSC_HZ
-
-#define UART_IRQ_FLAGS 0 /* Default */
-
-/**
- * Peripheral Interrupt Connection Configurations
- */
-#ifdef CONFIG_BOARD_EM_STARTERKIT_R23
-#define GPIO_DW_0_IRQ 24
-#define CONFIG_I2C_0_IRQ 25
-#define CONFIG_I2C_1_IRQ 26
-#define SPI_DW_PORT_0_IRQ 27
-#define SPI_DW_PORT_1_IRQ 28
-#define UART_NS16550_PORT_0_IRQ 29
-#define UART_NS16550_PORT_1_IRQ 30
-#define UART_NS16550_PORT_2_IRQ 31
-#else /* CONFIG_BOARD_EM_STARTERKIT_R23 */
-#define GPIO_DW_0_IRQ 22
-#define CONFIG_I2C_0_IRQ 23
-#define CONFIG_I2C_1_IRQ 24
-#define SPI_DW_PORT_0_IRQ 25
-#define SPI_DW_PORT_1_IRQ 26
-#define UART_NS16550_PORT_0_IRQ 27
-#define UART_NS16550_PORT_1_IRQ 28
-#define UART_NS16550_PORT_2_IRQ 29
-#endif /* !CONFIG_BOARD_EM_STARTERKIT_R23 */
-
-#define GPIO_DW_1_IRQ 0 /* can't interrupt */
-#define GPIO_DW_2_IRQ 0 /* can't interrupt */
-#define GPIO_DW_3_IRQ 0 /* can't interrupt */
-
-#endif /* !_ASMLANGUAGE */
-
-#endif /* _SOC__H_ */
diff --git a/arch/arc/soc/em7d/CMakeLists.txt b/arch/arc/soc/em7d/CMakeLists.txt
deleted file mode 100644
index 0954e65..0000000
--- a/arch/arc/soc/em7d/CMakeLists.txt
+++ /dev/null
@@ -1,14 +0,0 @@
-zephyr_library_include_directories(${PROJECT_SOURCE_DIR}/drivers)
-
-zephyr_cc_option(-mcpu=em4_dmips -mno-sdata)
-zephyr_cc_option(-mdiv-rem -mswap -mnorm)
-zephyr_cc_option(-mmpy-option=6 -mbarrel-shifter)
-zephyr_cc_option(--param l1-cache-size=16384)
-zephyr_cc_option(--param l1-cache-line-size=32)
-
-zephyr_cc_option_ifdef(CONFIG_CODE_DENSITY -mcode-density)
-
-zephyr_sources(
- soc.c
- soc_config.c
- )
diff --git a/arch/arc/soc/em7d/Kconfig.soc b/arch/arc/soc/em7d/Kconfig.soc
deleted file mode 100644
index 4e2a2f4..0000000
--- a/arch/arc/soc/em7d/Kconfig.soc
+++ /dev/null
@@ -1,5 +0,0 @@
-
-config SOC_EM7D
- bool "Synopsys ARC EM7D"
- select CPU_HAS_MPU
- select ARC_HAS_SECURE if BOARD_EM_STARTERKIT_R23
diff --git a/arch/arc/soc/em7d/dts.fixup b/arch/arc/soc/em7d/dts.fixup
deleted file mode 100644
index 909e6a5..0000000
--- a/arch/arc/soc/em7d/dts.fixup
+++ /dev/null
@@ -1,27 +0,0 @@
-/* SoC level DTS fixup file */
-
-#define CONFIG_DCCM_BASE_ADDRESS ARC_DCCM_80000000_BASE_ADDRESS
-#define CONFIG_DCCM_SIZE (ARC_DCCM_80000000_SIZE >> 10)
-
-#define CONFIG_ICCM_BASE_ADDRESS ARC_ICCM_0_BASE_ADDRESS
-#define CONFIG_ICCM_SIZE (ARC_ICCM_0_SIZE >> 10)
-
-#define CONFIG_UART_NS16550_PORT_0_BASE_ADDR NS16550_F0008000_BASE_ADDRESS
-#define CONFIG_UART_NS16550_PORT_0_BAUD_RATE NS16550_F0008000_CURRENT_SPEED
-#define CONFIG_UART_NS16550_PORT_0_NAME NS16550_F0008000_LABEL
-#define CONFIG_UART_NS16550_PORT_0_IRQ NS16550_F0008000_IRQ_0
-#define CONFIG_UART_NS16550_PORT_0_IRQ_PRI NS16550_F0008000_IRQ_0_PRIORITY
-
-#define CONFIG_UART_NS16550_PORT_1_BASE_ADDR NS16550_F0009000_BASE_ADDRESS
-#define CONFIG_UART_NS16550_PORT_1_BAUD_RATE NS16550_F0009000_CURRENT_SPEED
-#define CONFIG_UART_NS16550_PORT_1_NAME NS16550_F0009000_LABEL
-#define CONFIG_UART_NS16550_PORT_1_IRQ NS16550_F0009000_IRQ_0
-#define CONFIG_UART_NS16550_PORT_1_IRQ_PRI NS16550_F0009000_IRQ_0_PRIORITY
-
-#define CONFIG_UART_NS16550_PORT_2_BASE_ADDR NS16550_F000A000_BASE_ADDRESS
-#define CONFIG_UART_NS16550_PORT_2_BAUD_RATE NS16550_F000A000_CURRENT_SPEED
-#define CONFIG_UART_NS16550_PORT_2_NAME NS16550_F000A000_LABEL
-#define CONFIG_UART_NS16550_PORT_2_IRQ NS16550_F000A000_IRQ_0
-#define CONFIG_UART_NS16550_PORT_2_IRQ_PRI NS16550_F000A000_IRQ_0_PRIORITY
-
-/* End of SoC Level DTS fixup file */
diff --git a/arch/arc/soc/em7d/linker.ld b/arch/arc/soc/em7d/linker.ld
deleted file mode 100644
index e045de9..0000000
--- a/arch/arc/soc/em7d/linker.ld
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * Copyright (c) 2016 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-/**
- * @brief Linker script for the Synopsys EM Starterkit v2.2 EM7D platform.
- */
-
-/*
- * DRAM base address and size
- *
- * DRAM includes the exception vector table at reset, which is at
- * the beginning of the region.
- */
-#define SRAM_START CONFIG_SRAM_BASE_ADDRESS
-#define SRAM_SIZE CONFIG_SRAM_SIZE
-/* TODO: Using SRAM config for now, even though this is really DRAM. */
-
-/* Instruction Closely Coupled Memory (ICCM) base address and size */
-#define ICCM_START CONFIG_ICCM_BASE_ADDRESS
-#define ICCM_SIZE CONFIG_ICCM_SIZE
-
-/*
- * DCCM base address and size. DCCM is the data memory.
- */
-/* Data Closely Coupled Memory (DCCM) base address and size */
-#define DCCM_START CONFIG_DCCM_BASE_ADDRESS
-#define DCCM_SIZE CONFIG_DCCM_SIZE
-
-#include <generated_dts_board.h>
-#include <arch/arc/v2/linker.ld>
diff --git a/arch/arc/soc/em7d/soc.c b/arch/arc/soc/em7d/soc.c
deleted file mode 100644
index 460336c..0000000
--- a/arch/arc/soc/em7d/soc.c
+++ /dev/null
@@ -1,14 +0,0 @@
-/* soc.c - system/hardware module for em_starterkit BSP */
-
-/*
- * Copyright (c) 2016 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-/**
- * This module provides routines to initialize and support board-level hardware
- * for the ARC EM Starter kit board.
- *
- * Nothing to be done for now.
- */
diff --git a/arch/arc/soc/em7d/soc_config.c b/arch/arc/soc/em7d/soc_config.c
deleted file mode 100644
index 720aa4b..0000000
--- a/arch/arc/soc/em7d/soc_config.c
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * Copyright (c) 2016 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#include <device.h>
-#include <init.h>
-#include "soc.h"
-
-
-#ifdef CONFIG_UART_NS16550
-
-static int uart_ns16550_init(struct device *dev)
-{
- ARG_UNUSED(dev);
-
- /* On ARC EM Starter kit board,
- * send the UART the command to clear the interrupt
- */
-#ifdef CONFIG_UART_NS16550_PORT_0
- sys_write32(0, UART_NS16550_PORT_0_BASE_ADDR+0x4);
- sys_write32(0, UART_NS16550_PORT_0_BASE_ADDR+0x10);
-#endif /* CONFIG_UART_NS16550_PORT_0 */
-#ifdef CONFIG_UART_NS16550_PORT_1
- sys_write32(0, UART_NS16550_PORT_1_BASE_ADDR+0x4);
- sys_write32(0, UART_NS16550_PORT_1_BASE_ADDR+0x10);
-#endif /* CONFIG_UART_NS16550_PORT_1 */
-
- return 0;
-}
-
-SYS_INIT(uart_ns16550_init, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
-
-#endif /* CONFIG_UART_NS16550 */
diff --git a/arch/arc/soc/em9d/CMakeLists.txt b/arch/arc/soc/em9d/CMakeLists.txt
deleted file mode 100644
index a3fd64f..0000000
--- a/arch/arc/soc/em9d/CMakeLists.txt
+++ /dev/null
@@ -1,14 +0,0 @@
-zephyr_library_include_directories(${PROJECT_SOURCE_DIR}/drivers)
-
-zephyr_cc_option(-mcpu=em4_fpus -mno-sdata -mdiv-rem -mswap -mnorm)
-zephyr_cc_option(-mdiv-rem -mswap -mnorm)
-zephyr_cc_option(-mmpy-option=6 -mbarrel-shifter)
-
-zephyr_cc_option_ifdef(CONFIG_CODE_DENSITY -mcode-density)
-zephyr_cc_option_ifdef(CONFIG_FLOAT -mfpu=fpuda_all)
-
-
-zephyr_sources(
- soc.c
- soc_config.c
- )
diff --git a/arch/arc/soc/em9d/Kconfig.soc b/arch/arc/soc/em9d/Kconfig.soc
deleted file mode 100644
index d0af561..0000000
--- a/arch/arc/soc/em9d/Kconfig.soc
+++ /dev/null
@@ -1,4 +0,0 @@
-
-config SOC_EM9D
- bool "Synopsys ARC EM9D"
- select CPU_HAS_FPU
diff --git a/arch/arc/soc/em9d/dts.fixup b/arch/arc/soc/em9d/dts.fixup
deleted file mode 100644
index 70e0cca..0000000
--- a/arch/arc/soc/em9d/dts.fixup
+++ /dev/null
@@ -1,30 +0,0 @@
-/* SoC level DTS fixup file */
-
-#define CONFIG_DCCM_BASE_ADDRESS ARC_DCCM_80000000_BASE_ADDRESS
-#define CONFIG_DCCM_SIZE (ARC_DCCM_80000000_SIZE >> 10)
-
-#define CONFIG_ICCM_BASE_ADDRESS ARC_ICCM_0_BASE_ADDRESS
-#define CONFIG_ICCM_SIZE (ARC_ICCM_0_SIZE >> 10)
-
-#define CONFIG_SRAM_SIZE 0
-#define CONFIG_SRAM_BASE_ADDRESS 0
-
-#define CONFIG_UART_NS16550_PORT_0_BASE_ADDR NS16550_F0008000_BASE_ADDRESS
-#define CONFIG_UART_NS16550_PORT_0_BAUD_RATE NS16550_F0008000_CURRENT_SPEED
-#define CONFIG_UART_NS16550_PORT_0_NAME NS16550_F0008000_LABEL
-#define CONFIG_UART_NS16550_PORT_0_IRQ NS16550_F0008000_IRQ_0
-#define CONFIG_UART_NS16550_PORT_0_IRQ_PRI NS16550_F0008000_IRQ_0_PRIORITY
-
-#define CONFIG_UART_NS16550_PORT_1_BASE_ADDR NS16550_F0009000_BASE_ADDRESS
-#define CONFIG_UART_NS16550_PORT_1_BAUD_RATE NS16550_F0009000_CURRENT_SPEED
-#define CONFIG_UART_NS16550_PORT_1_NAME NS16550_F0009000_LABEL
-#define CONFIG_UART_NS16550_PORT_1_IRQ NS16550_F0009000_IRQ_0
-#define CONFIG_UART_NS16550_PORT_1_IRQ_PRI NS16550_F0009000_IRQ_0_PRIORITY
-
-#define CONFIG_UART_NS16550_PORT_2_BASE_ADDR NS16550_F000A000_BASE_ADDRESS
-#define CONFIG_UART_NS16550_PORT_2_BAUD_RATE NS16550_F000A000_CURRENT_SPEED
-#define CONFIG_UART_NS16550_PORT_2_NAME NS16550_F000A000_LABEL
-#define CONFIG_UART_NS16550_PORT_2_IRQ NS16550_F000A000_IRQ_0
-#define CONFIG_UART_NS16550_PORT_2_IRQ_PRI NS16550_F000A000_IRQ_0_PRIORITY
-
-/* End of SoC Level DTS fixup file */
diff --git a/arch/arc/soc/em9d/linker.ld b/arch/arc/soc/em9d/linker.ld
deleted file mode 100644
index 20c2ad0..0000000
--- a/arch/arc/soc/em9d/linker.ld
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * Copyright (c) 2016 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-/**
- * @brief Linker script for the Synopsys EM Starterkit v2.2 EM9D platform.
- */
-
-/*
- * ICCM base address and size
- *
- * ICCM includes the exception vector table at reset, which is at
- * the beginning of the region.
- */
-
-/* Instruction Closely Coupled Memory (ICCM) base address and size */
-#define ICCM_START CONFIG_ICCM_BASE_ADDRESS
-#define ICCM_SIZE CONFIG_ICCM_SIZE
-
-/*
- * DCCM base address and size. DCCM is the data memory.
- */
-/* Data Closely Coupled Memory (DCCM) base address and size */
-#define DCCM_START CONFIG_DCCM_BASE_ADDRESS
-#define DCCM_SIZE CONFIG_DCCM_SIZE
-
-#include <generated_dts_board.h>
-#include <arch/arc/v2/linker.ld>
-
diff --git a/arch/arc/soc/em9d/soc.c b/arch/arc/soc/em9d/soc.c
deleted file mode 100644
index 460336c..0000000
--- a/arch/arc/soc/em9d/soc.c
+++ /dev/null
@@ -1,14 +0,0 @@
-/* soc.c - system/hardware module for em_starterkit BSP */
-
-/*
- * Copyright (c) 2016 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-/**
- * This module provides routines to initialize and support board-level hardware
- * for the ARC EM Starter kit board.
- *
- * Nothing to be done for now.
- */
diff --git a/arch/arc/soc/em9d/soc.h b/arch/arc/soc/em9d/soc.h
deleted file mode 100644
index 7aeae37..0000000
--- a/arch/arc/soc/em9d/soc.h
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * Copyright (c) 2016-2017 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-/**
- * @brief Board configuration macros for EM Starter kit board
- *
- * This header file is used to specify and describe board-level
- * aspects for the target.
- */
-
-#ifndef _SOC__H_
-#define _SOC__H_
-
-#include <misc/util.h>
-
-/* default system clock */
-/* On the EM Starter Kit board, the peripheral bus clock frequency is 50Mhz */
-#define SYSCLK_DEFAULT_IOSC_HZ MHZ(50)
-
-
-/* ARC EM Core IRQs */
-#define IRQ_TIMER0 16
-#define IRQ_TIMER1 17
-
-#define IRQ_CORE_DMA_COMPLETE 20
-#define IRQ_CORE_DMA_ERROR 21
-
-#ifndef _ASMLANGUAGE
-
-#include <misc/util.h>
-#include <random/rand32.h>
-
-#define ARCV2_TIMER0_INT_LVL IRQ_TIMER0
-#define ARCV2_TIMER0_INT_PRI 0
-
-#define ARCV2_TIMER1_INT_LVL IRQ_TIMER1
-#define ARCV2_TIMER1_INT_PRI 1
-
-#define CONFIG_ARCV2_TIMER1_INT_LVL IRQ_TIMER1
-#define CONFIG_ARCV2_TIMER1_INT_PRI 1
-
-#define INT_ENABLE_ARC ~(0x00000001 << 8)
-#define INT_ENABLE_ARC_BIT_POS (8)
-
-/* I2C */
-/* I2C_0 is on Pmod2 connector */
-#define CONFIG_I2C_0_BASE_ADDR 0xF0004000
-#define CONFIG_I2C_0_IRQ_FLAGS 0
-
-/* I2C_1 is on Pmod4 connector */
-#define CONFIG_I2C_1_BASE_ADDR 0xF0005000
-#define CONFIG_I2C_1_IRQ_FLAGS 0
-
-/* GPIO */
-#define GPIO_DW_0_BASE_ADDR 0xF0002000 /* GPIO 0 : PORTA */
-#define GPIO_DW_0_BITS 32
-#define GPIO_DW_PORT_0_INT_MASK 0 /* n/a */
-#define GPIO_DW_0_IRQ_FLAGS 0 /* Defaults */
-
-#define GPIO_DW_1_BASE_ADDR 0xF000200C /* GPIO 1 : PORTB */
-#define GPIO_DW_1_BITS 9 /* 9 LEDs on board */
-#define GPIO_DW_PORT_1_INT_MASK 0 /* n/a */
-
-#define GPIO_DW_2_BASE_ADDR 0xF0002018 /* GPIO 2 : PORTC */
-#define GPIO_DW_2_BITS 32
-#define GPIO_DW_PORT_2_INT_MASK 0 /* n/a */
-
-#define GPIO_DW_3_BASE_ADDR 0xF0002024 /* GPIO 3 : PORTD */
-#define GPIO_DW_3_BITS 12
-#define GPIO_DW_PORT_3_INT_MASK 0 /* n/a */
-
-/* SPI */
-#define SPI_DW_SPI_CLOCK SYSCLK_DEFAULT_IOSC_HZ
-
-#define SPI_DW_PORT_0_REGS 0xF0006000
-#define SPI_DW_PORT_1_REGS 0xF0007000
-
-#define SPI_DW_IRQ_FLAGS 0
-
-/*
- * SPI Chip Select Assignments on EM Starter Kit
- *
- * CS0 Pmod6 - pin 1 - J6
- * CS1 Pmod5 - pin 1 - J5 & Pmod 6 - pin 7 - J6
- * CS2 Pmod6 - pin 8 - J6
- * CS3 SDCard (onboard)
- * CS4 Internal SPI Slave - loopback
- * CS5 SPI-Flash (onboard)
- */
-
-/*
- * UARTs: UART0 & UART1 & UART2
- */
-#define UART_NS16550_PORT_0_BASE_ADDR 0xF0008000
-#define UART_NS16550_PORT_0_CLK_FREQ SYSCLK_DEFAULT_IOSC_HZ
-
-#define UART_NS16550_PORT_1_BASE_ADDR 0xF0009000
-#define UART_NS16550_PORT_1_CLK_FREQ SYSCLK_DEFAULT_IOSC_HZ
-
-#define UART_NS16550_PORT_2_BASE_ADDR 0xF000A000
-#define UART_NS16550_PORT_2_CLK_FREQ SYSCLK_DEFAULT_IOSC_HZ
-
-#define UART_IRQ_FLAGS 0 /* Default */
-
-/**
- * Peripheral Interrupt Connection Configurations
- */
-#ifdef CONFIG_BOARD_EM_STARTERKIT_R23
-#define GPIO_DW_0_IRQ 24
-#define CONFIG_I2C_0_IRQ 25
-#define CONFIG_I2C_1_IRQ 26
-#define SPI_DW_PORT_0_IRQ 27
-#define SPI_DW_PORT_1_IRQ 28
-#define UART_NS16550_PORT_0_IRQ 29
-#define UART_NS16550_PORT_1_IRQ 30
-#define UART_NS16550_PORT_2_IRQ 31
-#else /* CONFIG_BOARD_EM_STARTERKIT_R23 */
-#define GPIO_DW_0_IRQ 22
-#define CONFIG_I2C_0_IRQ 23
-#define CONFIG_I2C_1_IRQ 24
-#define SPI_DW_PORT_0_IRQ 25
-#define SPI_DW_PORT_1_IRQ 26
-#define UART_NS16550_PORT_0_IRQ 27
-#define UART_NS16550_PORT_1_IRQ 28
-#define UART_NS16550_PORT_2_IRQ 29
-#endif /* !CONFIG_BOARD_EM_STARTERKIT_R23 */
-
-#define GPIO_DW_1_IRQ 0 /* can't interrupt */
-#define GPIO_DW_2_IRQ 0 /* can't interrupt */
-#define GPIO_DW_3_IRQ 0 /* can't interrupt */
-
-#endif /* !_ASMLANGUAGE */
-
-#endif /* _SOC__H_ */
diff --git a/arch/arc/soc/em9d/soc_config.c b/arch/arc/soc/em9d/soc_config.c
deleted file mode 100644
index 720aa4b..0000000
--- a/arch/arc/soc/em9d/soc_config.c
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * Copyright (c) 2016 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#include <device.h>
-#include <init.h>
-#include "soc.h"
-
-
-#ifdef CONFIG_UART_NS16550
-
-static int uart_ns16550_init(struct device *dev)
-{
- ARG_UNUSED(dev);
-
- /* On ARC EM Starter kit board,
- * send the UART the command to clear the interrupt
- */
-#ifdef CONFIG_UART_NS16550_PORT_0
- sys_write32(0, UART_NS16550_PORT_0_BASE_ADDR+0x4);
- sys_write32(0, UART_NS16550_PORT_0_BASE_ADDR+0x10);
-#endif /* CONFIG_UART_NS16550_PORT_0 */
-#ifdef CONFIG_UART_NS16550_PORT_1
- sys_write32(0, UART_NS16550_PORT_1_BASE_ADDR+0x4);
- sys_write32(0, UART_NS16550_PORT_1_BASE_ADDR+0x10);
-#endif /* CONFIG_UART_NS16550_PORT_1 */
-
- return 0;
-}
-
-SYS_INIT(uart_ns16550_init, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
-
-#endif /* CONFIG_UART_NS16550 */
diff --git a/arch/arc/soc/snps_emsk/CMakeLists.txt b/arch/arc/soc/snps_emsk/CMakeLists.txt
new file mode 100644
index 0000000..9f694fe
--- /dev/null
+++ b/arch/arc/soc/snps_emsk/CMakeLists.txt
@@ -0,0 +1,20 @@
+zephyr_library_include_directories(${PROJECT_SOURCE_DIR}/drivers)
+
+
+zephyr_cc_option_ifdef(CONFIG_SOC_EMSK_EM7D -mcpu=em4_dmips)
+zephyr_cc_option_ifdef(CONFIG_SOC_EMSK_EM9D -mcpu=em4_fpus)
+zephyr_cc_option_ifdef(CONFIG_SOC_EMSK_EM11D -mcpu=em4_fpuda)
+zephyr_cc_option(-mno-sdata -mdiv-rem -mswap -mnorm)
+zephyr_cc_option(-mmpy-option=6 -mbarrel-shifter)
+zephyr_cc_option_ifdef(CONFIG_SOC_EMSK_EM7D --param l1-cache-size=16384)
+zephyr_cc_option_ifdef(CONFIG_SOC_EMSK_EM7D --param l1-cache-line-size=32)
+zephyr_cc_option_ifdef(CONFIG_SOC_EMSK_EM11D --param l1-cache-size=16384)
+zephyr_cc_option_ifdef(CONFIG_SOC_EMSK_EM11D --param l1-cache-line-size=32)
+zephyr_cc_option_ifdef(CONFIG_CODE_DENSITY -mcode-density)
+zephyr_cc_option_ifdef(CONFIG_FLOAT -mfpu=fpuda_all)
+
+
+zephyr_sources(
+ soc.c
+ soc_config.c
+ )
diff --git a/arch/arc/soc/snps_emsk/Kconfig b/arch/arc/soc/snps_emsk/Kconfig
new file mode 100644
index 0000000..cac4fa0
--- /dev/null
+++ b/arch/arc/soc/snps_emsk/Kconfig
@@ -0,0 +1,29 @@
+#
+# Copyright (c) 2014 Wind River Systems, Inc.
+# Copyright (c) 2018 Synopsys, Inc. All rights reserved.
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+if SOC_EMSK
+
+choice
+prompt "ARC EM Starter Kit Core Selection"
+default SOC_EMSK_EM7D
+
+config SOC_EMSK_EM7D
+ bool "Synopsys ARC EM7D of EMSK"
+ select CPU_HAS_MPU
+ select ARC_HAS_SECURE if BOARD_EM_STARTERKIT_R23
+
+config SOC_EMSK_EM11D
+ bool "Synopsys ARC EM11D of EMSK"
+ select CPU_HAS_FPU
+
+config SOC_EMSK_EM9D
+ bool "Synopsys ARC EM9D of EMSK"
+ select CPU_HAS_FPU
+
+endchoice
+
+endif #SOC_EMSK
diff --git a/arch/arc/soc/snps_emsk/Kconfig.defconfig b/arch/arc/soc/snps_emsk/Kconfig.defconfig
new file mode 100644
index 0000000..88f31e3
--- /dev/null
+++ b/arch/arc/soc/snps_emsk/Kconfig.defconfig
@@ -0,0 +1,16 @@
+#
+# Copyright (c) 2014 Wind River Systems, Inc.
+# Copyright (c) 2018 Synopsys, Inc. All rights reserved.
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+if SOC_EMSK
+
+config SOC
+ string
+ default snps_emsk
+
+source "arch/arc/soc/snps_emsk/Kconfig.defconfig.em*"
+
+endif #SOC_EMSK
diff --git a/arch/arc/soc/em11d/Kconfig.defconfig b/arch/arc/soc/snps_emsk/Kconfig.defconfig.em11d
similarity index 80%
rename from arch/arc/soc/em11d/Kconfig.defconfig
rename to arch/arc/soc/snps_emsk/Kconfig.defconfig.em11d
index 85c4345..f80a5f9 100644
--- a/arch/arc/soc/em11d/Kconfig.defconfig
+++ b/arch/arc/soc/snps_emsk/Kconfig.defconfig.em11d
@@ -1,14 +1,14 @@
#
# Copyright (c) 2014 Wind River Systems, Inc.
-# Copyright (c) 2016 Synopsys, Inc. All rights reserved.
+# Copyright (c) 2018 Synopsys, Inc. All rights reserved.
#
# SPDX-License-Identifier: Apache-2.0
#
-if SOC_EM11D
+if SOC_EMSK_EM11D
-config SOC
- default em11d
+config CPU_EM4_FPUDA
+ def_bool y
config NUM_IRQ_PRIO_LEVELS
# This processor supports 4 priority levels:
@@ -35,4 +35,4 @@
config FP_FPU_DA
def_bool y
-endif #SOC_EM11D
+endif #SOC_EMSK_EM11D
diff --git a/arch/arc/soc/em7d/Kconfig.defconfig b/arch/arc/soc/snps_emsk/Kconfig.defconfig.em7d
similarity index 87%
rename from arch/arc/soc/em7d/Kconfig.defconfig
rename to arch/arc/soc/snps_emsk/Kconfig.defconfig.em7d
index 7f5bec9..3466e32 100644
--- a/arch/arc/soc/em7d/Kconfig.defconfig
+++ b/arch/arc/soc/snps_emsk/Kconfig.defconfig.em7d
@@ -1,14 +1,14 @@
#
# Copyright (c) 2014 Wind River Systems, Inc.
-# Copyright (c) 2016 Synopsys, Inc. All rights reserved.
+# Copyright (c) 2018 Synopsys, Inc. All rights reserved.
#
# SPDX-License-Identifier: Apache-2.0
#
-if SOC_EM7D
+if SOC_EMSK_EM7D
-config SOC
- default em7d
+config CPU_EM4_DMIPS
+ def_bool y
config NUM_IRQ_PRIO_LEVELS
# This processor supports 4 priority levels:
@@ -58,4 +58,4 @@
endif # ARC_MPU_VER
-endif #SOC_EM7D
+endif #SOC_EMSK_EM7D
diff --git a/arch/arc/soc/em9d/Kconfig.defconfig b/arch/arc/soc/snps_emsk/Kconfig.defconfig.em9d
similarity index 79%
rename from arch/arc/soc/em9d/Kconfig.defconfig
rename to arch/arc/soc/snps_emsk/Kconfig.defconfig.em9d
index 5756430..ba029ed 100644
--- a/arch/arc/soc/em9d/Kconfig.defconfig
+++ b/arch/arc/soc/snps_emsk/Kconfig.defconfig.em9d
@@ -1,14 +1,14 @@
#
# Copyright (c) 2014 Wind River Systems, Inc.
-# Copyright (c) 2016 Synopsys, Inc. All rights reserved.
+# Copyright (c) 2018 Synopsys, Inc. All rights reserved.
#
# SPDX-License-Identifier: Apache-2.0
#
-if SOC_EM9D
+if SOC_EMSK_EM9D
-config SOC
- default em9d
+config CPU_EM4_FPUS
+ def_bool y
config NUM_IRQ_PRIO_LEVELS
# This processor supports 4 priority levels:
@@ -29,4 +29,4 @@
config HARVARD
def_bool y
-endif #SOC_EM9D
+endif #SOC_EMSK_EM9D
diff --git a/arch/arc/soc/snps_emsk/Kconfig.soc b/arch/arc/soc/snps_emsk/Kconfig.soc
new file mode 100644
index 0000000..4e1bf8f
--- /dev/null
+++ b/arch/arc/soc/snps_emsk/Kconfig.soc
@@ -0,0 +1,9 @@
+#
+# Copyright (c) 2014 Wind River Systems, Inc.
+# Copyright (c) 2018 Synopsys, Inc. All rights reserved.
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+config SOC_EMSK
+ bool "Synopsys ARC EM Starter Kit SoC"
diff --git a/arch/arc/soc/em11d/dts.fixup b/arch/arc/soc/snps_emsk/dts.fixup
similarity index 100%
rename from arch/arc/soc/em11d/dts.fixup
rename to arch/arc/soc/snps_emsk/dts.fixup
diff --git a/arch/arc/soc/em11d/linker.ld b/arch/arc/soc/snps_emsk/linker.ld
similarity index 69%
rename from arch/arc/soc/em11d/linker.ld
rename to arch/arc/soc/snps_emsk/linker.ld
index ff0fea7..d2ec0e2 100644
--- a/arch/arc/soc/em11d/linker.ld
+++ b/arch/arc/soc/snps_emsk/linker.ld
@@ -1,33 +1,40 @@
/*
- * Copyright (c) 2016 Synopsys, Inc. All rights reserved.
+ * Copyright (c) 2018 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
- * @brief Linker script for the Synopsys EM Starterkit v2.2 EM11D platform.
+ * @brief Linker script for the Synopsys EM Starterkit platform.
*/
+#include <generated_dts_board.h>
+
/*
* DRAM base address and size
*
* DRAM includes the exception vector table at reset, which is at
* the beginning of the region.
*/
+#if defined(CONFIG_SRAM_BASE_ADDRESS) && (CONFIG_SRAM_SIZE > 0)
#define SRAM_START CONFIG_SRAM_BASE_ADDRESS
#define SRAM_SIZE CONFIG_SRAM_SIZE
+#endif
/* TODO: Using SRAM config for now, even though this is really DRAM. */
/* Instruction Closely Coupled Memory (ICCM) base address and size */
+#if defined(CONFIG_ICCM_BASE_ADDRESS) && (CONFIG_ICCM_SIZE > 0)
#define ICCM_START CONFIG_ICCM_BASE_ADDRESS
#define ICCM_SIZE CONFIG_ICCM_SIZE
+#endif
/*
* DCCM base address and size. DCCM is the data memory.
*/
/* Data Closely Coupled Memory (DCCM) base address and size */
+#if defined(CONFIG_DCCM_BASE_ADDRESS) && (CONFIG_DCCM_SIZE > 0)
#define DCCM_START CONFIG_DCCM_BASE_ADDRESS
#define DCCM_SIZE CONFIG_DCCM_SIZE
+#endif
-#include <generated_dts_board.h>
#include <arch/arc/v2/linker.ld>
diff --git a/arch/arc/soc/em11d/soc.c b/arch/arc/soc/snps_emsk/soc.c
similarity index 100%
rename from arch/arc/soc/em11d/soc.c
rename to arch/arc/soc/snps_emsk/soc.c
diff --git a/arch/arc/soc/em7d/soc.h b/arch/arc/soc/snps_emsk/soc.h
similarity index 91%
rename from arch/arc/soc/em7d/soc.h
rename to arch/arc/soc/snps_emsk/soc.h
index 1917ef2..5ee6979 100644
--- a/arch/arc/soc/em7d/soc.h
+++ b/arch/arc/soc/snps_emsk/soc.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016-2017 Synopsys, Inc. All rights reserved.
+ * Copyright (c) 2018 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -20,22 +20,22 @@
/* On the EM Starter Kit board, the peripheral bus clock frequency is 50Mhz */
#define SYSCLK_DEFAULT_IOSC_HZ MHZ(50)
-
/* ARC EM Core IRQs */
#define IRQ_TIMER0 16
#define IRQ_TIMER1 17
-#if defined(CONFIG_BOARD_EM_STARTERKIT_R23) && defined(CONFIG_SOC_EM7D)
+#if defined(CONFIG_BOARD_EM_STARTERKIT_R23) && defined(CONFIG_SOC_EMSK_EM7D)
#define IRQ_SEC_TIMER0 20
-#endif /* CONFIG_BOARD_EM_STARTERKIT_R23 && CONFIG_SOC_EM7D */
+#endif /* CONFIG_BOARD_EM_STARTERKIT_R23 && CONFIG_SOC_EMSK_EM7D */
-#if defined(CONFIG_BOARD_EM_STARTERKIT_R23) && defined(CONFIG_SOC_EM7D)
+#if defined(CONFIG_BOARD_EM_STARTERKIT_R23) && defined(CONFIG_SOC_EMSK_EM7D)
#define IRQ_CORE_DMA_COMPLETE 22
#define IRQ_CORE_DMA_ERROR 23
-#else /* CONFIG_BOARD_EM_STARTERKIT_R23 && CONFIG_SOC_EM7D */
+#else /* CONFIG_BOARD_EM_STARTERKIT_R23 && CONFIG_SOC_EMSK_EM7D */
#define IRQ_CORE_DMA_COMPLETE 20
#define IRQ_CORE_DMA_ERROR 21
-#endif /* !(CONFIG_BOARD_EM_STARTERKIT_R23 && CONFIG_SOC_EM7D) */
+#endif /* !(CONFIG_BOARD_EM_STARTERKIT_R23 && CONFIG_SOC_EMSK_EM7D) */
+
#ifndef _ASMLANGUAGE
@@ -55,6 +55,7 @@
#define INT_ENABLE_ARC_BIT_POS (8)
/* I2C */
+/* I2C_0 is on Pmod2 connector */
#define CONFIG_I2C_0_BASE_ADDR 0xF0004000
#define CONFIG_I2C_0_IRQ_FLAGS 0
@@ -62,6 +63,7 @@
#define CONFIG_I2C_1_BASE_ADDR 0xF0005000
#define CONFIG_I2C_1_IRQ_FLAGS 0
+
/* GPIO */
#define GPIO_DW_0_BASE_ADDR 0xF0002000 /* GPIO 0 : PORTA */
#define GPIO_DW_0_BITS 32
diff --git a/arch/arc/soc/em11d/soc_config.c b/arch/arc/soc/snps_emsk/soc_config.c
similarity index 92%
rename from arch/arc/soc/em11d/soc_config.c
rename to arch/arc/soc/snps_emsk/soc_config.c
index 720aa4b..0abe6a7 100644
--- a/arch/arc/soc/em11d/soc_config.c
+++ b/arch/arc/soc/snps_emsk/soc_config.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016 Synopsys, Inc. All rights reserved.
+ * Copyright (c) 2018 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*/
diff --git a/boards/arc/em_starterkit/Kconfig b/boards/arc/em_starterkit/Kconfig
index 13fb949..6516083 100644
--- a/boards/arc/em_starterkit/Kconfig
+++ b/boards/arc/em_starterkit/Kconfig
@@ -16,7 +16,6 @@
bool "2.2"
config BOARD_EM_STARTERKIT_R23
- depends on (SOC_EM9D || SOC_EM11D || SOC_EM7D)
bool "2.3"
endchoice
diff --git a/boards/arc/em_starterkit/Kconfig.board b/boards/arc/em_starterkit/Kconfig.board
index 5eaff7c..61cacee 100644
--- a/boards/arc/em_starterkit/Kconfig.board
+++ b/boards/arc/em_starterkit/Kconfig.board
@@ -6,7 +6,7 @@
#
config BOARD_EM_STARTERKIT
bool "ARC EM Starter Kit"
- depends on (SOC_EM7D || SOC_EM9D || SOC_EM11D)
+ depends on SOC_EMSK
help
The DesignWare ARC EM Starter Kit board is a board
that can host up to 3 different SOC FPGA bit files.
diff --git a/boards/arc/em_starterkit/em_starterkit_defconfig b/boards/arc/em_starterkit/em_starterkit_defconfig
index 4464e60..2d43dc5 100644
--- a/boards/arc/em_starterkit/em_starterkit_defconfig
+++ b/boards/arc/em_starterkit/em_starterkit_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARC=y
-CONFIG_SOC_EM9D=y
+CONFIG_SOC_EMSK=y
+CONFIG_SOC_EMSK_EM9D=y
CONFIG_BOARD_EM_STARTERKIT=y
CONFIG_BOARD_EM_STARTERKIT_R23=y
CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
diff --git a/boards/arc/em_starterkit/em_starterkit_em11d_defconfig b/boards/arc/em_starterkit/em_starterkit_em11d_defconfig
index 6c3fb3a..ad6ce55 100644
--- a/boards/arc/em_starterkit/em_starterkit_em11d_defconfig
+++ b/boards/arc/em_starterkit/em_starterkit_em11d_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARC=y
-CONFIG_SOC_EM11D=y
+CONFIG_SOC_EMSK=y
+CONFIG_SOC_EMSK_EM11D=y
CONFIG_BOARD_EM_STARTERKIT=y
CONFIG_BOARD_EM_STARTERKIT_R23=y
CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
diff --git a/boards/arc/em_starterkit/em_starterkit_em7d_defconfig b/boards/arc/em_starterkit/em_starterkit_em7d_defconfig
index 19ed7b3..9f753cb 100644
--- a/boards/arc/em_starterkit/em_starterkit_em7d_defconfig
+++ b/boards/arc/em_starterkit/em_starterkit_em7d_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARC=y
-CONFIG_SOC_EM7D=y
+CONFIG_SOC_EMSK=y
+CONFIG_SOC_EMSK_EM7D=y
CONFIG_BOARD_EM_STARTERKIT=y
CONFIG_BOARD_EM_STARTERKIT_R23=y
CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
diff --git a/boards/arc/em_starterkit/em_starterkit_em7d_v22_defconfig b/boards/arc/em_starterkit/em_starterkit_em7d_v22_defconfig
index d297586..983f3d4 100644
--- a/boards/arc/em_starterkit/em_starterkit_em7d_v22_defconfig
+++ b/boards/arc/em_starterkit/em_starterkit_em7d_v22_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARC=y
-CONFIG_SOC_EM7D=y
+CONFIG_SOC_EMSK=y
+CONFIG_SOC_EMSK_EM7D=y
CONFIG_BOARD_EM_STARTERKIT=y
CONFIG_BOARD_EM_STARTERKIT_R22=y
CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
diff --git a/cmake/gcc-m-cpu.cmake b/cmake/gcc-m-cpu.cmake
index dbed59d..270ea4d 100644
--- a/cmake/gcc-m-cpu.cmake
+++ b/cmake/gcc-m-cpu.cmake
@@ -22,11 +22,11 @@
elseif("${ARCH}" STREQUAL "arc")
if(CONFIG_SOC_QUARK_SE_C1000_SS)
set(GCC_M_CPU quarkse_em)
- elseif(CONFIG_SOC_EM9D)
+ elseif(CONFIG_CPU_EM4_FPUS)
set(GCC_M_CPU em4_fpus)
- elseif(CONFIG_SOC_EM7D)
+ elseif(CONFIG_CPU_EM4_DMIPS)
set(GCC_M_CPU em4_dmips)
- elseif(CONFIG_SOC_EM11D)
+ elseif(CONFIG_CPU_EM4_FPUDA)
set(GCC_M_CPU em4_fpuda)
endif()
endif()
