boards: renesas: Add support CTSU for RSK-RX130 board

Add Pinctrl, status okay for CTSU node on RSK-RX130

Signed-off-by: Minh Tang <minh.tang.ue@bp.renesas.com>
diff --git a/boards/renesas/rsk_rx130/rsk_rx130.dts b/boards/renesas/rsk_rx130/rsk_rx130.dts
index 4473713..1471e3a 100644
--- a/boards/renesas/rsk_rx130/rsk_rx130.dts
+++ b/boards/renesas/rsk_rx130/rsk_rx130.dts
@@ -86,6 +86,10 @@
 	status = "okay";
 };
 
+&ioportc {
+	status = "okay";
+};
+
 &ioportd {
 	status = "okay";
 };
@@ -118,6 +122,58 @@
 	clock-frequency = <DT_FREQ_K(400)>;
 };
 
+&ctsu {
+	pinctrl-0 = <&ctsu_default>;
+	pinctrl-names = "default";
+	max-num-sensors = <36>;
+	tscap-gpios = <&ioportc 4 0>;
+	status = "okay";
+
+	onboard_slider: touch_slider_0 {
+		component-type = "slider";
+		ssdiv = <1>;
+		so = <0x040>;
+		snum = <0x03>;
+		sdpa = <0x07>;
+		channels-num = <10>, <9>, <8>, <7>;
+		zephyr,code = <INPUT_ABS_THROTTLE>;
+		touch-count-threshold = <750>;
+
+		sld0 {
+			compatible = "renesas,rx-ctsu-slider";
+			status = "okay";
+		};
+	};
+
+	onboard_button_1: touch_button_1 {
+		component-type = "button";
+		ssdiv = <0x0>;
+		snum = <0x07>;
+		sdpa = <0x03>;
+		channels-num = <11>;
+		zephyr,code = <INPUT_KEY_1>;
+
+		button1 {
+			compatible = "renesas,rx-ctsu-button";
+			status = "okay";
+		};
+	};
+
+	onboard_button_2: touch_button_2 {
+		component-type = "button";
+		ssdiv = <0x0>;
+		snum = <0x07>;
+		sdpa = <0x03>;
+		channels-num = <12>;
+		zephyr,code = <INPUT_KEY_2>;
+
+		button2 {
+			compatible = "renesas,rx-ctsu-button";
+			status = "okay";
+		};
+	};
+};
+
 &port_irq1 {
 	status = "okay";
 };
diff --git a/boards/renesas/rsk_rx130/rsk_rx130_512kb-pinctrl.dtsi b/boards/renesas/rsk_rx130/rsk_rx130_512kb-pinctrl.dtsi
index 2d56a0e..9fde9f8 100644
--- a/boards/renesas/rsk_rx130/rsk_rx130_512kb-pinctrl.dtsi
+++ b/boards/renesas/rsk_rx130/rsk_rx130_512kb-pinctrl.dtsi
@@ -41,4 +41,16 @@
 			renesas,analog-enable;
 		};
 	};
+
+	ctsu_default: ctsu_default {
+		group1 {
+			psels = <RX_PSEL(RX_PSEL_PHnPFS_TS7, 0x11, 3)>,
+				<RX_PSEL(RX_PSEL_PHnPFS_TS8, 0x11, 2)>,
+				<RX_PSEL(RX_PSEL_PHnPFS_TS9, 0x11, 1)>,
+				<RX_PSEL(RX_PSEL_PHnPFS_TS10, 0x11, 0)>,
+				<RX_PSEL(RX_PSEL_P5nPFS_TS11, 0x05, 5)>,
+				<RX_PSEL(RX_PSEL_P5nPFS_TS12, 0x05, 4)>,
+				<RX_PSEL(RX_PSEL_PCnPFS_TSCAP, 0x0c, 4)>;
+		};
+	};
 };