679ce42f15a974ae805326e021310130c17754a3 - third_party/github/zephyrproject-rtos/zephyr

commit	679ce42f15a974ae805326e021310130c17754a3	[log] [tgz]
author	Jimmy Zheng <jimmyzhe@andestech.com>	Tue Jul 22 18:11:38 2025 +0800
committer	Chris Friedt <chrisfriedt@gmail.com>	Mon Oct 13 11:26:28 2025 -0400
tree	48e112e5ddb2aea8cdf1023d8308f3b77cefd664
parent	7d169ccc26773b7dcf2095436ee51664c491c5fe [diff]

arch: riscv: custom: add Andes CSR support

Rework Andes-specific CSR to use RISC-V custom CSR common code.
Move these stuff to 'arch/riscv/custom/andes':

1. Rename 'soc_v5.h' to 'andes_csr.h' for CSR definitions.
2. Replace '_start' with '__reset' hook for low-level CSR initialization.
3. Move CSR context to common macro '__custom_csr_save/restore_context'.
4. Move 'EXECIT' CSR support to common code.
5. Move PMA CSR driver to common code.
6. Use RISC-V common linker.ld instead of SoC-specific linker.ld.

Signed-off-by: Jimmy Zheng <jimmyzhe@andestech.com>

arch/riscv/Kconfig[diff]
arch/riscv/custom/Kconfig[Added - diff]
arch/riscv/custom/andes/CMakeLists.txt[Added - diff]
arch/riscv/custom/andes/Kconfig[Added - diff]
arch/riscv/custom/andes/andes_csr.h[Renamed from soc/andestech/ae350/soc_v5.h - diff]
arch/riscv/custom/andes/csr_context.h[Added - diff]
arch/riscv/custom/andes/csr_irq.inc[Added - diff]
arch/riscv/custom/andes/csr_offsets.h[Added - diff]
arch/riscv/custom/andes/execit.ld[Renamed from soc/andestech/ae350/common_linker/execit.ld - diff]
arch/riscv/custom/andes/pma.c[Renamed from soc/andestech/ae350/pma.c - diff]
arch/riscv/custom/andes/pma.h[Renamed from soc/andestech/ae350/pma.h - diff]
arch/riscv/custom/andes/pma_align_end.ld[Added - diff]
arch/riscv/custom/andes/pma_align_start.ld[Added - diff]
arch/riscv/custom/andes/reset.S[Added - diff]
boards/andestech/adp_xc7k_ae350/adp_xc7k_ae350_clic_defconfig[diff]
boards/andestech/adp_xc7k_ae350/adp_xc7k_ae350_defconfig[diff]
drivers/cache/cache_andes.c[diff]
soc/andestech/ae350/CMakeLists.txt[diff]
soc/andestech/ae350/Kconfig[diff]
soc/andestech/ae350/Kconfig.defconfig[diff]
soc/andestech/ae350/common_linker/init.ld[Deleted - diff]
soc/andestech/ae350/linker.ld[Deleted - diff]
soc/andestech/ae350/ram_start_nonzero.ld[Renamed from soc/andestech/ae350/common_linker/ram_start_nonzero.ld - diff]
soc/andestech/ae350/soc.c[diff]
soc/andestech/ae350/soc_context.h[diff]
soc/andestech/ae350/soc_irq.S[diff]
soc/andestech/ae350/soc_offsets.h[diff]
soc/andestech/ae350/start.S[Deleted - diff]

28 files changed