| commit | 684082b5b2c12bc92e2ed577a13910cd75853a32 | [log] [tgz] |
|---|---|---|
| author | Alexandre Bourdiol <alexandre.bourdiol@st.com> | Tue Jun 15 19:09:50 2021 +0200 |
| committer | Anas Nashif <anas.nashif@intel.com> | Mon Jun 28 14:17:40 2021 -0400 |
| tree | 90b25563b341cb94e755c6206c0d7700ed6e11f4 | |
| parent | 1335228f58473647fac5d9e0fc178536a444c4f3 [diff] |
soc: arm: stm32l5: enable ICACHE Enable Instruction Cache Warning: no flash driver yet available for STM32l5 But cache coherency management (cache invalidate) will be rerquired when implementing flash driver. ICAHE must be disabled for any flash write opeartion. Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>