boards: st: stm32h745i_disco: increase FMC SDRAM clock period
Testing full SDRAM access on stm32h745i_disco showed instabilities
and corrupted accessed. Increasing the FMC SDRAM clock period fixes
the issue.
This change ensures stability of transactions with the SDRAM but
may be sub-optimized regarding performances. An alternate correction
would need further investigations in the FMC interface timings
and clocks configuration.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
diff --git a/boards/st/stm32h745i_disco/stm32h745i_disco_stm32h745xx_m7.dts b/boards/st/stm32h745i_disco/stm32h745i_disco_stm32h745xx_m7.dts
index 1a8c0a9..7bfc790 100644
--- a/boards/st/stm32h745i_disco/stm32h745i_disco_stm32h745xx_m7.dts
+++ b/boards/st/stm32h745i_disco/stm32h745i_disco_stm32h745xx_m7.dts
@@ -275,7 +275,7 @@
STM32_FMC_SDRAM_MWID_16
STM32_FMC_SDRAM_NB_4
STM32_FMC_SDRAM_CAS_2
- STM32_FMC_SDRAM_SDCLK_PERIOD_2
+ STM32_FMC_SDRAM_SDCLK_PERIOD_3
STM32_FMC_SDRAM_RBURST_ENABLE
STM32_FMC_SDRAM_RPIPE_0>;
st,sdram-timing = <2 7 4 7 2 2 2>;
